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2 * QEMU Sparc SLAVIO timer controller emulation
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
29 #define DPRINTF(fmt, args...) \
30 do { printf("TIMER: " fmt , ##args); } while (0)
32 #define DPRINTF(fmt, args...)
36 * Registers of hardware timer in sun4m.
38 * This is the timer/counter part of chip STP2001 (Slave I/O), also
39 * produced as NCR89C105. See
40 * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C105.txt
42 * The 31-bit counter is incremented every 500ns by bit 9. Bits 8..0
43 * are zero. Bit 31 is 1 when count has been reached.
45 * Per-CPU timers interrupt local CPU, system timer uses normal
50 typedef struct SLAVIO_TIMERState
{
51 uint32_t limit
, count
, counthigh
;
52 int64_t count_load_time
;
54 int64_t stop_time
, tick_offset
;
58 int mode
; // 0 = processor, 1 = user, 2 = system
63 #define TIMER_MAXADDR 0x1f
64 #define CNT_FREQ 2000000
66 // Update count, set irq, update expire_time
67 static void slavio_timer_get_out(SLAVIO_TIMERState
*s
)
70 int64_t diff
, ticks
, count
;
73 // There are three clock tick units: CPU ticks, register units
74 // (nanoseconds), and counter ticks (500 ns).
75 if (s
->mode
== 1 && s
->stopped
)
78 ticks
= qemu_get_clock(vm_clock
) - s
->tick_offset
;
80 out
= (ticks
> s
->expire_time
);
82 s
->reached
= 0x80000000;
88 // Convert register units to counter ticks
91 // Convert cpu ticks to counter ticks
92 diff
= muldiv64(ticks
- s
->count_load_time
, CNT_FREQ
, ticks_per_sec
);
94 // Calculate what the counter should be, convert to register
97 s
->count
= count
<< 9;
98 s
->counthigh
= count
>> 22;
100 // Expire time: CPU ticks left to next interrupt
101 // Convert remaining counter ticks to CPU ticks
102 s
->expire_time
= ticks
+ muldiv64(limit
- count
, ticks_per_sec
, CNT_FREQ
);
104 DPRINTF("irq %d limit %d reached %d d %" PRId64
" count %d s->c %x diff %" PRId64
" stopped %d mode %d\n", s
->irq
, limit
, s
->reached
?1:0, (ticks
-s
->count_load_time
), count
, s
->count
, s
->expire_time
- ticks
, s
->stopped
, s
->mode
);
107 pic_set_irq_cpu(s
->intctl
, s
->irq
, out
, s
->cpu
);
111 static void slavio_timer_irq(void *opaque
)
113 SLAVIO_TIMERState
*s
= opaque
;
117 slavio_timer_get_out(s
);
119 qemu_mod_timer(s
->irq_timer
, s
->expire_time
);
122 static uint32_t slavio_timer_mem_readl(void *opaque
, target_phys_addr_t addr
)
124 SLAVIO_TIMERState
*s
= opaque
;
127 saddr
= (addr
& TIMER_MAXADDR
) >> 2;
130 // read limit (system counter mode) or read most signifying
131 // part of counter (user mode)
134 pic_set_irq_cpu(s
->intctl
, s
->irq
, 0, s
->cpu
);
139 slavio_timer_get_out(s
);
140 return s
->counthigh
& 0x7fffffff;
143 // read counter and reached bit (system mode) or read lsbits
144 // of counter (user mode)
145 slavio_timer_get_out(s
);
147 return (s
->count
& 0x7fffffff) | s
->reached
;
151 // read start/stop status
154 // read user/system mode
161 static void slavio_timer_mem_writel(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
163 SLAVIO_TIMERState
*s
= opaque
;
166 saddr
= (addr
& TIMER_MAXADDR
) >> 2;
169 // set limit, reset counter
170 s
->count_load_time
= qemu_get_clock(vm_clock
);
173 // set limit without resetting counter
175 s
->limit
= 0x7fffffff;
177 s
->limit
= val
& 0x7fffffff;
181 // start/stop user counter
184 s
->stop_time
= qemu_get_clock(vm_clock
);
189 s
->tick_offset
+= qemu_get_clock(vm_clock
) - s
->stop_time
;
195 // bit 0: user (1) or system (0) counter mode
196 if (s
->mode
== 0 || s
->mode
== 1)
204 static CPUReadMemoryFunc
*slavio_timer_mem_read
[3] = {
205 slavio_timer_mem_readl
,
206 slavio_timer_mem_readl
,
207 slavio_timer_mem_readl
,
210 static CPUWriteMemoryFunc
*slavio_timer_mem_write
[3] = {
211 slavio_timer_mem_writel
,
212 slavio_timer_mem_writel
,
213 slavio_timer_mem_writel
,
216 static void slavio_timer_save(QEMUFile
*f
, void *opaque
)
218 SLAVIO_TIMERState
*s
= opaque
;
220 qemu_put_be32s(f
, &s
->limit
);
221 qemu_put_be32s(f
, &s
->count
);
222 qemu_put_be32s(f
, &s
->counthigh
);
223 qemu_put_be64s(f
, &s
->count_load_time
);
224 qemu_put_be64s(f
, &s
->expire_time
);
225 qemu_put_be64s(f
, &s
->stop_time
);
226 qemu_put_be64s(f
, &s
->tick_offset
);
227 qemu_put_be32s(f
, &s
->irq
);
228 qemu_put_be32s(f
, &s
->reached
);
229 qemu_put_be32s(f
, &s
->stopped
);
230 qemu_put_be32s(f
, &s
->mode
);
233 static int slavio_timer_load(QEMUFile
*f
, void *opaque
, int version_id
)
235 SLAVIO_TIMERState
*s
= opaque
;
240 qemu_get_be32s(f
, &s
->limit
);
241 qemu_get_be32s(f
, &s
->count
);
242 qemu_get_be32s(f
, &s
->counthigh
);
243 qemu_get_be64s(f
, &s
->count_load_time
);
244 qemu_get_be64s(f
, &s
->expire_time
);
245 qemu_get_be64s(f
, &s
->stop_time
);
246 qemu_get_be64s(f
, &s
->tick_offset
);
247 qemu_get_be32s(f
, &s
->irq
);
248 qemu_get_be32s(f
, &s
->reached
);
249 qemu_get_be32s(f
, &s
->stopped
);
250 qemu_get_be32s(f
, &s
->mode
);
254 static void slavio_timer_reset(void *opaque
)
256 SLAVIO_TIMERState
*s
= opaque
;
260 s
->count_load_time
= qemu_get_clock(vm_clock
);;
261 s
->stop_time
= s
->count_load_time
;
266 slavio_timer_get_out(s
);
269 void slavio_timer_init(uint32_t addr
, int irq
, int mode
, unsigned int cpu
,
272 int slavio_timer_io_memory
;
273 SLAVIO_TIMERState
*s
;
275 s
= qemu_mallocz(sizeof(SLAVIO_TIMERState
));
281 s
->irq_timer
= qemu_new_timer(vm_clock
, slavio_timer_irq
, s
);
284 slavio_timer_io_memory
= cpu_register_io_memory(0, slavio_timer_mem_read
,
285 slavio_timer_mem_write
, s
);
286 cpu_register_physical_memory(addr
, TIMER_MAXADDR
, slavio_timer_io_memory
);
287 register_savevm("slavio_timer", addr
, 1, slavio_timer_save
, slavio_timer_load
, s
);
288 qemu_register_reset(slavio_timer_reset
, s
);
289 slavio_timer_reset(s
);