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1 /*
2 * SMBIOS Support
3 *
4 * Copyright (C) 2009 Hewlett-Packard Development Company, L.P.
5 * Copyright (C) 2013 Red Hat, Inc.
6 *
7 * Authors:
8 * Alex Williamson <alex.williamson@hp.com>
9 * Markus Armbruster <armbru@redhat.com>
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2. See
12 * the COPYING file in the top-level directory.
13 *
14 * Contributions after 2012-01-13 are licensed under the terms of the
15 * GNU GPL, version 2 or (at your option) any later version.
16 */
17
18 #include "qemu/osdep.h"
19 #include "qemu/units.h"
20 #include "qapi/error.h"
21 #include "qemu/config-file.h"
22 #include "qemu/error-report.h"
23 #include "qemu/module.h"
24 #include "qemu/option.h"
25 #include "sysemu/sysemu.h"
26 #include "qemu/uuid.h"
27 #include "hw/firmware/smbios.h"
28 #include "hw/loader.h"
29 #include "hw/boards.h"
30 #include "hw/pci/pci_bus.h"
31 #include "hw/pci/pci_device.h"
32 #include "smbios_build.h"
33
34 /* legacy structures and constants for <= 2.0 machines */
35 struct smbios_header {
36 uint16_t length;
37 uint8_t type;
38 } QEMU_PACKED;
39
40 struct smbios_field {
41 struct smbios_header header;
42 uint8_t type;
43 uint16_t offset;
44 uint8_t data[];
45 } QEMU_PACKED;
46
47 struct smbios_table {
48 struct smbios_header header;
49 uint8_t data[];
50 } QEMU_PACKED;
51
52 #define SMBIOS_FIELD_ENTRY 0
53 #define SMBIOS_TABLE_ENTRY 1
54
55 static uint8_t *smbios_entries;
56 static size_t smbios_entries_len;
57 static bool smbios_legacy = true;
58 static bool smbios_uuid_encoded = true;
59 /* end: legacy structures & constants for <= 2.0 machines */
60
61
62 uint8_t *smbios_tables;
63 size_t smbios_tables_len;
64 unsigned smbios_table_max;
65 unsigned smbios_table_cnt;
66 static SmbiosEntryPointType smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32;
67
68 static SmbiosEntryPoint ep;
69
70 static int smbios_type4_count = 0;
71 static bool smbios_immutable;
72 static bool smbios_have_defaults;
73 static uint32_t smbios_cpuid_version, smbios_cpuid_features, smbios_smp_sockets;
74
75 static DECLARE_BITMAP(have_binfile_bitmap, SMBIOS_MAX_TYPE+1);
76 static DECLARE_BITMAP(have_fields_bitmap, SMBIOS_MAX_TYPE+1);
77
78 static struct {
79 const char *vendor, *version, *date;
80 bool have_major_minor, uefi;
81 uint8_t major, minor;
82 } type0;
83
84 static struct {
85 const char *manufacturer, *product, *version, *serial, *sku, *family;
86 /* uuid is in qemu_uuid */
87 } type1;
88
89 static struct {
90 const char *manufacturer, *product, *version, *serial, *asset, *location;
91 } type2;
92
93 static struct {
94 const char *manufacturer, *version, *serial, *asset, *sku;
95 } type3;
96
97 /*
98 * SVVP requires max_speed and current_speed to be set and not being
99 * 0 which counts as unknown (SMBIOS 3.1.0/Table 21). Set the
100 * default value to 2000MHz as we did before.
101 */
102 #define DEFAULT_CPU_SPEED 2000
103
104 static struct {
105 const char *sock_pfx, *manufacturer, *version, *serial, *asset, *part;
106 uint64_t max_speed;
107 uint64_t current_speed;
108 uint64_t processor_id;
109 } type4 = {
110 .max_speed = DEFAULT_CPU_SPEED,
111 .current_speed = DEFAULT_CPU_SPEED,
112 .processor_id = 0,
113 };
114
115 struct type8_instance {
116 const char *internal_reference, *external_reference;
117 uint8_t connector_type, port_type;
118 QTAILQ_ENTRY(type8_instance) next;
119 };
120 static QTAILQ_HEAD(, type8_instance) type8 = QTAILQ_HEAD_INITIALIZER(type8);
121
122 static struct {
123 size_t nvalues;
124 char **values;
125 } type11;
126
127 static struct {
128 const char *loc_pfx, *bank, *manufacturer, *serial, *asset, *part;
129 uint16_t speed;
130 } type17;
131
132 static QEnumLookup type41_kind_lookup = {
133 .array = (const char *const[]) {
134 "other",
135 "unknown",
136 "video",
137 "scsi",
138 "ethernet",
139 "tokenring",
140 "sound",
141 "pata",
142 "sata",
143 "sas",
144 },
145 .size = 10
146 };
147 struct type41_instance {
148 const char *designation, *pcidev;
149 uint8_t instance, kind;
150 QTAILQ_ENTRY(type41_instance) next;
151 };
152 static QTAILQ_HEAD(, type41_instance) type41 = QTAILQ_HEAD_INITIALIZER(type41);
153
154 static QemuOptsList qemu_smbios_opts = {
155 .name = "smbios",
156 .head = QTAILQ_HEAD_INITIALIZER(qemu_smbios_opts.head),
157 .desc = {
158 /*
159 * no elements => accept any params
160 * validation will happen later
161 */
162 { /* end of list */ }
163 }
164 };
165
166 static const QemuOptDesc qemu_smbios_file_opts[] = {
167 {
168 .name = "file",
169 .type = QEMU_OPT_STRING,
170 .help = "binary file containing an SMBIOS element",
171 },
172 { /* end of list */ }
173 };
174
175 static const QemuOptDesc qemu_smbios_type0_opts[] = {
176 {
177 .name = "type",
178 .type = QEMU_OPT_NUMBER,
179 .help = "SMBIOS element type",
180 },{
181 .name = "vendor",
182 .type = QEMU_OPT_STRING,
183 .help = "vendor name",
184 },{
185 .name = "version",
186 .type = QEMU_OPT_STRING,
187 .help = "version number",
188 },{
189 .name = "date",
190 .type = QEMU_OPT_STRING,
191 .help = "release date",
192 },{
193 .name = "release",
194 .type = QEMU_OPT_STRING,
195 .help = "revision number",
196 },{
197 .name = "uefi",
198 .type = QEMU_OPT_BOOL,
199 .help = "uefi support",
200 },
201 { /* end of list */ }
202 };
203
204 static const QemuOptDesc qemu_smbios_type1_opts[] = {
205 {
206 .name = "type",
207 .type = QEMU_OPT_NUMBER,
208 .help = "SMBIOS element type",
209 },{
210 .name = "manufacturer",
211 .type = QEMU_OPT_STRING,
212 .help = "manufacturer name",
213 },{
214 .name = "product",
215 .type = QEMU_OPT_STRING,
216 .help = "product name",
217 },{
218 .name = "version",
219 .type = QEMU_OPT_STRING,
220 .help = "version number",
221 },{
222 .name = "serial",
223 .type = QEMU_OPT_STRING,
224 .help = "serial number",
225 },{
226 .name = "uuid",
227 .type = QEMU_OPT_STRING,
228 .help = "UUID",
229 },{
230 .name = "sku",
231 .type = QEMU_OPT_STRING,
232 .help = "SKU number",
233 },{
234 .name = "family",
235 .type = QEMU_OPT_STRING,
236 .help = "family name",
237 },
238 { /* end of list */ }
239 };
240
241 static const QemuOptDesc qemu_smbios_type2_opts[] = {
242 {
243 .name = "type",
244 .type = QEMU_OPT_NUMBER,
245 .help = "SMBIOS element type",
246 },{
247 .name = "manufacturer",
248 .type = QEMU_OPT_STRING,
249 .help = "manufacturer name",
250 },{
251 .name = "product",
252 .type = QEMU_OPT_STRING,
253 .help = "product name",
254 },{
255 .name = "version",
256 .type = QEMU_OPT_STRING,
257 .help = "version number",
258 },{
259 .name = "serial",
260 .type = QEMU_OPT_STRING,
261 .help = "serial number",
262 },{
263 .name = "asset",
264 .type = QEMU_OPT_STRING,
265 .help = "asset tag number",
266 },{
267 .name = "location",
268 .type = QEMU_OPT_STRING,
269 .help = "location in chassis",
270 },
271 { /* end of list */ }
272 };
273
274 static const QemuOptDesc qemu_smbios_type3_opts[] = {
275 {
276 .name = "type",
277 .type = QEMU_OPT_NUMBER,
278 .help = "SMBIOS element type",
279 },{
280 .name = "manufacturer",
281 .type = QEMU_OPT_STRING,
282 .help = "manufacturer name",
283 },{
284 .name = "version",
285 .type = QEMU_OPT_STRING,
286 .help = "version number",
287 },{
288 .name = "serial",
289 .type = QEMU_OPT_STRING,
290 .help = "serial number",
291 },{
292 .name = "asset",
293 .type = QEMU_OPT_STRING,
294 .help = "asset tag number",
295 },{
296 .name = "sku",
297 .type = QEMU_OPT_STRING,
298 .help = "SKU number",
299 },
300 { /* end of list */ }
301 };
302
303 static const QemuOptDesc qemu_smbios_type4_opts[] = {
304 {
305 .name = "type",
306 .type = QEMU_OPT_NUMBER,
307 .help = "SMBIOS element type",
308 },{
309 .name = "sock_pfx",
310 .type = QEMU_OPT_STRING,
311 .help = "socket designation string prefix",
312 },{
313 .name = "manufacturer",
314 .type = QEMU_OPT_STRING,
315 .help = "manufacturer name",
316 },{
317 .name = "version",
318 .type = QEMU_OPT_STRING,
319 .help = "version number",
320 },{
321 .name = "max-speed",
322 .type = QEMU_OPT_NUMBER,
323 .help = "max speed in MHz",
324 },{
325 .name = "current-speed",
326 .type = QEMU_OPT_NUMBER,
327 .help = "speed at system boot in MHz",
328 },{
329 .name = "serial",
330 .type = QEMU_OPT_STRING,
331 .help = "serial number",
332 },{
333 .name = "asset",
334 .type = QEMU_OPT_STRING,
335 .help = "asset tag number",
336 },{
337 .name = "part",
338 .type = QEMU_OPT_STRING,
339 .help = "part number",
340 }, {
341 .name = "processor-id",
342 .type = QEMU_OPT_NUMBER,
343 .help = "processor id",
344 },
345 { /* end of list */ }
346 };
347
348 static const QemuOptDesc qemu_smbios_type8_opts[] = {
349 {
350 .name = "internal_reference",
351 .type = QEMU_OPT_STRING,
352 .help = "internal reference designator",
353 },
354 {
355 .name = "external_reference",
356 .type = QEMU_OPT_STRING,
357 .help = "external reference designator",
358 },
359 {
360 .name = "connector_type",
361 .type = QEMU_OPT_NUMBER,
362 .help = "connector type",
363 },
364 {
365 .name = "port_type",
366 .type = QEMU_OPT_NUMBER,
367 .help = "port type",
368 },
369 };
370
371 static const QemuOptDesc qemu_smbios_type11_opts[] = {
372 {
373 .name = "value",
374 .type = QEMU_OPT_STRING,
375 .help = "OEM string data",
376 },
377 {
378 .name = "path",
379 .type = QEMU_OPT_STRING,
380 .help = "OEM string data from file",
381 },
382 };
383
384 static const QemuOptDesc qemu_smbios_type17_opts[] = {
385 {
386 .name = "type",
387 .type = QEMU_OPT_NUMBER,
388 .help = "SMBIOS element type",
389 },{
390 .name = "loc_pfx",
391 .type = QEMU_OPT_STRING,
392 .help = "device locator string prefix",
393 },{
394 .name = "bank",
395 .type = QEMU_OPT_STRING,
396 .help = "bank locator string",
397 },{
398 .name = "manufacturer",
399 .type = QEMU_OPT_STRING,
400 .help = "manufacturer name",
401 },{
402 .name = "serial",
403 .type = QEMU_OPT_STRING,
404 .help = "serial number",
405 },{
406 .name = "asset",
407 .type = QEMU_OPT_STRING,
408 .help = "asset tag number",
409 },{
410 .name = "part",
411 .type = QEMU_OPT_STRING,
412 .help = "part number",
413 },{
414 .name = "speed",
415 .type = QEMU_OPT_NUMBER,
416 .help = "maximum capable speed",
417 },
418 { /* end of list */ }
419 };
420
421 static const QemuOptDesc qemu_smbios_type41_opts[] = {
422 {
423 .name = "type",
424 .type = QEMU_OPT_NUMBER,
425 .help = "SMBIOS element type",
426 },{
427 .name = "designation",
428 .type = QEMU_OPT_STRING,
429 .help = "reference designation string",
430 },{
431 .name = "kind",
432 .type = QEMU_OPT_STRING,
433 .help = "device type",
434 .def_value_str = "other",
435 },{
436 .name = "instance",
437 .type = QEMU_OPT_NUMBER,
438 .help = "device type instance",
439 },{
440 .name = "pcidev",
441 .type = QEMU_OPT_STRING,
442 .help = "PCI device",
443 },
444 { /* end of list */ }
445 };
446
447 static void smbios_register_config(void)
448 {
449 qemu_add_opts(&qemu_smbios_opts);
450 }
451
452 opts_init(smbios_register_config);
453
454 /*
455 * The SMBIOS 2.1 "structure table length" field in the
456 * entry point uses a 16-bit integer, so we're limited
457 * in total table size
458 */
459 #define SMBIOS_21_MAX_TABLES_LEN 0xffff
460
461 static void smbios_validate_table(MachineState *ms)
462 {
463 uint32_t expect_t4_count = smbios_legacy ?
464 ms->smp.cpus : smbios_smp_sockets;
465
466 if (smbios_type4_count && smbios_type4_count != expect_t4_count) {
467 error_report("Expected %d SMBIOS Type 4 tables, got %d instead",
468 expect_t4_count, smbios_type4_count);
469 exit(1);
470 }
471
472 if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_32 &&
473 smbios_tables_len > SMBIOS_21_MAX_TABLES_LEN) {
474 error_report("SMBIOS 2.1 table length %zu exceeds %d",
475 smbios_tables_len, SMBIOS_21_MAX_TABLES_LEN);
476 exit(1);
477 }
478 }
479
480
481 /* legacy setup functions for <= 2.0 machines */
482 static void smbios_add_field(int type, int offset, const void *data, size_t len)
483 {
484 struct smbios_field *field;
485
486 if (!smbios_entries) {
487 smbios_entries_len = sizeof(uint16_t);
488 smbios_entries = g_malloc0(smbios_entries_len);
489 }
490 smbios_entries = g_realloc(smbios_entries, smbios_entries_len +
491 sizeof(*field) + len);
492 field = (struct smbios_field *)(smbios_entries + smbios_entries_len);
493 field->header.type = SMBIOS_FIELD_ENTRY;
494 field->header.length = cpu_to_le16(sizeof(*field) + len);
495
496 field->type = type;
497 field->offset = cpu_to_le16(offset);
498 memcpy(field->data, data, len);
499
500 smbios_entries_len += sizeof(*field) + len;
501 (*(uint16_t *)smbios_entries) =
502 cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1);
503 }
504
505 static void smbios_maybe_add_str(int type, int offset, const char *data)
506 {
507 if (data) {
508 smbios_add_field(type, offset, data, strlen(data) + 1);
509 }
510 }
511
512 static void smbios_build_type_0_fields(void)
513 {
514 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, vendor_str),
515 type0.vendor);
516 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, bios_version_str),
517 type0.version);
518 smbios_maybe_add_str(0, offsetof(struct smbios_type_0,
519 bios_release_date_str),
520 type0.date);
521 if (type0.have_major_minor) {
522 smbios_add_field(0, offsetof(struct smbios_type_0,
523 system_bios_major_release),
524 &type0.major, 1);
525 smbios_add_field(0, offsetof(struct smbios_type_0,
526 system_bios_minor_release),
527 &type0.minor, 1);
528 }
529 }
530
531 static void smbios_build_type_1_fields(void)
532 {
533 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, manufacturer_str),
534 type1.manufacturer);
535 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, product_name_str),
536 type1.product);
537 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, version_str),
538 type1.version);
539 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, serial_number_str),
540 type1.serial);
541 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, sku_number_str),
542 type1.sku);
543 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, family_str),
544 type1.family);
545 if (qemu_uuid_set) {
546 /* We don't encode the UUID in the "wire format" here because this
547 * function is for legacy mode and needs to keep the guest ABI, and
548 * because we don't know what's the SMBIOS version advertised by the
549 * BIOS.
550 */
551 smbios_add_field(1, offsetof(struct smbios_type_1, uuid),
552 &qemu_uuid, 16);
553 }
554 }
555
556 uint8_t *smbios_get_table_legacy(MachineState *ms, size_t *length)
557 {
558 if (!smbios_legacy) {
559 *length = 0;
560 return NULL;
561 }
562
563 if (!smbios_immutable) {
564 smbios_build_type_0_fields();
565 smbios_build_type_1_fields();
566 smbios_validate_table(ms);
567 smbios_immutable = true;
568 }
569 *length = smbios_entries_len;
570 return smbios_entries;
571 }
572 /* end: legacy setup functions for <= 2.0 machines */
573
574
575 bool smbios_skip_table(uint8_t type, bool required_table)
576 {
577 if (test_bit(type, have_binfile_bitmap)) {
578 return true; /* user provided their own binary blob(s) */
579 }
580 if (test_bit(type, have_fields_bitmap)) {
581 return false; /* user provided fields via command line */
582 }
583 if (smbios_have_defaults && required_table) {
584 return false; /* we're building tables, and this one's required */
585 }
586 return true;
587 }
588
589 #define T0_BASE 0x000
590 #define T1_BASE 0x100
591 #define T2_BASE 0x200
592 #define T3_BASE 0x300
593 #define T4_BASE 0x400
594 #define T11_BASE 0xe00
595
596 #define T16_BASE 0x1000
597 #define T17_BASE 0x1100
598 #define T19_BASE 0x1300
599 #define T32_BASE 0x2000
600 #define T41_BASE 0x2900
601 #define T127_BASE 0x7F00
602
603 static void smbios_build_type_0_table(void)
604 {
605 SMBIOS_BUILD_TABLE_PRE(0, T0_BASE, false); /* optional, leave up to BIOS */
606
607 SMBIOS_TABLE_SET_STR(0, vendor_str, type0.vendor);
608 SMBIOS_TABLE_SET_STR(0, bios_version_str, type0.version);
609
610 t->bios_starting_address_segment = cpu_to_le16(0xE800); /* from SeaBIOS */
611
612 SMBIOS_TABLE_SET_STR(0, bios_release_date_str, type0.date);
613
614 t->bios_rom_size = 0; /* hardcoded in SeaBIOS with FIXME comment */
615
616 t->bios_characteristics = cpu_to_le64(0x08); /* Not supported */
617 t->bios_characteristics_extension_bytes[0] = 0;
618 t->bios_characteristics_extension_bytes[1] = 0x14; /* TCD/SVVP | VM */
619 if (type0.uefi) {
620 t->bios_characteristics_extension_bytes[1] |= 0x08; /* |= UEFI */
621 }
622
623 if (type0.have_major_minor) {
624 t->system_bios_major_release = type0.major;
625 t->system_bios_minor_release = type0.minor;
626 } else {
627 t->system_bios_major_release = 0;
628 t->system_bios_minor_release = 0;
629 }
630
631 /* hardcoded in SeaBIOS */
632 t->embedded_controller_major_release = 0xFF;
633 t->embedded_controller_minor_release = 0xFF;
634
635 SMBIOS_BUILD_TABLE_POST;
636 }
637
638 /* Encode UUID from the big endian encoding described on RFC4122 to the wire
639 * format specified by SMBIOS version 2.6.
640 */
641 static void smbios_encode_uuid(struct smbios_uuid *uuid, QemuUUID *in)
642 {
643 memcpy(uuid, in, 16);
644 if (smbios_uuid_encoded) {
645 uuid->time_low = bswap32(uuid->time_low);
646 uuid->time_mid = bswap16(uuid->time_mid);
647 uuid->time_hi_and_version = bswap16(uuid->time_hi_and_version);
648 }
649 }
650
651 static void smbios_build_type_1_table(void)
652 {
653 SMBIOS_BUILD_TABLE_PRE(1, T1_BASE, true); /* required */
654
655 SMBIOS_TABLE_SET_STR(1, manufacturer_str, type1.manufacturer);
656 SMBIOS_TABLE_SET_STR(1, product_name_str, type1.product);
657 SMBIOS_TABLE_SET_STR(1, version_str, type1.version);
658 SMBIOS_TABLE_SET_STR(1, serial_number_str, type1.serial);
659 if (qemu_uuid_set) {
660 smbios_encode_uuid(&t->uuid, &qemu_uuid);
661 } else {
662 memset(&t->uuid, 0, 16);
663 }
664 t->wake_up_type = 0x06; /* power switch */
665 SMBIOS_TABLE_SET_STR(1, sku_number_str, type1.sku);
666 SMBIOS_TABLE_SET_STR(1, family_str, type1.family);
667
668 SMBIOS_BUILD_TABLE_POST;
669 }
670
671 static void smbios_build_type_2_table(void)
672 {
673 SMBIOS_BUILD_TABLE_PRE(2, T2_BASE, false); /* optional */
674
675 SMBIOS_TABLE_SET_STR(2, manufacturer_str, type2.manufacturer);
676 SMBIOS_TABLE_SET_STR(2, product_str, type2.product);
677 SMBIOS_TABLE_SET_STR(2, version_str, type2.version);
678 SMBIOS_TABLE_SET_STR(2, serial_number_str, type2.serial);
679 SMBIOS_TABLE_SET_STR(2, asset_tag_number_str, type2.asset);
680 t->feature_flags = 0x01; /* Motherboard */
681 SMBIOS_TABLE_SET_STR(2, location_str, type2.location);
682 t->chassis_handle = cpu_to_le16(0x300); /* Type 3 (System enclosure) */
683 t->board_type = 0x0A; /* Motherboard */
684 t->contained_element_count = 0;
685
686 SMBIOS_BUILD_TABLE_POST;
687 }
688
689 static void smbios_build_type_3_table(void)
690 {
691 SMBIOS_BUILD_TABLE_PRE(3, T3_BASE, true); /* required */
692
693 SMBIOS_TABLE_SET_STR(3, manufacturer_str, type3.manufacturer);
694 t->type = 0x01; /* Other */
695 SMBIOS_TABLE_SET_STR(3, version_str, type3.version);
696 SMBIOS_TABLE_SET_STR(3, serial_number_str, type3.serial);
697 SMBIOS_TABLE_SET_STR(3, asset_tag_number_str, type3.asset);
698 t->boot_up_state = 0x03; /* Safe */
699 t->power_supply_state = 0x03; /* Safe */
700 t->thermal_state = 0x03; /* Safe */
701 t->security_status = 0x02; /* Unknown */
702 t->oem_defined = cpu_to_le32(0);
703 t->height = 0;
704 t->number_of_power_cords = 0;
705 t->contained_element_count = 0;
706 t->contained_element_record_length = 0;
707 SMBIOS_TABLE_SET_STR(3, sku_number_str, type3.sku);
708
709 SMBIOS_BUILD_TABLE_POST;
710 }
711
712 static void smbios_build_type_4_table(MachineState *ms, unsigned instance)
713 {
714 char sock_str[128];
715 size_t tbl_len = SMBIOS_TYPE_4_LEN_V28;
716
717 if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_64) {
718 tbl_len = SMBIOS_TYPE_4_LEN_V30;
719 }
720
721 SMBIOS_BUILD_TABLE_PRE_SIZE(4, T4_BASE + instance,
722 true, tbl_len); /* required */
723
724 snprintf(sock_str, sizeof(sock_str), "%s%2x", type4.sock_pfx, instance);
725 SMBIOS_TABLE_SET_STR(4, socket_designation_str, sock_str);
726 t->processor_type = 0x03; /* CPU */
727 t->processor_family = 0x01; /* Other */
728 SMBIOS_TABLE_SET_STR(4, processor_manufacturer_str, type4.manufacturer);
729 if (type4.processor_id == 0) {
730 t->processor_id[0] = cpu_to_le32(smbios_cpuid_version);
731 t->processor_id[1] = cpu_to_le32(smbios_cpuid_features);
732 } else {
733 t->processor_id[0] = cpu_to_le32((uint32_t)type4.processor_id);
734 t->processor_id[1] = cpu_to_le32(type4.processor_id >> 32);
735 }
736 SMBIOS_TABLE_SET_STR(4, processor_version_str, type4.version);
737 t->voltage = 0;
738 t->external_clock = cpu_to_le16(0); /* Unknown */
739 t->max_speed = cpu_to_le16(type4.max_speed);
740 t->current_speed = cpu_to_le16(type4.current_speed);
741 t->status = 0x41; /* Socket populated, CPU enabled */
742 t->processor_upgrade = 0x01; /* Other */
743 t->l1_cache_handle = cpu_to_le16(0xFFFF); /* N/A */
744 t->l2_cache_handle = cpu_to_le16(0xFFFF); /* N/A */
745 t->l3_cache_handle = cpu_to_le16(0xFFFF); /* N/A */
746 SMBIOS_TABLE_SET_STR(4, serial_number_str, type4.serial);
747 SMBIOS_TABLE_SET_STR(4, asset_tag_number_str, type4.asset);
748 SMBIOS_TABLE_SET_STR(4, part_number_str, type4.part);
749
750 t->core_count = (ms->smp.cores > 255) ? 0xFF : ms->smp.cores;
751 t->core_enabled = t->core_count;
752
753 t->thread_count = (ms->smp.threads > 255) ? 0xFF : ms->smp.threads;
754
755 t->processor_characteristics = cpu_to_le16(0x02); /* Unknown */
756 t->processor_family2 = cpu_to_le16(0x01); /* Other */
757
758 if (tbl_len == SMBIOS_TYPE_4_LEN_V30) {
759 t->core_count2 = t->core_enabled2 = cpu_to_le16(ms->smp.cores);
760 t->thread_count2 = cpu_to_le16(ms->smp.threads);
761 }
762
763 SMBIOS_BUILD_TABLE_POST;
764 smbios_type4_count++;
765 }
766
767 static void smbios_build_type_8_table(void)
768 {
769 unsigned instance = 0;
770 struct type8_instance *t8;
771
772 QTAILQ_FOREACH(t8, &type8, next) {
773 SMBIOS_BUILD_TABLE_PRE(8, T0_BASE + instance, true);
774
775 SMBIOS_TABLE_SET_STR(8, internal_reference_str, t8->internal_reference);
776 SMBIOS_TABLE_SET_STR(8, external_reference_str, t8->external_reference);
777 /* most vendors seem to set this to None */
778 t->internal_connector_type = 0x0;
779 t->external_connector_type = t8->connector_type;
780 t->port_type = t8->port_type;
781
782 SMBIOS_BUILD_TABLE_POST;
783 instance++;
784 }
785 }
786
787 static void smbios_build_type_11_table(void)
788 {
789 char count_str[128];
790 size_t i;
791
792 if (type11.nvalues == 0) {
793 return;
794 }
795
796 SMBIOS_BUILD_TABLE_PRE(11, T11_BASE, true); /* required */
797
798 snprintf(count_str, sizeof(count_str), "%zu", type11.nvalues);
799 t->count = type11.nvalues;
800
801 for (i = 0; i < type11.nvalues; i++) {
802 SMBIOS_TABLE_SET_STR_LIST(11, type11.values[i]);
803 g_free(type11.values[i]);
804 type11.values[i] = NULL;
805 }
806
807 SMBIOS_BUILD_TABLE_POST;
808 }
809
810 #define MAX_T16_STD_SZ 0x80000000 /* 2T in Kilobytes */
811
812 static void smbios_build_type_16_table(unsigned dimm_cnt)
813 {
814 uint64_t size_kb;
815
816 SMBIOS_BUILD_TABLE_PRE(16, T16_BASE, true); /* required */
817
818 t->location = 0x01; /* Other */
819 t->use = 0x03; /* System memory */
820 t->error_correction = 0x06; /* Multi-bit ECC (for Microsoft, per SeaBIOS) */
821 size_kb = QEMU_ALIGN_UP(current_machine->ram_size, KiB) / KiB;
822 if (size_kb < MAX_T16_STD_SZ) {
823 t->maximum_capacity = cpu_to_le32(size_kb);
824 t->extended_maximum_capacity = cpu_to_le64(0);
825 } else {
826 t->maximum_capacity = cpu_to_le32(MAX_T16_STD_SZ);
827 t->extended_maximum_capacity = cpu_to_le64(current_machine->ram_size);
828 }
829 t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */
830 t->number_of_memory_devices = cpu_to_le16(dimm_cnt);
831
832 SMBIOS_BUILD_TABLE_POST;
833 }
834
835 #define MAX_T17_STD_SZ 0x7FFF /* (32G - 1M), in Megabytes */
836 #define MAX_T17_EXT_SZ 0x80000000 /* 2P, in Megabytes */
837
838 static void smbios_build_type_17_table(unsigned instance, uint64_t size)
839 {
840 char loc_str[128];
841 uint64_t size_mb;
842
843 SMBIOS_BUILD_TABLE_PRE(17, T17_BASE + instance, true); /* required */
844
845 t->physical_memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */
846 t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */
847 t->total_width = cpu_to_le16(0xFFFF); /* Unknown */
848 t->data_width = cpu_to_le16(0xFFFF); /* Unknown */
849 size_mb = QEMU_ALIGN_UP(size, MiB) / MiB;
850 if (size_mb < MAX_T17_STD_SZ) {
851 t->size = cpu_to_le16(size_mb);
852 t->extended_size = cpu_to_le32(0);
853 } else {
854 assert(size_mb < MAX_T17_EXT_SZ);
855 t->size = cpu_to_le16(MAX_T17_STD_SZ);
856 t->extended_size = cpu_to_le32(size_mb);
857 }
858 t->form_factor = 0x09; /* DIMM */
859 t->device_set = 0; /* Not in a set */
860 snprintf(loc_str, sizeof(loc_str), "%s %d", type17.loc_pfx, instance);
861 SMBIOS_TABLE_SET_STR(17, device_locator_str, loc_str);
862 SMBIOS_TABLE_SET_STR(17, bank_locator_str, type17.bank);
863 t->memory_type = 0x07; /* RAM */
864 t->type_detail = cpu_to_le16(0x02); /* Other */
865 t->speed = cpu_to_le16(type17.speed);
866 SMBIOS_TABLE_SET_STR(17, manufacturer_str, type17.manufacturer);
867 SMBIOS_TABLE_SET_STR(17, serial_number_str, type17.serial);
868 SMBIOS_TABLE_SET_STR(17, asset_tag_number_str, type17.asset);
869 SMBIOS_TABLE_SET_STR(17, part_number_str, type17.part);
870 t->attributes = 0; /* Unknown */
871 t->configured_clock_speed = t->speed; /* reuse value for max speed */
872 t->minimum_voltage = cpu_to_le16(0); /* Unknown */
873 t->maximum_voltage = cpu_to_le16(0); /* Unknown */
874 t->configured_voltage = cpu_to_le16(0); /* Unknown */
875
876 SMBIOS_BUILD_TABLE_POST;
877 }
878
879 static void smbios_build_type_19_table(unsigned instance, unsigned offset,
880 uint64_t start, uint64_t size)
881 {
882 uint64_t end, start_kb, end_kb;
883
884 SMBIOS_BUILD_TABLE_PRE(19, T19_BASE + offset + instance,
885 true); /* required */
886
887 end = start + size - 1;
888 assert(end > start);
889 start_kb = start / KiB;
890 end_kb = end / KiB;
891 if (start_kb < UINT32_MAX && end_kb < UINT32_MAX) {
892 t->starting_address = cpu_to_le32(start_kb);
893 t->ending_address = cpu_to_le32(end_kb);
894 t->extended_starting_address =
895 t->extended_ending_address = cpu_to_le64(0);
896 } else {
897 t->starting_address = t->ending_address = cpu_to_le32(UINT32_MAX);
898 t->extended_starting_address = cpu_to_le64(start);
899 t->extended_ending_address = cpu_to_le64(end);
900 }
901 t->memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */
902 t->partition_width = 1; /* One device per row */
903
904 SMBIOS_BUILD_TABLE_POST;
905 }
906
907 static void smbios_build_type_32_table(void)
908 {
909 SMBIOS_BUILD_TABLE_PRE(32, T32_BASE, true); /* required */
910
911 memset(t->reserved, 0, 6);
912 t->boot_status = 0; /* No errors detected */
913
914 SMBIOS_BUILD_TABLE_POST;
915 }
916
917 static void smbios_build_type_41_table(Error **errp)
918 {
919 unsigned instance = 0;
920 struct type41_instance *t41;
921
922 QTAILQ_FOREACH(t41, &type41, next) {
923 SMBIOS_BUILD_TABLE_PRE(41, T41_BASE + instance, true);
924
925 SMBIOS_TABLE_SET_STR(41, reference_designation_str, t41->designation);
926 t->device_type = t41->kind;
927 t->device_type_instance = t41->instance;
928 t->segment_group_number = cpu_to_le16(0);
929 t->bus_number = 0;
930 t->device_number = 0;
931
932 if (t41->pcidev) {
933 PCIDevice *pdev = NULL;
934 int rc = pci_qdev_find_device(t41->pcidev, &pdev);
935 if (rc != 0) {
936 error_setg(errp,
937 "No PCI device %s for SMBIOS type 41 entry %s",
938 t41->pcidev, t41->designation);
939 return;
940 }
941 /*
942 * We only handle the case were the device is attached to
943 * the PCI root bus. The general case is more complex as
944 * bridges are enumerated later and the table would need
945 * to be updated at this moment.
946 */
947 if (!pci_bus_is_root(pci_get_bus(pdev))) {
948 error_setg(errp,
949 "Cannot create type 41 entry for PCI device %s: "
950 "not attached to the root bus",
951 t41->pcidev);
952 return;
953 }
954 t->segment_group_number = cpu_to_le16(0);
955 t->bus_number = pci_dev_bus_num(pdev);
956 t->device_number = pdev->devfn;
957 }
958
959 SMBIOS_BUILD_TABLE_POST;
960 instance++;
961 }
962 }
963
964 static void smbios_build_type_127_table(void)
965 {
966 SMBIOS_BUILD_TABLE_PRE(127, T127_BASE, true); /* required */
967 SMBIOS_BUILD_TABLE_POST;
968 }
969
970 void smbios_set_cpuid(uint32_t version, uint32_t features)
971 {
972 smbios_cpuid_version = version;
973 smbios_cpuid_features = features;
974 }
975
976 #define SMBIOS_SET_DEFAULT(field, value) \
977 if (!field) { \
978 field = value; \
979 }
980
981 void smbios_set_defaults(const char *manufacturer, const char *product,
982 const char *version, bool legacy_mode,
983 bool uuid_encoded, SmbiosEntryPointType ep_type)
984 {
985 smbios_have_defaults = true;
986 smbios_legacy = legacy_mode;
987 smbios_uuid_encoded = uuid_encoded;
988 smbios_ep_type = ep_type;
989
990 /* drop unwanted version of command-line file blob(s) */
991 if (smbios_legacy) {
992 g_free(smbios_tables);
993 /* in legacy mode, also complain if fields were given for types > 1 */
994 if (find_next_bit(have_fields_bitmap,
995 SMBIOS_MAX_TYPE+1, 2) < SMBIOS_MAX_TYPE+1) {
996 error_report("can't process fields for smbios "
997 "types > 1 on machine versions < 2.1!");
998 exit(1);
999 }
1000 } else {
1001 g_free(smbios_entries);
1002 }
1003
1004 SMBIOS_SET_DEFAULT(type1.manufacturer, manufacturer);
1005 SMBIOS_SET_DEFAULT(type1.product, product);
1006 SMBIOS_SET_DEFAULT(type1.version, version);
1007 SMBIOS_SET_DEFAULT(type2.manufacturer, manufacturer);
1008 SMBIOS_SET_DEFAULT(type2.product, product);
1009 SMBIOS_SET_DEFAULT(type2.version, version);
1010 SMBIOS_SET_DEFAULT(type3.manufacturer, manufacturer);
1011 SMBIOS_SET_DEFAULT(type3.version, version);
1012 SMBIOS_SET_DEFAULT(type4.sock_pfx, "CPU");
1013 SMBIOS_SET_DEFAULT(type4.manufacturer, manufacturer);
1014 SMBIOS_SET_DEFAULT(type4.version, version);
1015 SMBIOS_SET_DEFAULT(type17.loc_pfx, "DIMM");
1016 SMBIOS_SET_DEFAULT(type17.manufacturer, manufacturer);
1017 }
1018
1019 static void smbios_entry_point_setup(void)
1020 {
1021 switch (smbios_ep_type) {
1022 case SMBIOS_ENTRY_POINT_TYPE_32:
1023 memcpy(ep.ep21.anchor_string, "_SM_", 4);
1024 memcpy(ep.ep21.intermediate_anchor_string, "_DMI_", 5);
1025 ep.ep21.length = sizeof(struct smbios_21_entry_point);
1026 ep.ep21.entry_point_revision = 0; /* formatted_area reserved */
1027 memset(ep.ep21.formatted_area, 0, 5);
1028
1029 /* compliant with smbios spec v2.8 */
1030 ep.ep21.smbios_major_version = 2;
1031 ep.ep21.smbios_minor_version = 8;
1032 ep.ep21.smbios_bcd_revision = 0x28;
1033
1034 /* set during table construction, but BIOS may override: */
1035 ep.ep21.structure_table_length = cpu_to_le16(smbios_tables_len);
1036 ep.ep21.max_structure_size = cpu_to_le16(smbios_table_max);
1037 ep.ep21.number_of_structures = cpu_to_le16(smbios_table_cnt);
1038
1039 /* BIOS must recalculate */
1040 ep.ep21.checksum = 0;
1041 ep.ep21.intermediate_checksum = 0;
1042 ep.ep21.structure_table_address = cpu_to_le32(0);
1043
1044 break;
1045 case SMBIOS_ENTRY_POINT_TYPE_64:
1046 memcpy(ep.ep30.anchor_string, "_SM3_", 5);
1047 ep.ep30.length = sizeof(struct smbios_30_entry_point);
1048 ep.ep30.entry_point_revision = 1;
1049 ep.ep30.reserved = 0;
1050
1051 /* compliant with smbios spec 3.0 */
1052 ep.ep30.smbios_major_version = 3;
1053 ep.ep30.smbios_minor_version = 0;
1054 ep.ep30.smbios_doc_rev = 0;
1055
1056 /* set during table construct, but BIOS might override */
1057 ep.ep30.structure_table_max_size = cpu_to_le32(smbios_tables_len);
1058
1059 /* BIOS must recalculate */
1060 ep.ep30.checksum = 0;
1061 ep.ep30.structure_table_address = cpu_to_le64(0);
1062
1063 break;
1064 default:
1065 abort();
1066 break;
1067 }
1068 }
1069
1070 void smbios_get_tables(MachineState *ms,
1071 const struct smbios_phys_mem_area *mem_array,
1072 const unsigned int mem_array_size,
1073 uint8_t **tables, size_t *tables_len,
1074 uint8_t **anchor, size_t *anchor_len,
1075 Error **errp)
1076 {
1077 unsigned i, dimm_cnt, offset;
1078
1079 if (smbios_legacy) {
1080 *tables = *anchor = NULL;
1081 *tables_len = *anchor_len = 0;
1082 return;
1083 }
1084
1085 if (!smbios_immutable) {
1086 smbios_build_type_0_table();
1087 smbios_build_type_1_table();
1088 smbios_build_type_2_table();
1089 smbios_build_type_3_table();
1090
1091 smbios_smp_sockets = DIV_ROUND_UP(ms->smp.cpus,
1092 ms->smp.cores * ms->smp.threads);
1093 assert(smbios_smp_sockets >= 1);
1094
1095 for (i = 0; i < smbios_smp_sockets; i++) {
1096 smbios_build_type_4_table(ms, i);
1097 }
1098
1099 smbios_build_type_8_table();
1100 smbios_build_type_11_table();
1101
1102 #define MAX_DIMM_SZ (16 * GiB)
1103 #define GET_DIMM_SZ ((i < dimm_cnt - 1) ? MAX_DIMM_SZ \
1104 : ((current_machine->ram_size - 1) % MAX_DIMM_SZ) + 1)
1105
1106 dimm_cnt = QEMU_ALIGN_UP(current_machine->ram_size, MAX_DIMM_SZ) / MAX_DIMM_SZ;
1107
1108 /*
1109 * The offset determines if we need to keep additional space betweeen
1110 * table 17 and table 19 header handle numbers so that they do
1111 * not overlap. For example, for a VM with larger than 8 TB guest
1112 * memory and DIMM like chunks of 16 GiB, the default space between
1113 * the two tables (T19_BASE - T17_BASE = 512) is not enough.
1114 */
1115 offset = (dimm_cnt > (T19_BASE - T17_BASE)) ? \
1116 dimm_cnt - (T19_BASE - T17_BASE) : 0;
1117
1118 smbios_build_type_16_table(dimm_cnt);
1119
1120 for (i = 0; i < dimm_cnt; i++) {
1121 smbios_build_type_17_table(i, GET_DIMM_SZ);
1122 }
1123
1124 for (i = 0; i < mem_array_size; i++) {
1125 smbios_build_type_19_table(i, offset, mem_array[i].address,
1126 mem_array[i].length);
1127 }
1128
1129 /*
1130 * make sure 16 bit handle numbers in the headers of tables 19
1131 * and 32 do not overlap.
1132 */
1133 assert((mem_array_size + offset) < (T32_BASE - T19_BASE));
1134
1135 smbios_build_type_32_table();
1136 smbios_build_type_38_table();
1137 smbios_build_type_41_table(errp);
1138 smbios_build_type_127_table();
1139
1140 smbios_validate_table(ms);
1141 smbios_entry_point_setup();
1142 smbios_immutable = true;
1143 }
1144
1145 /* return tables blob and entry point (anchor), and their sizes */
1146 *tables = smbios_tables;
1147 *tables_len = smbios_tables_len;
1148 *anchor = (uint8_t *)&ep;
1149
1150 /* calculate length based on anchor string */
1151 if (!strncmp((char *)&ep, "_SM_", 4)) {
1152 *anchor_len = sizeof(struct smbios_21_entry_point);
1153 } else if (!strncmp((char *)&ep, "_SM3_", 5)) {
1154 *anchor_len = sizeof(struct smbios_30_entry_point);
1155 } else {
1156 abort();
1157 }
1158 }
1159
1160 static void save_opt(const char **dest, QemuOpts *opts, const char *name)
1161 {
1162 const char *val = qemu_opt_get(opts, name);
1163
1164 if (val) {
1165 *dest = val;
1166 }
1167 }
1168
1169
1170 struct opt_list {
1171 size_t *ndest;
1172 char ***dest;
1173 };
1174
1175 static int save_opt_one(void *opaque,
1176 const char *name, const char *value,
1177 Error **errp)
1178 {
1179 struct opt_list *opt = opaque;
1180
1181 if (g_str_equal(name, "path")) {
1182 g_autoptr(GByteArray) data = g_byte_array_new();
1183 g_autofree char *buf = g_new(char, 4096);
1184 ssize_t ret;
1185 int fd = qemu_open(value, O_RDONLY, errp);
1186 if (fd < 0) {
1187 return -1;
1188 }
1189
1190 while (1) {
1191 ret = read(fd, buf, 4096);
1192 if (ret == 0) {
1193 break;
1194 }
1195 if (ret < 0) {
1196 error_setg(errp, "Unable to read from %s: %s",
1197 value, strerror(errno));
1198 qemu_close(fd);
1199 return -1;
1200 }
1201 if (memchr(buf, '\0', ret)) {
1202 error_setg(errp, "NUL in OEM strings value in %s", value);
1203 qemu_close(fd);
1204 return -1;
1205 }
1206 g_byte_array_append(data, (guint8 *)buf, ret);
1207 }
1208
1209 qemu_close(fd);
1210
1211 *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1);
1212 (*opt->dest)[*opt->ndest] = (char *)g_byte_array_free(data, FALSE);
1213 (*opt->ndest)++;
1214 data = NULL;
1215 } else if (g_str_equal(name, "value")) {
1216 *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1);
1217 (*opt->dest)[*opt->ndest] = g_strdup(value);
1218 (*opt->ndest)++;
1219 } else if (!g_str_equal(name, "type")) {
1220 error_setg(errp, "Unexpected option %s", name);
1221 return -1;
1222 }
1223
1224 return 0;
1225 }
1226
1227 static bool save_opt_list(size_t *ndest, char ***dest, QemuOpts *opts,
1228 Error **errp)
1229 {
1230 struct opt_list opt = {
1231 ndest, dest,
1232 };
1233 if (!qemu_opt_foreach(opts, save_opt_one, &opt, errp)) {
1234 return false;
1235 }
1236 return true;
1237 }
1238
1239 void smbios_entry_add(QemuOpts *opts, Error **errp)
1240 {
1241 const char *val;
1242
1243 assert(!smbios_immutable);
1244
1245 val = qemu_opt_get(opts, "file");
1246 if (val) {
1247 struct smbios_structure_header *header;
1248 int size;
1249 struct smbios_table *table; /* legacy mode only */
1250
1251 if (!qemu_opts_validate(opts, qemu_smbios_file_opts, errp)) {
1252 return;
1253 }
1254
1255 size = get_image_size(val);
1256 if (size == -1 || size < sizeof(struct smbios_structure_header)) {
1257 error_setg(errp, "Cannot read SMBIOS file %s", val);
1258 return;
1259 }
1260
1261 /*
1262 * NOTE: standard double '\0' terminator expected, per smbios spec.
1263 * (except in legacy mode, where the second '\0' is implicit and
1264 * will be inserted by the BIOS).
1265 */
1266 smbios_tables = g_realloc(smbios_tables, smbios_tables_len + size);
1267 header = (struct smbios_structure_header *)(smbios_tables +
1268 smbios_tables_len);
1269
1270 if (load_image_size(val, (uint8_t *)header, size) != size) {
1271 error_setg(errp, "Failed to load SMBIOS file %s", val);
1272 return;
1273 }
1274
1275 if (header->type <= SMBIOS_MAX_TYPE) {
1276 if (test_bit(header->type, have_fields_bitmap)) {
1277 error_setg(errp,
1278 "can't load type %d struct, fields already specified!",
1279 header->type);
1280 return;
1281 }
1282 set_bit(header->type, have_binfile_bitmap);
1283 }
1284
1285 if (header->type == 4) {
1286 smbios_type4_count++;
1287 }
1288
1289 smbios_tables_len += size;
1290 if (size > smbios_table_max) {
1291 smbios_table_max = size;
1292 }
1293 smbios_table_cnt++;
1294
1295 /* add a copy of the newly loaded blob to legacy smbios_entries */
1296 /* NOTE: This code runs before smbios_set_defaults(), so we don't
1297 * yet know which mode (legacy vs. aggregate-table) will be
1298 * required. We therefore add the binary blob to both legacy
1299 * (smbios_entries) and aggregate (smbios_tables) tables, and
1300 * delete the one we don't need from smbios_set_defaults(),
1301 * once we know which machine version has been requested.
1302 */
1303 if (!smbios_entries) {
1304 smbios_entries_len = sizeof(uint16_t);
1305 smbios_entries = g_malloc0(smbios_entries_len);
1306 }
1307 smbios_entries = g_realloc(smbios_entries, smbios_entries_len +
1308 size + sizeof(*table));
1309 table = (struct smbios_table *)(smbios_entries + smbios_entries_len);
1310 table->header.type = SMBIOS_TABLE_ENTRY;
1311 table->header.length = cpu_to_le16(sizeof(*table) + size);
1312 memcpy(table->data, header, size);
1313 smbios_entries_len += sizeof(*table) + size;
1314 (*(uint16_t *)smbios_entries) =
1315 cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1);
1316 /* end: add a copy of the newly loaded blob to legacy smbios_entries */
1317
1318 return;
1319 }
1320
1321 val = qemu_opt_get(opts, "type");
1322 if (val) {
1323 unsigned long type = strtoul(val, NULL, 0);
1324
1325 if (type > SMBIOS_MAX_TYPE) {
1326 error_setg(errp, "out of range!");
1327 return;
1328 }
1329
1330 if (test_bit(type, have_binfile_bitmap)) {
1331 error_setg(errp, "can't add fields, binary file already loaded!");
1332 return;
1333 }
1334 set_bit(type, have_fields_bitmap);
1335
1336 switch (type) {
1337 case 0:
1338 if (!qemu_opts_validate(opts, qemu_smbios_type0_opts, errp)) {
1339 return;
1340 }
1341 save_opt(&type0.vendor, opts, "vendor");
1342 save_opt(&type0.version, opts, "version");
1343 save_opt(&type0.date, opts, "date");
1344 type0.uefi = qemu_opt_get_bool(opts, "uefi", false);
1345
1346 val = qemu_opt_get(opts, "release");
1347 if (val) {
1348 if (sscanf(val, "%hhu.%hhu", &type0.major, &type0.minor) != 2) {
1349 error_setg(errp, "Invalid release");
1350 return;
1351 }
1352 type0.have_major_minor = true;
1353 }
1354 return;
1355 case 1:
1356 if (!qemu_opts_validate(opts, qemu_smbios_type1_opts, errp)) {
1357 return;
1358 }
1359 save_opt(&type1.manufacturer, opts, "manufacturer");
1360 save_opt(&type1.product, opts, "product");
1361 save_opt(&type1.version, opts, "version");
1362 save_opt(&type1.serial, opts, "serial");
1363 save_opt(&type1.sku, opts, "sku");
1364 save_opt(&type1.family, opts, "family");
1365
1366 val = qemu_opt_get(opts, "uuid");
1367 if (val) {
1368 if (qemu_uuid_parse(val, &qemu_uuid) != 0) {
1369 error_setg(errp, "Invalid UUID");
1370 return;
1371 }
1372 qemu_uuid_set = true;
1373 }
1374 return;
1375 case 2:
1376 if (!qemu_opts_validate(opts, qemu_smbios_type2_opts, errp)) {
1377 return;
1378 }
1379 save_opt(&type2.manufacturer, opts, "manufacturer");
1380 save_opt(&type2.product, opts, "product");
1381 save_opt(&type2.version, opts, "version");
1382 save_opt(&type2.serial, opts, "serial");
1383 save_opt(&type2.asset, opts, "asset");
1384 save_opt(&type2.location, opts, "location");
1385 return;
1386 case 3:
1387 if (!qemu_opts_validate(opts, qemu_smbios_type3_opts, errp)) {
1388 return;
1389 }
1390 save_opt(&type3.manufacturer, opts, "manufacturer");
1391 save_opt(&type3.version, opts, "version");
1392 save_opt(&type3.serial, opts, "serial");
1393 save_opt(&type3.asset, opts, "asset");
1394 save_opt(&type3.sku, opts, "sku");
1395 return;
1396 case 4:
1397 if (!qemu_opts_validate(opts, qemu_smbios_type4_opts, errp)) {
1398 return;
1399 }
1400 save_opt(&type4.sock_pfx, opts, "sock_pfx");
1401 save_opt(&type4.manufacturer, opts, "manufacturer");
1402 save_opt(&type4.version, opts, "version");
1403 save_opt(&type4.serial, opts, "serial");
1404 save_opt(&type4.asset, opts, "asset");
1405 save_opt(&type4.part, opts, "part");
1406 /* If the value is 0, it will take the value from the CPU model. */
1407 type4.processor_id = qemu_opt_get_number(opts, "processor-id", 0);
1408 type4.max_speed = qemu_opt_get_number(opts, "max-speed",
1409 DEFAULT_CPU_SPEED);
1410 type4.current_speed = qemu_opt_get_number(opts, "current-speed",
1411 DEFAULT_CPU_SPEED);
1412 if (type4.max_speed > UINT16_MAX ||
1413 type4.current_speed > UINT16_MAX) {
1414 error_setg(errp, "SMBIOS CPU speed is too large (> %d)",
1415 UINT16_MAX);
1416 }
1417 return;
1418 case 8:
1419 if (!qemu_opts_validate(opts, qemu_smbios_type8_opts, errp)) {
1420 return;
1421 }
1422 struct type8_instance *t;
1423 t = g_new0(struct type8_instance, 1);
1424 save_opt(&t->internal_reference, opts, "internal_reference");
1425 save_opt(&t->external_reference, opts, "external_reference");
1426 t->connector_type = qemu_opt_get_number(opts, "connector_type", 0);
1427 t->port_type = qemu_opt_get_number(opts, "port_type", 0);
1428 QTAILQ_INSERT_TAIL(&type8, t, next);
1429 return;
1430 case 11:
1431 if (!qemu_opts_validate(opts, qemu_smbios_type11_opts, errp)) {
1432 return;
1433 }
1434 if (!save_opt_list(&type11.nvalues, &type11.values, opts, errp)) {
1435 return;
1436 }
1437 return;
1438 case 17:
1439 if (!qemu_opts_validate(opts, qemu_smbios_type17_opts, errp)) {
1440 return;
1441 }
1442 save_opt(&type17.loc_pfx, opts, "loc_pfx");
1443 save_opt(&type17.bank, opts, "bank");
1444 save_opt(&type17.manufacturer, opts, "manufacturer");
1445 save_opt(&type17.serial, opts, "serial");
1446 save_opt(&type17.asset, opts, "asset");
1447 save_opt(&type17.part, opts, "part");
1448 type17.speed = qemu_opt_get_number(opts, "speed", 0);
1449 return;
1450 case 41: {
1451 struct type41_instance *t;
1452 Error *local_err = NULL;
1453
1454 if (!qemu_opts_validate(opts, qemu_smbios_type41_opts, errp)) {
1455 return;
1456 }
1457 t = g_new0(struct type41_instance, 1);
1458 save_opt(&t->designation, opts, "designation");
1459 t->kind = qapi_enum_parse(&type41_kind_lookup,
1460 qemu_opt_get(opts, "kind"),
1461 0, &local_err) + 1;
1462 t->kind |= 0x80; /* enabled */
1463 if (local_err != NULL) {
1464 error_propagate(errp, local_err);
1465 g_free(t);
1466 return;
1467 }
1468 t->instance = qemu_opt_get_number(opts, "instance", 1);
1469 save_opt(&t->pcidev, opts, "pcidev");
1470
1471 QTAILQ_INSERT_TAIL(&type41, t, next);
1472 return;
1473 }
1474 default:
1475 error_setg(errp,
1476 "Don't know how to build fields for SMBIOS type %ld",
1477 type);
1478 return;
1479 }
1480 }
1481
1482 error_setg(errp, "Must specify type= or file=");
1483 }