hw/spapr.c

   1 /*
   2  * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  * Copyright (c) 2010 David Gibson, IBM Corporation.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a copy
   9  * of this software and associated documentation files (the "Software"), to deal
  10  * in the Software without restriction, including without limitation the rights
  11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12  * copies of the Software, and to permit persons to whom the Software is
  13  * furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24  * THE SOFTWARE.
  25  *
  26  */
  27 #include "sysemu.h"
  28 #include "hw.h"
  29 #include "elf.h"
  30 #include "net.h"
  31 #include "blockdev.h"
  32 #include "cpus.h"
  33 #include "kvm.h"
  34 #include "kvm_ppc.h"
  35
  36 #include "hw/boards.h"
  37 #include "hw/ppc.h"
  38 #include "hw/loader.h"
  39
  40 #include "hw/spapr.h"
  41 #include "hw/spapr_vio.h"
  42 #include "hw/xics.h"
  43
  44 #include "kvm.h"
  45 #include "kvm_ppc.h"
  46
  47 #include "exec-memory.h"
  48
  49 #include <libfdt.h>
  50
  51 #define KERNEL_LOAD_ADDR        0x00000000
  52 #define INITRD_LOAD_ADDR        0x02800000
  53 #define FDT_MAX_SIZE            0x10000
  54 #define RTAS_MAX_SIZE           0x10000
  55 #define FW_MAX_SIZE             0x400000
  56 #define FW_FILE_NAME            "slof.bin"
  57
  58 #define MIN_RAM_SLOF            512UL
  59
  60 #define TIMEBASE_FREQ           512000000ULL
  61
  62 #define MAX_CPUS                256
  63 #define XICS_IRQS               1024
  64
  65 #define PHANDLE_XICP            0x00001111
  66
  67 sPAPREnvironment *spapr;
  68
  69 qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num)
  70 {
  71     uint32_t irq;
  72     qemu_irq qirq;
  73
  74     if (hint) {
  75         irq = hint;
  76         /* FIXME: we should probably check for collisions somehow */
  77     } else {
  78         irq = spapr->next_irq++;
  79     }
  80
  81     qirq = xics_find_qirq(spapr->icp, irq);
  82     if (!qirq) {
  83         return NULL;
  84     }
  85
  86     if (irq_num) {
  87         *irq_num = irq;
  88     }
  89
  90     return qirq;
  91 }
  92
  93 static void *spapr_create_fdt_skel(const char *cpu_model,
  94                                    target_phys_addr_t rma_size,
  95                                    target_phys_addr_t initrd_base,
  96                                    target_phys_addr_t initrd_size,
  97                                    const char *boot_device,
  98                                    const char *kernel_cmdline,
  99                                    long hash_shift)
 100 {
 101     void *fdt;
 102     CPUState *env;
 103     uint64_t mem_reg_property_rma[] = { 0, cpu_to_be64(rma_size) };
 104     uint64_t mem_reg_property_nonrma[] = { cpu_to_be64(rma_size),
 105                                            cpu_to_be64(ram_size - rma_size) };
 106     uint32_t start_prop = cpu_to_be32(initrd_base);
 107     uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size);
 108     uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
 109     char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
 110         "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
 111     uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
 112     int i;
 113     char *modelname;
 114     int smt = kvmppc_smt_threads();
 115
 116 #define _FDT(exp) \
 117     do { \
 118         int ret = (exp);                                           \
 119         if (ret < 0) {                                             \
 120             fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
 121                     #exp, fdt_strerror(ret));                      \
 122             exit(1);                                               \
 123         }                                                          \
 124     } while (0)
 125
 126     fdt = g_malloc0(FDT_MAX_SIZE);
 127     _FDT((fdt_create(fdt, FDT_MAX_SIZE)));
 128
 129     _FDT((fdt_finish_reservemap(fdt)));
 130
 131     /* Root node */
 132     _FDT((fdt_begin_node(fdt, "")));
 133     _FDT((fdt_property_string(fdt, "device_type", "chrp")));
 134     _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)")));
 135
 136     _FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
 137     _FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));
 138
 139     /* /chosen */
 140     _FDT((fdt_begin_node(fdt, "chosen")));
 141
 142     _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
 143     _FDT((fdt_property(fdt, "linux,initrd-start",
 144                        &start_prop, sizeof(start_prop))));
 145     _FDT((fdt_property(fdt, "linux,initrd-end",
 146                        &end_prop, sizeof(end_prop))));
 147     _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
 148
 149     _FDT((fdt_end_node(fdt)));
 150
 151     /* memory node(s) */
 152     _FDT((fdt_begin_node(fdt, "memory@0")));
 153
 154     _FDT((fdt_property_string(fdt, "device_type", "memory")));
 155     _FDT((fdt_property(fdt, "reg", mem_reg_property_rma,
 156                        sizeof(mem_reg_property_rma))));
 157     _FDT((fdt_end_node(fdt)));
 158
 159     if (ram_size > rma_size) {
 160         char mem_name[32];
 161
 162         sprintf(mem_name, "memory@%" PRIx64, (uint64_t)rma_size);
 163         _FDT((fdt_begin_node(fdt, mem_name)));
 164         _FDT((fdt_property_string(fdt, "device_type", "memory")));
 165         _FDT((fdt_property(fdt, "reg", mem_reg_property_nonrma,
 166                            sizeof(mem_reg_property_nonrma))));
 167         _FDT((fdt_end_node(fdt)));
 168     }
 169
 170     /* cpus */
 171     _FDT((fdt_begin_node(fdt, "cpus")));
 172
 173     _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
 174     _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
 175
 176     modelname = g_strdup(cpu_model);
 177
 178     for (i = 0; i < strlen(modelname); i++) {
 179         modelname[i] = toupper(modelname[i]);
 180     }
 181
 182     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 183         int index = env->cpu_index;
 184         uint32_t servers_prop[smp_threads];
 185         uint32_t gservers_prop[smp_threads * 2];
 186         char *nodename;
 187         uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
 188                            0xffffffff, 0xffffffff};
 189         uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ;
 190         uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
 191
 192         if ((index % smt) != 0) {
 193             continue;
 194         }
 195
 196         if (asprintf(&nodename, "%s@%x", modelname, index) < 0) {
 197             fprintf(stderr, "Allocation failure\n");
 198             exit(1);
 199         }
 200
 201         _FDT((fdt_begin_node(fdt, nodename)));
 202
 203         free(nodename);
 204
 205         _FDT((fdt_property_cell(fdt, "reg", index)));
 206         _FDT((fdt_property_string(fdt, "device_type", "cpu")));
 207
 208         _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
 209         _FDT((fdt_property_cell(fdt, "dcache-block-size",
 210                                 env->dcache_line_size)));
 211         _FDT((fdt_property_cell(fdt, "icache-block-size",
 212                                 env->icache_line_size)));
 213         _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
 214         _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
 215         _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
 216         _FDT((fdt_property(fdt, "ibm,pft-size",
 217                            pft_size_prop, sizeof(pft_size_prop))));
 218         _FDT((fdt_property_string(fdt, "status", "okay")));
 219         _FDT((fdt_property(fdt, "64-bit", NULL, 0)));
 220
 221         /* Build interrupt servers and gservers properties */
 222         for (i = 0; i < smp_threads; i++) {
 223             servers_prop[i] = cpu_to_be32(index + i);
 224             /* Hack, direct the group queues back to cpu 0 */
 225             gservers_prop[i*2] = cpu_to_be32(index + i);
 226             gservers_prop[i*2 + 1] = 0;
 227         }
 228         _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
 229                            servers_prop, sizeof(servers_prop))));
 230         _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
 231                            gservers_prop, sizeof(gservers_prop))));
 232
 233         if (env->mmu_model & POWERPC_MMU_1TSEG) {
 234             _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
 235                                segs, sizeof(segs))));
 236         }
 237
 238         _FDT((fdt_end_node(fdt)));
 239     }
 240
 241     g_free(modelname);
 242
 243     _FDT((fdt_end_node(fdt)));
 244
 245     /* RTAS */
 246     _FDT((fdt_begin_node(fdt, "rtas")));
 247
 248     _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
 249                        sizeof(hypertas_prop))));
 250
 251     _FDT((fdt_end_node(fdt)));
 252
 253     /* interrupt controller */
 254     _FDT((fdt_begin_node(fdt, "interrupt-controller")));
 255
 256     _FDT((fdt_property_string(fdt, "device_type",
 257                               "PowerPC-External-Interrupt-Presentation")));
 258     _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp")));
 259     _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
 260     _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
 261                        interrupt_server_ranges_prop,
 262                        sizeof(interrupt_server_ranges_prop))));
 263     _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2)));
 264     _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
 265     _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
 266
 267     _FDT((fdt_end_node(fdt)));
 268
 269     /* vdevice */
 270     _FDT((fdt_begin_node(fdt, "vdevice")));
 271
 272     _FDT((fdt_property_string(fdt, "device_type", "vdevice")));
 273     _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice")));
 274     _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
 275     _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
 276     _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2)));
 277     _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
 278
 279     _FDT((fdt_end_node(fdt)));
 280
 281     _FDT((fdt_end_node(fdt))); /* close root node */
 282     _FDT((fdt_finish(fdt)));
 283
 284     return fdt;
 285 }
 286
 287 static void spapr_finalize_fdt(sPAPREnvironment *spapr,
 288                                target_phys_addr_t fdt_addr,
 289                                target_phys_addr_t rtas_addr,
 290                                target_phys_addr_t rtas_size)
 291 {
 292     int ret;
 293     void *fdt;
 294
 295     fdt = g_malloc(FDT_MAX_SIZE);
 296
 297     /* open out the base tree into a temp buffer for the final tweaks */
 298     _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE)));
 299
 300     ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
 301     if (ret < 0) {
 302         fprintf(stderr, "couldn't setup vio devices in fdt\n");
 303         exit(1);
 304     }
 305
 306     /* RTAS */
 307     ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size);
 308     if (ret < 0) {
 309         fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
 310     }
 311
 312     _FDT((fdt_pack(fdt)));
 313
 314     cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
 315
 316     g_free(fdt);
 317 }
 318
 319 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
 320 {
 321     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
 322 }
 323
 324 static void emulate_spapr_hypercall(CPUState *env)
 325 {
 326     env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]);
 327 }
 328
 329 static void spapr_reset(void *opaque)
 330 {
 331     sPAPREnvironment *spapr = (sPAPREnvironment *)opaque;
 332
 333     fprintf(stderr, "sPAPR reset\n");
 334
 335     /* flush out the hash table */
 336     memset(spapr->htab, 0, spapr->htab_size);
 337
 338     /* Load the fdt */
 339     spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr,
 340                        spapr->rtas_size);
 341
 342     /* Set up the entry state */
 343     first_cpu->gpr[3] = spapr->fdt_addr;
 344     first_cpu->gpr[5] = 0;
 345     first_cpu->halted = 0;
 346     first_cpu->nip = spapr->entry_point;
 347
 348 }
 349
 350 /* pSeries LPAR / sPAPR hardware init */
 351 static void ppc_spapr_init(ram_addr_t ram_size,
 352                            const char *boot_device,
 353                            const char *kernel_filename,
 354                            const char *kernel_cmdline,
 355                            const char *initrd_filename,
 356                            const char *cpu_model)
 357 {
 358     CPUState *env;
 359     int i;
 360     MemoryRegion *sysmem = get_system_memory();
 361     MemoryRegion *ram = g_new(MemoryRegion, 1);
 362     target_phys_addr_t rma_alloc_size, rma_size;
 363     uint32_t initrd_base;
 364     long kernel_size, initrd_size, fw_size;
 365     long pteg_shift = 17;
 366     char *filename;
 367
 368     spapr = g_malloc(sizeof(*spapr));
 369     cpu_ppc_hypercall = emulate_spapr_hypercall;
 370
 371     /* Allocate RMA if necessary */
 372     rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
 373
 374     if (rma_alloc_size == -1) {
 375         hw_error("qemu: Unable to create RMA\n");
 376         exit(1);
 377     }
 378     if (rma_alloc_size && (rma_alloc_size < ram_size)) {
 379         rma_size = rma_alloc_size;
 380     } else {
 381         rma_size = ram_size;
 382     }
 383
 384     /* We place the device tree just below either the top of the RMA,
 385      * or just below 2GB, whichever is lowere, so that it can be
 386      * processed with 32-bit real mode code if necessary */
 387     spapr->fdt_addr = MIN(rma_size, 0x80000000) - FDT_MAX_SIZE;
 388     spapr->rtas_addr = spapr->fdt_addr - RTAS_MAX_SIZE;
 389
 390     /* init CPUs */
 391     if (cpu_model == NULL) {
 392         cpu_model = "POWER7";
 393     }
 394     for (i = 0; i < smp_cpus; i++) {
 395         env = cpu_init(cpu_model);
 396
 397         if (!env) {
 398             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 399             exit(1);
 400         }
 401         /* Set time-base frequency to 512 MHz */
 402         cpu_ppc_tb_init(env, TIMEBASE_FREQ);
 403         qemu_register_reset((QEMUResetHandler *)&cpu_reset, env);
 404
 405         env->hreset_vector = 0x60;
 406         env->hreset_excp_prefix = 0;
 407         env->gpr[3] = env->cpu_index;
 408     }
 409
 410     /* allocate RAM */
 411     spapr->ram_limit = ram_size;
 412     if (spapr->ram_limit > rma_alloc_size) {
 413         ram_addr_t nonrma_base = rma_alloc_size;
 414         ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size;
 415
 416         memory_region_init_ram(ram, NULL, "ppc_spapr.ram", nonrma_size);
 417         memory_region_add_subregion(sysmem, nonrma_base, ram);
 418     }
 419
 420     /* allocate hash page table.  For now we always make this 16mb,
 421      * later we should probably make it scale to the size of guest
 422      * RAM */
 423     spapr->htab_size = 1ULL << (pteg_shift + 7);
 424     spapr->htab = qemu_memalign(spapr->htab_size, spapr->htab_size);
 425
 426     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 427         env->external_htab = spapr->htab;
 428         env->htab_base = -1;
 429         env->htab_mask = spapr->htab_size - 1;
 430
 431         /* Tell KVM that we're in PAPR mode */
 432         env->spr[SPR_SDR1] = (unsigned long)spapr->htab |
 433                              ((pteg_shift + 7) - 18);
 434         env->spr[SPR_HIOR] = 0;
 435
 436         if (kvm_enabled()) {
 437             kvmppc_set_papr(env);
 438         }
 439     }
 440
 441     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
 442     spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr,
 443                                            ram_size - spapr->rtas_addr);
 444     if (spapr->rtas_size < 0) {
 445         hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
 446         exit(1);
 447     }
 448     g_free(filename);
 449
 450     /* Set up Interrupt Controller */
 451     spapr->icp = xics_system_init(XICS_IRQS);
 452     spapr->next_irq = 16;
 453
 454     /* Set up VIO bus */
 455     spapr->vio_bus = spapr_vio_bus_init();
 456
 457     for (i = 0; i < MAX_SERIAL_PORTS; i++) {
 458         if (serial_hds[i]) {
 459             spapr_vty_create(spapr->vio_bus, SPAPR_VTY_BASE_ADDRESS + i,
 460                              serial_hds[i]);
 461         }
 462     }
 463
 464     for (i = 0; i < nb_nics; i++) {
 465         NICInfo *nd = &nd_table[i];
 466
 467         if (!nd->model) {
 468             nd->model = g_strdup("ibmveth");
 469         }
 470
 471         if (strcmp(nd->model, "ibmveth") == 0) {
 472             spapr_vlan_create(spapr->vio_bus, 0x1000 + i, nd);
 473         } else {
 474             fprintf(stderr, "pSeries (sPAPR) platform does not support "
 475                     "NIC model '%s' (only ibmveth is supported)\n",
 476                     nd->model);
 477             exit(1);
 478         }
 479     }
 480
 481     for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
 482         spapr_vscsi_create(spapr->vio_bus, 0x2000 + i);
 483     }
 484
 485     if (kernel_filename) {
 486         uint64_t lowaddr = 0;
 487
 488         kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 489                                NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
 490         if (kernel_size < 0) {
 491             kernel_size = load_image_targphys(kernel_filename,
 492                                               KERNEL_LOAD_ADDR,
 493                                               ram_size - KERNEL_LOAD_ADDR);
 494         }
 495         if (kernel_size < 0) {
 496             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 497                     kernel_filename);
 498             exit(1);
 499         }
 500
 501         /* load initrd */
 502         if (initrd_filename) {
 503             initrd_base = INITRD_LOAD_ADDR;
 504             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 505                                               ram_size - initrd_base);
 506             if (initrd_size < 0) {
 507                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 508                         initrd_filename);
 509                 exit(1);
 510             }
 511         } else {
 512             initrd_base = 0;
 513             initrd_size = 0;
 514         }
 515
 516         spapr->entry_point = KERNEL_LOAD_ADDR;
 517     } else {
 518         if (ram_size < (MIN_RAM_SLOF << 20)) {
 519             fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
 520                     "%ldM guest RAM\n", MIN_RAM_SLOF);
 521             exit(1);
 522         }
 523         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME);
 524         fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
 525         if (fw_size < 0) {
 526             hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
 527             exit(1);
 528         }
 529         g_free(filename);
 530         spapr->entry_point = 0x100;
 531         initrd_base = 0;
 532         initrd_size = 0;
 533
 534         /* SLOF will startup the secondary CPUs using RTAS,
 535            rather than expecting a kexec() style entry */
 536         for (env = first_cpu; env != NULL; env = env->next_cpu) {
 537             env->halted = 1;
 538         }
 539     }
 540
 541     /* Prepare the device tree */
 542     spapr->fdt_skel = spapr_create_fdt_skel(cpu_model, rma_size,
 543                                             initrd_base, initrd_size,
 544                                             boot_device, kernel_cmdline,
 545                                             pteg_shift + 7);
 546     assert(spapr->fdt_skel != NULL);
 547
 548     qemu_register_reset(spapr_reset, spapr);
 549 }
 550
 551 static QEMUMachine spapr_machine = {
 552     .name = "pseries",
 553     .desc = "pSeries Logical Partition (PAPR compliant)",
 554     .init = ppc_spapr_init,
 555     .max_cpus = MAX_CPUS,
 556     .no_vga = 1,
 557     .no_parallel = 1,
 558     .use_scsi = 1,
 559 };
 560
 561 static void spapr_machine_init(void)
 562 {
 563     qemu_register_machine(&spapr_machine);
 564 }
 565
 566 machine_init(spapr_machine_init);