2 * QEMU MC146818 RTC emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu/osdep.h"
26 #include "qemu-common.h"
27 #include "qemu/cutils.h"
28 #include "qemu/module.h"
31 #include "hw/qdev-properties.h"
32 #include "qemu/timer.h"
33 #include "sysemu/sysemu.h"
34 #include "sysemu/replay.h"
35 #include "sysemu/reset.h"
36 #include "hw/timer/mc146818rtc.h"
37 #include "migration/vmstate.h"
38 #include "qapi/error.h"
39 #include "qapi/qapi-commands-misc-target.h"
40 #include "qapi/qapi-events-misc-target.h"
41 #include "qapi/visitor.h"
42 #include "exec/address-spaces.h"
45 #include "hw/i386/apic.h"
49 //#define DEBUG_COALESCED
52 # define CMOS_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
54 # define CMOS_DPRINTF(format, ...) do { } while (0)
57 #ifdef DEBUG_COALESCED
58 # define DPRINTF_C(format, ...) printf(format, ## __VA_ARGS__)
60 # define DPRINTF_C(format, ...) do { } while (0)
63 #define SEC_PER_MIN 60
64 #define MIN_PER_HOUR 60
65 #define SEC_PER_HOUR 3600
66 #define HOUR_PER_DAY 24
67 #define SEC_PER_DAY 86400
69 #define RTC_REINJECT_ON_ACK_COUNT 20
70 #define RTC_CLOCK_RATE 32768
71 #define UIP_HOLD_LENGTH (8 * NANOSECONDS_PER_SECOND / 32768)
73 #define MC146818_RTC(obj) OBJECT_CHECK(RTCState, (obj), TYPE_MC146818_RTC)
75 typedef struct RTCState
{
79 MemoryRegion coalesced_io
;
80 uint8_t cmos_data
[128];
89 QEMUTimer
*periodic_timer
;
90 int64_t next_periodic_time
;
91 /* update-ended timer */
92 QEMUTimer
*update_timer
;
93 uint64_t next_alarm_time
;
94 uint16_t irq_reinject_on_ack_count
;
95 uint32_t irq_coalesced
;
97 QEMUTimer
*coalesced_timer
;
98 Notifier clock_reset_notifier
;
99 LostTickPolicy lost_tick_policy
;
100 Notifier suspend_notifier
;
101 QLIST_ENTRY(RTCState
) link
;
104 static void rtc_set_time(RTCState
*s
);
105 static void rtc_update_time(RTCState
*s
);
106 static void rtc_set_cmos(RTCState
*s
, const struct tm
*tm
);
107 static inline int rtc_from_bcd(RTCState
*s
, int a
);
108 static uint64_t get_next_alarm(RTCState
*s
);
110 static inline bool rtc_running(RTCState
*s
)
112 return (!(s
->cmos_data
[RTC_REG_B
] & REG_B_SET
) &&
113 (s
->cmos_data
[RTC_REG_A
] & 0x70) <= 0x20);
116 static uint64_t get_guest_rtc_ns(RTCState
*s
)
118 uint64_t guest_clock
= qemu_clock_get_ns(rtc_clock
);
120 return s
->base_rtc
* NANOSECONDS_PER_SECOND
+
121 guest_clock
- s
->last_update
+ s
->offset
;
124 static void rtc_coalesced_timer_update(RTCState
*s
)
126 if (s
->irq_coalesced
== 0) {
127 timer_del(s
->coalesced_timer
);
129 /* divide each RTC interval to 2 - 8 smaller intervals */
130 int c
= MIN(s
->irq_coalesced
, 7) + 1;
131 int64_t next_clock
= qemu_clock_get_ns(rtc_clock
) +
132 periodic_clock_to_ns(s
->period
/ c
);
133 timer_mod(s
->coalesced_timer
, next_clock
);
137 static QLIST_HEAD(, RTCState
) rtc_devices
=
138 QLIST_HEAD_INITIALIZER(rtc_devices
);
141 void qmp_rtc_reset_reinjection(Error
**errp
)
145 QLIST_FOREACH(s
, &rtc_devices
, link
) {
146 s
->irq_coalesced
= 0;
150 static bool rtc_policy_slew_deliver_irq(RTCState
*s
)
152 apic_reset_irq_delivered();
153 qemu_irq_raise(s
->irq
);
154 return apic_get_irq_delivered();
157 static void rtc_coalesced_timer(void *opaque
)
159 RTCState
*s
= opaque
;
161 if (s
->irq_coalesced
!= 0) {
162 s
->cmos_data
[RTC_REG_C
] |= 0xc0;
163 DPRINTF_C("cmos: injecting from timer\n");
164 if (rtc_policy_slew_deliver_irq(s
)) {
166 DPRINTF_C("cmos: coalesced irqs decreased to %d\n",
171 rtc_coalesced_timer_update(s
);
174 static bool rtc_policy_slew_deliver_irq(RTCState
*s
)
181 static uint32_t rtc_periodic_clock_ticks(RTCState
*s
)
185 if (!(s
->cmos_data
[RTC_REG_B
] & REG_B_PIE
)) {
189 period_code
= s
->cmos_data
[RTC_REG_A
] & 0x0f;
191 return periodic_period_to_clock(period_code
);
195 * handle periodic timer. @old_period indicates the periodic timer update
196 * is just due to period adjustment.
199 periodic_timer_update(RTCState
*s
, int64_t current_time
, uint32_t old_period
)
202 int64_t cur_clock
, next_irq_clock
, lost_clock
= 0;
204 period
= rtc_periodic_clock_ticks(s
);
207 /* compute 32 khz clock */
209 muldiv64(current_time
, RTC_CLOCK_RATE
, NANOSECONDS_PER_SECOND
);
212 * if the periodic timer's update is due to period re-configuration,
213 * we should count the clock since last interrupt.
216 int64_t last_periodic_clock
, next_periodic_clock
;
218 next_periodic_clock
= muldiv64(s
->next_periodic_time
,
219 RTC_CLOCK_RATE
, NANOSECONDS_PER_SECOND
);
220 last_periodic_clock
= next_periodic_clock
- old_period
;
221 lost_clock
= cur_clock
- last_periodic_clock
;
222 assert(lost_clock
>= 0);
226 * s->irq_coalesced can change for two reasons:
228 * a) if one or more periodic timer interrupts have been lost,
229 * lost_clock will be more that a period.
231 * b) when the period may be reconfigured, we expect the OS to
232 * treat delayed tick as the new period. So, when switching
233 * from a shorter to a longer period, scale down the missing,
234 * because the OS will treat past delayed ticks as longer
235 * (leftovers are put back into lost_clock). When switching
236 * to a shorter period, scale up the missing ticks since the
237 * OS handler will treat past delayed ticks as shorter.
239 if (s
->lost_tick_policy
== LOST_TICK_POLICY_SLEW
) {
240 uint32_t old_irq_coalesced
= s
->irq_coalesced
;
243 lost_clock
+= old_irq_coalesced
* old_period
;
244 s
->irq_coalesced
= lost_clock
/ s
->period
;
245 lost_clock
%= s
->period
;
246 if (old_irq_coalesced
!= s
->irq_coalesced
||
247 old_period
!= s
->period
) {
248 DPRINTF_C("cmos: coalesced irqs scaled from %d to %d, "
249 "period scaled from %d to %d\n", old_irq_coalesced
,
250 s
->irq_coalesced
, old_period
, s
->period
);
251 rtc_coalesced_timer_update(s
);
255 * no way to compensate the interrupt if LOST_TICK_POLICY_SLEW
256 * is not used, we should make the time progress anyway.
258 lost_clock
= MIN(lost_clock
, period
);
261 assert(lost_clock
>= 0 && lost_clock
<= period
);
263 next_irq_clock
= cur_clock
+ period
- lost_clock
;
264 s
->next_periodic_time
= periodic_clock_to_ns(next_irq_clock
) + 1;
265 timer_mod(s
->periodic_timer
, s
->next_periodic_time
);
267 s
->irq_coalesced
= 0;
268 timer_del(s
->periodic_timer
);
272 static void rtc_periodic_timer(void *opaque
)
274 RTCState
*s
= opaque
;
276 periodic_timer_update(s
, s
->next_periodic_time
, 0);
277 s
->cmos_data
[RTC_REG_C
] |= REG_C_PF
;
278 if (s
->cmos_data
[RTC_REG_B
] & REG_B_PIE
) {
279 s
->cmos_data
[RTC_REG_C
] |= REG_C_IRQF
;
280 if (s
->lost_tick_policy
== LOST_TICK_POLICY_SLEW
) {
281 if (s
->irq_reinject_on_ack_count
>= RTC_REINJECT_ON_ACK_COUNT
)
282 s
->irq_reinject_on_ack_count
= 0;
283 if (!rtc_policy_slew_deliver_irq(s
)) {
285 rtc_coalesced_timer_update(s
);
286 DPRINTF_C("cmos: coalesced irqs increased to %d\n",
290 qemu_irq_raise(s
->irq
);
294 /* handle update-ended timer */
295 static void check_update_timer(RTCState
*s
)
297 uint64_t next_update_time
;
301 /* From the data sheet: "Holding the dividers in reset prevents
302 * interrupts from operating, while setting the SET bit allows"
305 if ((s
->cmos_data
[RTC_REG_A
] & 0x60) == 0x60) {
306 assert((s
->cmos_data
[RTC_REG_A
] & REG_A_UIP
) == 0);
307 timer_del(s
->update_timer
);
311 guest_nsec
= get_guest_rtc_ns(s
) % NANOSECONDS_PER_SECOND
;
312 next_update_time
= qemu_clock_get_ns(rtc_clock
)
313 + NANOSECONDS_PER_SECOND
- guest_nsec
;
315 /* Compute time of next alarm. One second is already accounted
316 * for in next_update_time.
318 next_alarm_sec
= get_next_alarm(s
);
319 s
->next_alarm_time
= next_update_time
+
320 (next_alarm_sec
- 1) * NANOSECONDS_PER_SECOND
;
322 /* If update_in_progress latched the UIP bit, we must keep the timer
323 * programmed to the next second, so that UIP is cleared. Otherwise,
324 * if UF is already set, we might be able to optimize.
326 if (!(s
->cmos_data
[RTC_REG_A
] & REG_A_UIP
) &&
327 (s
->cmos_data
[RTC_REG_C
] & REG_C_UF
)) {
328 /* If AF cannot change (i.e. either it is set already, or
329 * SET=1 and then the time is not updated), nothing to do.
331 if ((s
->cmos_data
[RTC_REG_B
] & REG_B_SET
) ||
332 (s
->cmos_data
[RTC_REG_C
] & REG_C_AF
)) {
333 timer_del(s
->update_timer
);
337 /* UF is set, but AF is clear. Program the timer to target
339 next_update_time
= s
->next_alarm_time
;
341 if (next_update_time
!= timer_expire_time_ns(s
->update_timer
)) {
342 timer_mod(s
->update_timer
, next_update_time
);
346 static inline uint8_t convert_hour(RTCState
*s
, uint8_t hour
)
348 if (!(s
->cmos_data
[RTC_REG_B
] & REG_B_24H
)) {
350 if (s
->cmos_data
[RTC_HOURS
] & 0x80) {
357 static uint64_t get_next_alarm(RTCState
*s
)
359 int32_t alarm_sec
, alarm_min
, alarm_hour
, cur_hour
, cur_min
, cur_sec
;
360 int32_t hour
, min
, sec
;
364 alarm_sec
= rtc_from_bcd(s
, s
->cmos_data
[RTC_SECONDS_ALARM
]);
365 alarm_min
= rtc_from_bcd(s
, s
->cmos_data
[RTC_MINUTES_ALARM
]);
366 alarm_hour
= rtc_from_bcd(s
, s
->cmos_data
[RTC_HOURS_ALARM
]);
367 alarm_hour
= alarm_hour
== -1 ? -1 : convert_hour(s
, alarm_hour
);
369 cur_sec
= rtc_from_bcd(s
, s
->cmos_data
[RTC_SECONDS
]);
370 cur_min
= rtc_from_bcd(s
, s
->cmos_data
[RTC_MINUTES
]);
371 cur_hour
= rtc_from_bcd(s
, s
->cmos_data
[RTC_HOURS
]);
372 cur_hour
= convert_hour(s
, cur_hour
);
374 if (alarm_hour
== -1) {
375 alarm_hour
= cur_hour
;
376 if (alarm_min
== -1) {
378 if (alarm_sec
== -1) {
379 alarm_sec
= cur_sec
+ 1;
380 } else if (cur_sec
> alarm_sec
) {
383 } else if (cur_min
== alarm_min
) {
384 if (alarm_sec
== -1) {
385 alarm_sec
= cur_sec
+ 1;
387 if (cur_sec
> alarm_sec
) {
391 if (alarm_sec
== SEC_PER_MIN
) {
392 /* wrap to next hour, minutes is not in don't care mode */
396 } else if (cur_min
> alarm_min
) {
399 } else if (cur_hour
== alarm_hour
) {
400 if (alarm_min
== -1) {
402 if (alarm_sec
== -1) {
403 alarm_sec
= cur_sec
+ 1;
404 } else if (cur_sec
> alarm_sec
) {
408 if (alarm_sec
== SEC_PER_MIN
) {
412 /* wrap to next day, hour is not in don't care mode */
413 alarm_min
%= MIN_PER_HOUR
;
414 } else if (cur_min
== alarm_min
) {
415 if (alarm_sec
== -1) {
416 alarm_sec
= cur_sec
+ 1;
418 /* wrap to next day, hours+minutes not in don't care mode */
419 alarm_sec
%= SEC_PER_MIN
;
423 /* values that are still don't care fire at the next min/sec */
424 if (alarm_min
== -1) {
427 if (alarm_sec
== -1) {
431 /* keep values in range */
432 if (alarm_sec
== SEC_PER_MIN
) {
436 if (alarm_min
== MIN_PER_HOUR
) {
440 alarm_hour
%= HOUR_PER_DAY
;
442 hour
= alarm_hour
- cur_hour
;
443 min
= hour
* MIN_PER_HOUR
+ alarm_min
- cur_min
;
444 sec
= min
* SEC_PER_MIN
+ alarm_sec
- cur_sec
;
445 return sec
<= 0 ? sec
+ SEC_PER_DAY
: sec
;
448 static void rtc_update_timer(void *opaque
)
450 RTCState
*s
= opaque
;
451 int32_t irqs
= REG_C_UF
;
454 assert((s
->cmos_data
[RTC_REG_A
] & 0x60) != 0x60);
456 /* UIP might have been latched, update time and clear it. */
458 s
->cmos_data
[RTC_REG_A
] &= ~REG_A_UIP
;
460 if (qemu_clock_get_ns(rtc_clock
) >= s
->next_alarm_time
) {
462 if (s
->cmos_data
[RTC_REG_B
] & REG_B_AIE
) {
463 qemu_system_wakeup_request(QEMU_WAKEUP_REASON_RTC
, NULL
);
467 new_irqs
= irqs
& ~s
->cmos_data
[RTC_REG_C
];
468 s
->cmos_data
[RTC_REG_C
] |= irqs
;
469 if ((new_irqs
& s
->cmos_data
[RTC_REG_B
]) != 0) {
470 s
->cmos_data
[RTC_REG_C
] |= REG_C_IRQF
;
471 qemu_irq_raise(s
->irq
);
473 check_update_timer(s
);
476 static void cmos_ioport_write(void *opaque
, hwaddr addr
,
477 uint64_t data
, unsigned size
)
479 RTCState
*s
= opaque
;
481 bool update_periodic_timer
;
483 if ((addr
& 1) == 0) {
484 s
->cmos_index
= data
& 0x7f;
486 CMOS_DPRINTF("cmos: write index=0x%02x val=0x%02" PRIx64
"\n",
487 s
->cmos_index
, data
);
488 switch(s
->cmos_index
) {
489 case RTC_SECONDS_ALARM
:
490 case RTC_MINUTES_ALARM
:
491 case RTC_HOURS_ALARM
:
492 s
->cmos_data
[s
->cmos_index
] = data
;
493 check_update_timer(s
);
495 case RTC_IBM_PS2_CENTURY_BYTE
:
496 s
->cmos_index
= RTC_CENTURY
;
502 case RTC_DAY_OF_WEEK
:
503 case RTC_DAY_OF_MONTH
:
506 s
->cmos_data
[s
->cmos_index
] = data
;
507 /* if in set mode, do not update the time */
508 if (rtc_running(s
)) {
510 check_update_timer(s
);
514 update_periodic_timer
= (s
->cmos_data
[RTC_REG_A
] ^ data
) & 0x0f;
515 old_period
= rtc_periodic_clock_ticks(s
);
517 if ((data
& 0x60) == 0x60) {
518 if (rtc_running(s
)) {
521 /* What happens to UIP when divider reset is enabled is
522 * unclear from the datasheet. Shouldn't matter much
525 s
->cmos_data
[RTC_REG_A
] &= ~REG_A_UIP
;
526 } else if (((s
->cmos_data
[RTC_REG_A
] & 0x60) == 0x60) &&
527 (data
& 0x70) <= 0x20) {
528 /* when the divider reset is removed, the first update cycle
529 * begins one-half second later*/
530 if (!(s
->cmos_data
[RTC_REG_B
] & REG_B_SET
)) {
531 s
->offset
= 500000000;
534 s
->cmos_data
[RTC_REG_A
] &= ~REG_A_UIP
;
536 /* UIP bit is read only */
537 s
->cmos_data
[RTC_REG_A
] = (data
& ~REG_A_UIP
) |
538 (s
->cmos_data
[RTC_REG_A
] & REG_A_UIP
);
540 if (update_periodic_timer
) {
541 periodic_timer_update(s
, qemu_clock_get_ns(rtc_clock
),
545 check_update_timer(s
);
548 update_periodic_timer
= (s
->cmos_data
[RTC_REG_B
] ^ data
)
550 old_period
= rtc_periodic_clock_ticks(s
);
552 if (data
& REG_B_SET
) {
553 /* update cmos to when the rtc was stopping */
554 if (rtc_running(s
)) {
557 /* set mode: reset UIP mode */
558 s
->cmos_data
[RTC_REG_A
] &= ~REG_A_UIP
;
561 /* if disabling set mode, update the time */
562 if ((s
->cmos_data
[RTC_REG_B
] & REG_B_SET
) &&
563 (s
->cmos_data
[RTC_REG_A
] & 0x70) <= 0x20) {
564 s
->offset
= get_guest_rtc_ns(s
) % NANOSECONDS_PER_SECOND
;
568 /* if an interrupt flag is already set when the interrupt
569 * becomes enabled, raise an interrupt immediately. */
570 if (data
& s
->cmos_data
[RTC_REG_C
] & REG_C_MASK
) {
571 s
->cmos_data
[RTC_REG_C
] |= REG_C_IRQF
;
572 qemu_irq_raise(s
->irq
);
574 s
->cmos_data
[RTC_REG_C
] &= ~REG_C_IRQF
;
575 qemu_irq_lower(s
->irq
);
577 s
->cmos_data
[RTC_REG_B
] = data
;
579 if (update_periodic_timer
) {
580 periodic_timer_update(s
, qemu_clock_get_ns(rtc_clock
),
584 check_update_timer(s
);
588 /* cannot write to them */
591 s
->cmos_data
[s
->cmos_index
] = data
;
597 static inline int rtc_to_bcd(RTCState
*s
, int a
)
599 if (s
->cmos_data
[RTC_REG_B
] & REG_B_DM
) {
602 return ((a
/ 10) << 4) | (a
% 10);
606 static inline int rtc_from_bcd(RTCState
*s
, int a
)
608 if ((a
& 0xc0) == 0xc0) {
611 if (s
->cmos_data
[RTC_REG_B
] & REG_B_DM
) {
614 return ((a
>> 4) * 10) + (a
& 0x0f);
618 static void rtc_get_time(RTCState
*s
, struct tm
*tm
)
620 tm
->tm_sec
= rtc_from_bcd(s
, s
->cmos_data
[RTC_SECONDS
]);
621 tm
->tm_min
= rtc_from_bcd(s
, s
->cmos_data
[RTC_MINUTES
]);
622 tm
->tm_hour
= rtc_from_bcd(s
, s
->cmos_data
[RTC_HOURS
] & 0x7f);
623 if (!(s
->cmos_data
[RTC_REG_B
] & REG_B_24H
)) {
625 if (s
->cmos_data
[RTC_HOURS
] & 0x80) {
629 tm
->tm_wday
= rtc_from_bcd(s
, s
->cmos_data
[RTC_DAY_OF_WEEK
]) - 1;
630 tm
->tm_mday
= rtc_from_bcd(s
, s
->cmos_data
[RTC_DAY_OF_MONTH
]);
631 tm
->tm_mon
= rtc_from_bcd(s
, s
->cmos_data
[RTC_MONTH
]) - 1;
633 rtc_from_bcd(s
, s
->cmos_data
[RTC_YEAR
]) + s
->base_year
+
634 rtc_from_bcd(s
, s
->cmos_data
[RTC_CENTURY
]) * 100 - 1900;
637 static void rtc_set_time(RTCState
*s
)
641 rtc_get_time(s
, &tm
);
642 s
->base_rtc
= mktimegm(&tm
);
643 s
->last_update
= qemu_clock_get_ns(rtc_clock
);
645 qapi_event_send_rtc_change(qemu_timedate_diff(&tm
));
648 static void rtc_set_cmos(RTCState
*s
, const struct tm
*tm
)
652 s
->cmos_data
[RTC_SECONDS
] = rtc_to_bcd(s
, tm
->tm_sec
);
653 s
->cmos_data
[RTC_MINUTES
] = rtc_to_bcd(s
, tm
->tm_min
);
654 if (s
->cmos_data
[RTC_REG_B
] & REG_B_24H
) {
656 s
->cmos_data
[RTC_HOURS
] = rtc_to_bcd(s
, tm
->tm_hour
);
659 int h
= (tm
->tm_hour
% 12) ? tm
->tm_hour
% 12 : 12;
660 s
->cmos_data
[RTC_HOURS
] = rtc_to_bcd(s
, h
);
661 if (tm
->tm_hour
>= 12)
662 s
->cmos_data
[RTC_HOURS
] |= 0x80;
664 s
->cmos_data
[RTC_DAY_OF_WEEK
] = rtc_to_bcd(s
, tm
->tm_wday
+ 1);
665 s
->cmos_data
[RTC_DAY_OF_MONTH
] = rtc_to_bcd(s
, tm
->tm_mday
);
666 s
->cmos_data
[RTC_MONTH
] = rtc_to_bcd(s
, tm
->tm_mon
+ 1);
667 year
= tm
->tm_year
+ 1900 - s
->base_year
;
668 s
->cmos_data
[RTC_YEAR
] = rtc_to_bcd(s
, year
% 100);
669 s
->cmos_data
[RTC_CENTURY
] = rtc_to_bcd(s
, year
/ 100);
672 static void rtc_update_time(RTCState
*s
)
678 guest_nsec
= get_guest_rtc_ns(s
);
679 guest_sec
= guest_nsec
/ NANOSECONDS_PER_SECOND
;
680 gmtime_r(&guest_sec
, &ret
);
682 /* Is SET flag of Register B disabled? */
683 if ((s
->cmos_data
[RTC_REG_B
] & REG_B_SET
) == 0) {
684 rtc_set_cmos(s
, &ret
);
688 static int update_in_progress(RTCState
*s
)
692 if (!rtc_running(s
)) {
695 if (timer_pending(s
->update_timer
)) {
696 int64_t next_update_time
= timer_expire_time_ns(s
->update_timer
);
697 /* Latch UIP until the timer expires. */
698 if (qemu_clock_get_ns(rtc_clock
) >=
699 (next_update_time
- UIP_HOLD_LENGTH
)) {
700 s
->cmos_data
[RTC_REG_A
] |= REG_A_UIP
;
705 guest_nsec
= get_guest_rtc_ns(s
);
706 /* UIP bit will be set at last 244us of every second. */
707 if ((guest_nsec
% NANOSECONDS_PER_SECOND
) >=
708 (NANOSECONDS_PER_SECOND
- UIP_HOLD_LENGTH
)) {
714 static uint64_t cmos_ioport_read(void *opaque
, hwaddr addr
,
717 RTCState
*s
= opaque
;
719 if ((addr
& 1) == 0) {
722 switch(s
->cmos_index
) {
723 case RTC_IBM_PS2_CENTURY_BYTE
:
724 s
->cmos_index
= RTC_CENTURY
;
730 case RTC_DAY_OF_WEEK
:
731 case RTC_DAY_OF_MONTH
:
734 /* if not in set mode, calibrate cmos before
736 if (rtc_running(s
)) {
739 ret
= s
->cmos_data
[s
->cmos_index
];
742 ret
= s
->cmos_data
[s
->cmos_index
];
743 if (update_in_progress(s
)) {
748 ret
= s
->cmos_data
[s
->cmos_index
];
749 qemu_irq_lower(s
->irq
);
750 s
->cmos_data
[RTC_REG_C
] = 0x00;
751 if (ret
& (REG_C_UF
| REG_C_AF
)) {
752 check_update_timer(s
);
755 if(s
->irq_coalesced
&&
756 (s
->cmos_data
[RTC_REG_B
] & REG_B_PIE
) &&
757 s
->irq_reinject_on_ack_count
< RTC_REINJECT_ON_ACK_COUNT
) {
758 s
->irq_reinject_on_ack_count
++;
759 s
->cmos_data
[RTC_REG_C
] |= REG_C_IRQF
| REG_C_PF
;
760 DPRINTF_C("cmos: injecting on ack\n");
761 if (rtc_policy_slew_deliver_irq(s
)) {
763 DPRINTF_C("cmos: coalesced irqs decreased to %d\n",
769 ret
= s
->cmos_data
[s
->cmos_index
];
772 CMOS_DPRINTF("cmos: read index=0x%02x val=0x%02x\n",
778 void rtc_set_memory(ISADevice
*dev
, int addr
, int val
)
780 RTCState
*s
= MC146818_RTC(dev
);
781 if (addr
>= 0 && addr
<= 127)
782 s
->cmos_data
[addr
] = val
;
785 int rtc_get_memory(ISADevice
*dev
, int addr
)
787 RTCState
*s
= MC146818_RTC(dev
);
788 assert(addr
>= 0 && addr
<= 127);
789 return s
->cmos_data
[addr
];
792 static void rtc_set_date_from_host(ISADevice
*dev
)
794 RTCState
*s
= MC146818_RTC(dev
);
797 qemu_get_timedate(&tm
, 0);
799 s
->base_rtc
= mktimegm(&tm
);
800 s
->last_update
= qemu_clock_get_ns(rtc_clock
);
803 /* set the CMOS date */
804 rtc_set_cmos(s
, &tm
);
807 static int rtc_pre_save(void *opaque
)
809 RTCState
*s
= opaque
;
816 static int rtc_post_load(void *opaque
, int version_id
)
818 RTCState
*s
= opaque
;
820 if (version_id
<= 2 || rtc_clock
== QEMU_CLOCK_REALTIME
) {
823 check_update_timer(s
);
826 /* The periodic timer is deterministic in record/replay mode,
827 * so there is no need to update it after loading the vmstate.
828 * Reading RTC here would misalign record and replay.
830 if (replay_mode
== REPLAY_MODE_NONE
) {
831 uint64_t now
= qemu_clock_get_ns(rtc_clock
);
832 if (now
< s
->next_periodic_time
||
833 now
> (s
->next_periodic_time
+ get_max_clock_jump())) {
834 periodic_timer_update(s
, qemu_clock_get_ns(rtc_clock
), 0);
838 if (version_id
>= 2) {
839 if (s
->lost_tick_policy
== LOST_TICK_POLICY_SLEW
) {
840 rtc_coalesced_timer_update(s
);
846 static bool rtc_irq_reinject_on_ack_count_needed(void *opaque
)
848 RTCState
*s
= (RTCState
*)opaque
;
849 return s
->irq_reinject_on_ack_count
!= 0;
852 static const VMStateDescription vmstate_rtc_irq_reinject_on_ack_count
= {
853 .name
= "mc146818rtc/irq_reinject_on_ack_count",
855 .minimum_version_id
= 1,
856 .needed
= rtc_irq_reinject_on_ack_count_needed
,
857 .fields
= (VMStateField
[]) {
858 VMSTATE_UINT16(irq_reinject_on_ack_count
, RTCState
),
859 VMSTATE_END_OF_LIST()
863 static const VMStateDescription vmstate_rtc
= {
864 .name
= "mc146818rtc",
866 .minimum_version_id
= 1,
867 .pre_save
= rtc_pre_save
,
868 .post_load
= rtc_post_load
,
869 .fields
= (VMStateField
[]) {
870 VMSTATE_BUFFER(cmos_data
, RTCState
),
871 VMSTATE_UINT8(cmos_index
, RTCState
),
873 VMSTATE_TIMER_PTR(periodic_timer
, RTCState
),
874 VMSTATE_INT64(next_periodic_time
, RTCState
),
876 VMSTATE_UINT32_V(irq_coalesced
, RTCState
, 2),
877 VMSTATE_UINT32_V(period
, RTCState
, 2),
878 VMSTATE_UINT64_V(base_rtc
, RTCState
, 3),
879 VMSTATE_UINT64_V(last_update
, RTCState
, 3),
880 VMSTATE_INT64_V(offset
, RTCState
, 3),
881 VMSTATE_TIMER_PTR_V(update_timer
, RTCState
, 3),
882 VMSTATE_UINT64_V(next_alarm_time
, RTCState
, 3),
883 VMSTATE_END_OF_LIST()
885 .subsections
= (const VMStateDescription
*[]) {
886 &vmstate_rtc_irq_reinject_on_ack_count
,
891 static void rtc_notify_clock_reset(Notifier
*notifier
, void *data
)
893 RTCState
*s
= container_of(notifier
, RTCState
, clock_reset_notifier
);
894 int64_t now
= *(int64_t *)data
;
896 rtc_set_date_from_host(ISA_DEVICE(s
));
897 periodic_timer_update(s
, now
, 0);
898 check_update_timer(s
);
900 if (s
->lost_tick_policy
== LOST_TICK_POLICY_SLEW
) {
901 rtc_coalesced_timer_update(s
);
905 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
906 BIOS will read it and start S3 resume at POST Entry */
907 static void rtc_notify_suspend(Notifier
*notifier
, void *data
)
909 RTCState
*s
= container_of(notifier
, RTCState
, suspend_notifier
);
910 rtc_set_memory(ISA_DEVICE(s
), 0xF, 0xFE);
913 static void rtc_reset(void *opaque
)
915 RTCState
*s
= opaque
;
917 s
->cmos_data
[RTC_REG_B
] &= ~(REG_B_PIE
| REG_B_AIE
| REG_B_SQWE
);
918 s
->cmos_data
[RTC_REG_C
] &= ~(REG_C_UF
| REG_C_IRQF
| REG_C_PF
| REG_C_AF
);
919 check_update_timer(s
);
921 qemu_irq_lower(s
->irq
);
923 if (s
->lost_tick_policy
== LOST_TICK_POLICY_SLEW
) {
924 s
->irq_coalesced
= 0;
925 s
->irq_reinject_on_ack_count
= 0;
929 static const MemoryRegionOps cmos_ops
= {
930 .read
= cmos_ioport_read
,
931 .write
= cmos_ioport_write
,
933 .min_access_size
= 1,
934 .max_access_size
= 1,
936 .endianness
= DEVICE_LITTLE_ENDIAN
,
939 static void rtc_get_date(Object
*obj
, struct tm
*current_tm
, Error
**errp
)
941 RTCState
*s
= MC146818_RTC(obj
);
944 rtc_get_time(s
, current_tm
);
947 static void rtc_realizefn(DeviceState
*dev
, Error
**errp
)
949 ISADevice
*isadev
= ISA_DEVICE(dev
);
950 RTCState
*s
= MC146818_RTC(dev
);
953 s
->cmos_data
[RTC_REG_A
] = 0x26;
954 s
->cmos_data
[RTC_REG_B
] = 0x02;
955 s
->cmos_data
[RTC_REG_C
] = 0x00;
956 s
->cmos_data
[RTC_REG_D
] = 0x80;
958 /* This is for historical reasons. The default base year qdev property
959 * was set to 2000 for most machine types before the century byte was
962 * This if statement means that the century byte will be always 0
963 * (at least until 2079...) for base_year = 1980, but will be set
964 * correctly for base_year = 2000.
966 if (s
->base_year
== 2000) {
970 rtc_set_date_from_host(isadev
);
972 switch (s
->lost_tick_policy
) {
974 case LOST_TICK_POLICY_SLEW
:
976 timer_new_ns(rtc_clock
, rtc_coalesced_timer
, s
);
979 case LOST_TICK_POLICY_DISCARD
:
982 error_setg(errp
, "Invalid lost tick policy.");
986 s
->periodic_timer
= timer_new_ns(rtc_clock
, rtc_periodic_timer
, s
);
987 s
->update_timer
= timer_new_ns(rtc_clock
, rtc_update_timer
, s
);
988 check_update_timer(s
);
990 s
->clock_reset_notifier
.notify
= rtc_notify_clock_reset
;
991 qemu_clock_register_reset_notifier(rtc_clock
,
992 &s
->clock_reset_notifier
);
994 s
->suspend_notifier
.notify
= rtc_notify_suspend
;
995 qemu_register_suspend_notifier(&s
->suspend_notifier
);
997 memory_region_init_io(&s
->io
, OBJECT(s
), &cmos_ops
, s
, "rtc", 2);
998 isa_register_ioport(isadev
, &s
->io
, base
);
1000 /* register rtc 0x70 port for coalesced_pio */
1001 memory_region_set_flush_coalesced(&s
->io
);
1002 memory_region_init_io(&s
->coalesced_io
, OBJECT(s
), &cmos_ops
,
1004 memory_region_add_subregion(&s
->io
, 0, &s
->coalesced_io
);
1005 memory_region_add_coalescing(&s
->coalesced_io
, 0, 1);
1007 qdev_set_legacy_instance_id(dev
, base
, 3);
1008 qemu_register_reset(rtc_reset
, s
);
1010 object_property_add_tm(OBJECT(s
), "date", rtc_get_date
, NULL
);
1012 qdev_init_gpio_out(dev
, &s
->irq
, 1);
1015 ISADevice
*mc146818_rtc_init(ISABus
*bus
, int base_year
, qemu_irq intercept_irq
)
1021 isadev
= isa_create(bus
, TYPE_MC146818_RTC
);
1022 dev
= DEVICE(isadev
);
1023 s
= MC146818_RTC(isadev
);
1024 qdev_prop_set_int32(dev
, "base_year", base_year
);
1025 qdev_init_nofail(dev
);
1026 if (intercept_irq
) {
1027 qdev_connect_gpio_out(dev
, 0, intercept_irq
);
1029 isa_connect_gpio_out(isadev
, 0, RTC_ISA_IRQ
);
1031 QLIST_INSERT_HEAD(&rtc_devices
, s
, link
);
1033 object_property_add_alias(qdev_get_machine(), "rtc-time", OBJECT(s
),
1039 static Property mc146818rtc_properties
[] = {
1040 DEFINE_PROP_INT32("base_year", RTCState
, base_year
, 1980),
1041 DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", RTCState
,
1042 lost_tick_policy
, LOST_TICK_POLICY_DISCARD
),
1043 DEFINE_PROP_END_OF_LIST(),
1046 static void rtc_resetdev(DeviceState
*d
)
1048 RTCState
*s
= MC146818_RTC(d
);
1050 /* Reason: VM do suspend self will set 0xfe
1051 * Reset any values other than 0xfe(Guest suspend case) */
1052 if (s
->cmos_data
[0x0f] != 0xfe) {
1053 s
->cmos_data
[0x0f] = 0x00;
1057 static void rtc_class_initfn(ObjectClass
*klass
, void *data
)
1059 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1061 dc
->realize
= rtc_realizefn
;
1062 dc
->reset
= rtc_resetdev
;
1063 dc
->vmsd
= &vmstate_rtc
;
1064 dc
->props
= mc146818rtc_properties
;
1065 /* Reason: needs to be wired up by rtc_init() */
1066 dc
->user_creatable
= false;
1069 static const TypeInfo mc146818rtc_info
= {
1070 .name
= TYPE_MC146818_RTC
,
1071 .parent
= TYPE_ISA_DEVICE
,
1072 .instance_size
= sizeof(RTCState
),
1073 .class_init
= rtc_class_initfn
,
1076 static void mc146818rtc_register_types(void)
1078 type_register_static(&mc146818rtc_info
);
1081 type_init(mc146818rtc_register_types
)