2 * QEMU Uninorth PCI host (for all Mac99 and newer machines)
4 * Copyright (c) 2006 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
33 #define UNIN_DPRINTF(fmt, ...) \
34 do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
36 #define UNIN_DPRINTF(fmt, ...)
39 typedef struct UNINState
{
41 PCIHostState host_state
;
44 /* Don't know if this matches real hardware, but it agrees with OHW. */
45 static int pci_unin_map_irq(PCIDevice
*pci_dev
, int irq_num
)
47 return (irq_num
+ (pci_dev
->devfn
>> 3)) & 3;
50 static void pci_unin_set_irq(void *opaque
, int irq_num
, int level
)
52 qemu_irq
*pic
= opaque
;
54 qemu_set_irq(pic
[irq_num
+ 8], level
);
57 static void pci_unin_save(QEMUFile
* f
, void *opaque
)
59 PCIDevice
*d
= opaque
;
61 pci_device_save(d
, f
);
64 static int pci_unin_load(QEMUFile
* f
, void *opaque
, int version_id
)
66 PCIDevice
*d
= opaque
;
71 return pci_device_load(d
, f
);
74 static void pci_unin_reset(void *opaque
)
78 static int pci_unin_main_init_device(SysBusDevice
*dev
)
81 int pci_mem_config
, pci_mem_data
;
83 /* Use values found on a real PowerMac */
84 /* Uninorth main bus */
85 s
= FROM_SYSBUS(UNINState
, dev
);
87 pci_mem_config
= pci_host_config_register_io_memory(&s
->host_state
);
88 pci_mem_data
= pci_host_data_register_io_memory(&s
->host_state
);
89 sysbus_init_mmio(dev
, 0x1000, pci_mem_config
);
90 sysbus_init_mmio(dev
, 0x1000, pci_mem_data
);
92 register_savevm("uninorth", 0, 1, pci_unin_save
, pci_unin_load
, &s
->host_state
);
93 qemu_register_reset(pci_unin_reset
, &s
->host_state
);
97 static int pci_dec_21154_init_device(SysBusDevice
*dev
)
100 int pci_mem_config
, pci_mem_data
;
102 /* Uninorth bridge */
103 s
= FROM_SYSBUS(UNINState
, dev
);
105 // XXX: s = &pci_bridge[2];
106 pci_mem_config
= pci_host_config_register_io_memory_noswap(&s
->host_state
);
107 pci_mem_data
= pci_host_data_register_io_memory(&s
->host_state
);
108 sysbus_init_mmio(dev
, 0x1000, pci_mem_config
);
109 sysbus_init_mmio(dev
, 0x1000, pci_mem_data
);
113 static int pci_unin_agp_init_device(SysBusDevice
*dev
)
116 int pci_mem_config
, pci_mem_data
;
118 /* Uninorth AGP bus */
119 s
= FROM_SYSBUS(UNINState
, dev
);
121 pci_mem_config
= pci_host_config_register_io_memory_noswap(&s
->host_state
);
122 pci_mem_data
= pci_host_data_register_io_memory(&s
->host_state
);
123 sysbus_init_mmio(dev
, 0x1000, pci_mem_config
);
124 sysbus_init_mmio(dev
, 0x1000, pci_mem_data
);
128 static int pci_unin_internal_init_device(SysBusDevice
*dev
)
131 int pci_mem_config
, pci_mem_data
;
133 /* Uninorth internal bus */
134 s
= FROM_SYSBUS(UNINState
, dev
);
136 pci_mem_config
= pci_host_config_register_io_memory_noswap(&s
->host_state
);
137 pci_mem_data
= pci_host_data_register_io_memory(&s
->host_state
);
138 sysbus_init_mmio(dev
, 0x1000, pci_mem_config
);
139 sysbus_init_mmio(dev
, 0x1000, pci_mem_data
);
143 PCIBus
*pci_pmac_init(qemu_irq
*pic
)
149 /* Use values found on a real PowerMac */
150 /* Uninorth main bus */
151 dev
= qdev_create(NULL
, "Uni-north main");
152 qdev_init_nofail(dev
);
153 s
= sysbus_from_qdev(dev
);
154 d
= FROM_SYSBUS(UNINState
, s
);
155 d
->host_state
.bus
= pci_register_bus(&d
->busdev
.qdev
, "pci",
156 pci_unin_set_irq
, pci_unin_map_irq
,
160 pci_create_simple(d
->host_state
.bus
, 11 << 3, "Uni-north main");
163 sysbus_mmio_map(s
, 0, 0xf2800000);
164 sysbus_mmio_map(s
, 1, 0xf2c00000);
166 /* DEC 21154 bridge */
168 /* XXX: not activated as PPC BIOS doesn't handle multiple buses properly */
169 pci_create_simple(d
->host_state
.bus
, 12 << 3, "DEC 21154");
172 /* Uninorth AGP bus */
173 pci_create_simple(d
->host_state
.bus
, 11 << 3, "Uni-north AGP");
175 /* Uninorth internal bus */
177 /* XXX: not needed for now */
178 pci_create_simple(d
->host_state
.bus
, 14 << 3, "Uni-north internal");
181 return d
->host_state
.bus
;
184 static int unin_main_pci_host_init(PCIDevice
*d
)
186 pci_config_set_vendor_id(d
->config
, PCI_VENDOR_ID_APPLE
);
187 pci_config_set_device_id(d
->config
, PCI_DEVICE_ID_APPLE_UNI_N_PCI
);
188 d
->config
[0x08] = 0x00; // revision
189 pci_config_set_class(d
->config
, PCI_CLASS_BRIDGE_HOST
);
190 d
->config
[0x0C] = 0x08; // cache_line_size
191 d
->config
[0x0D] = 0x10; // latency_timer
192 d
->config
[PCI_HEADER_TYPE
] = PCI_HEADER_TYPE_NORMAL
; // header_type
193 d
->config
[0x34] = 0x00; // capabilities_pointer
197 static int dec_21154_pci_host_init(PCIDevice
*d
)
199 /* pci-to-pci bridge */
200 pci_config_set_vendor_id(d
->config
, PCI_VENDOR_ID_DEC
);
201 pci_config_set_device_id(d
->config
, PCI_DEVICE_ID_DEC_21154
);
202 d
->config
[0x08] = 0x05; // revision
203 pci_config_set_class(d
->config
, PCI_CLASS_BRIDGE_PCI
);
204 d
->config
[0x0C] = 0x08; // cache_line_size
205 d
->config
[0x0D] = 0x20; // latency_timer
206 d
->config
[PCI_HEADER_TYPE
] = PCI_HEADER_TYPE_BRIDGE
; // header_type
208 d
->config
[0x18] = 0x01; // primary_bus
209 d
->config
[0x19] = 0x02; // secondary_bus
210 d
->config
[0x1A] = 0x02; // subordinate_bus
211 d
->config
[0x1B] = 0x20; // secondary_latency_timer
212 d
->config
[0x1C] = 0x11; // io_base
213 d
->config
[0x1D] = 0x01; // io_limit
214 d
->config
[0x20] = 0x00; // memory_base
215 d
->config
[0x21] = 0x80;
216 d
->config
[0x22] = 0x00; // memory_limit
217 d
->config
[0x23] = 0x80;
218 d
->config
[0x24] = 0x01; // prefetchable_memory_base
219 d
->config
[0x25] = 0x80;
220 d
->config
[0x26] = 0xF1; // prefectchable_memory_limit
221 d
->config
[0x27] = 0x7F;
222 // d->config[0x34] = 0xdc // capabilities_pointer
226 static int unin_agp_pci_host_init(PCIDevice
*d
)
228 pci_config_set_vendor_id(d
->config
, PCI_VENDOR_ID_APPLE
);
229 pci_config_set_device_id(d
->config
, PCI_DEVICE_ID_APPLE_UNI_N_AGP
);
230 d
->config
[0x08] = 0x00; // revision
231 pci_config_set_class(d
->config
, PCI_CLASS_BRIDGE_HOST
);
232 d
->config
[0x0C] = 0x08; // cache_line_size
233 d
->config
[0x0D] = 0x10; // latency_timer
234 d
->config
[PCI_HEADER_TYPE
] = PCI_HEADER_TYPE_NORMAL
; // header_type
235 // d->config[0x34] = 0x80; // capabilities_pointer
239 static int unin_internal_pci_host_init(PCIDevice
*d
)
241 pci_config_set_vendor_id(d
->config
, PCI_VENDOR_ID_APPLE
);
242 pci_config_set_device_id(d
->config
, PCI_DEVICE_ID_APPLE_UNI_N_I_PCI
);
243 d
->config
[0x08] = 0x00; // revision
244 pci_config_set_class(d
->config
, PCI_CLASS_BRIDGE_HOST
);
245 d
->config
[0x0C] = 0x08; // cache_line_size
246 d
->config
[0x0D] = 0x10; // latency_timer
247 d
->config
[PCI_HEADER_TYPE
] = PCI_HEADER_TYPE_NORMAL
; // header_type
248 d
->config
[0x34] = 0x00; // capabilities_pointer
252 static PCIDeviceInfo unin_main_pci_host_info
= {
253 .qdev
.name
= "Uni-north main",
254 .qdev
.size
= sizeof(PCIDevice
),
255 .init
= unin_main_pci_host_init
,
258 static PCIDeviceInfo dec_21154_pci_host_info
= {
259 .qdev
.name
= "DEC 21154",
260 .qdev
.size
= sizeof(PCIDevice
),
261 .init
= dec_21154_pci_host_init
,
264 static PCIDeviceInfo unin_agp_pci_host_info
= {
265 .qdev
.name
= "Uni-north AGP",
266 .qdev
.size
= sizeof(PCIDevice
),
267 .init
= unin_agp_pci_host_init
,
270 static PCIDeviceInfo unin_internal_pci_host_info
= {
271 .qdev
.name
= "Uni-north internal",
272 .qdev
.size
= sizeof(PCIDevice
),
273 .init
= unin_internal_pci_host_init
,
276 static void unin_register_devices(void)
278 sysbus_register_dev("Uni-north main", sizeof(UNINState
),
279 pci_unin_main_init_device
);
280 pci_qdev_register(&unin_main_pci_host_info
);
281 sysbus_register_dev("DEC 21154", sizeof(UNINState
),
282 pci_dec_21154_init_device
);
283 pci_qdev_register(&dec_21154_pci_host_info
);
284 sysbus_register_dev("Uni-north AGP", sizeof(UNINState
),
285 pci_unin_agp_init_device
);
286 pci_qdev_register(&unin_agp_pci_host_info
);
287 sysbus_register_dev("Uni-north internal", sizeof(UNINState
),
288 pci_unin_internal_init_device
);
289 pci_qdev_register(&unin_internal_pci_host_info
);
292 device_init(unin_register_devices
)