2 * QEMU USB EHCI Emulation
4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2.1 of the License, or (at your option) any later version.
9 * This library is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
14 * You should have received a copy of the GNU Lesser General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 #include "qemu/osdep.h"
19 #include "hw/usb/hcd-ehci.h"
20 #include "qemu/module.h"
21 #include "qemu/range.h"
23 typedef struct EHCIPCIInfo
{
31 static void usb_ehci_pci_realize(PCIDevice
*dev
, Error
**errp
)
33 EHCIPCIState
*i
= PCI_EHCI(dev
);
34 EHCIState
*s
= &i
->ehci
;
35 uint8_t *pci_conf
= dev
->config
;
37 pci_set_byte(&pci_conf
[PCI_CLASS_PROG
], 0x20);
39 /* capabilities pointer */
40 pci_set_byte(&pci_conf
[PCI_CAPABILITY_LIST
], 0x00);
41 /* pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); */
43 pci_set_byte(&pci_conf
[PCI_INTERRUPT_PIN
], 4); /* interrupt pin D */
44 pci_set_byte(&pci_conf
[PCI_MIN_GNT
], 0);
45 pci_set_byte(&pci_conf
[PCI_MAX_LAT
], 0);
47 /* pci_conf[0x50] = 0x01; *//* power management caps */
49 pci_set_byte(&pci_conf
[USB_SBRN
], USB_RELEASE_2
); /* release # (2.1.4) */
50 pci_set_byte(&pci_conf
[0x61], 0x20); /* frame length adjustment (2.1.5) */
51 pci_set_word(&pci_conf
[0x62], 0x00); /* port wake up capability (2.1.6) */
53 pci_conf
[0x64] = 0x00;
54 pci_conf
[0x65] = 0x00;
55 pci_conf
[0x66] = 0x00;
56 pci_conf
[0x67] = 0x00;
57 pci_conf
[0x68] = 0x01;
58 pci_conf
[0x69] = 0x00;
59 pci_conf
[0x6a] = 0x00;
60 pci_conf
[0x6b] = 0x00; /* USBLEGSUP */
61 pci_conf
[0x6c] = 0x00;
62 pci_conf
[0x6d] = 0x00;
63 pci_conf
[0x6e] = 0x00;
64 pci_conf
[0x6f] = 0xc0; /* USBLEFCTLSTS */
66 s
->irq
= pci_allocate_irq(dev
);
67 s
->as
= pci_get_address_space(dev
);
69 usb_ehci_realize(s
, DEVICE(dev
), NULL
);
70 pci_register_bar(dev
, 0, PCI_BASE_ADDRESS_SPACE_MEMORY
, &s
->mem
);
73 static void usb_ehci_pci_init(Object
*obj
)
75 DeviceClass
*dc
= OBJECT_GET_CLASS(DeviceClass
, obj
, TYPE_DEVICE
);
76 EHCIPCIState
*i
= PCI_EHCI(obj
);
77 EHCIState
*s
= &i
->ehci
;
79 s
->caps
[0x09] = 0x68; /* EECP */
86 if (!dc
->hotpluggable
) {
87 s
->companion_enable
= true;
90 usb_ehci_init(s
, DEVICE(obj
));
93 static void usb_ehci_pci_finalize(Object
*obj
)
95 EHCIPCIState
*i
= PCI_EHCI(obj
);
96 EHCIState
*s
= &i
->ehci
;
101 static void usb_ehci_pci_exit(PCIDevice
*dev
)
103 EHCIPCIState
*i
= PCI_EHCI(dev
);
104 EHCIState
*s
= &i
->ehci
;
106 usb_ehci_unrealize(s
, DEVICE(dev
), NULL
);
112 static void usb_ehci_pci_reset(DeviceState
*dev
)
114 PCIDevice
*pci_dev
= PCI_DEVICE(dev
);
115 EHCIPCIState
*i
= PCI_EHCI(pci_dev
);
116 EHCIState
*s
= &i
->ehci
;
121 static void usb_ehci_pci_write_config(PCIDevice
*dev
, uint32_t addr
,
124 EHCIPCIState
*i
= PCI_EHCI(dev
);
127 pci_default_write_config(dev
, addr
, val
, l
);
129 if (!range_covers_byte(addr
, l
, PCI_COMMAND
)) {
132 busmaster
= pci_get_word(dev
->config
+ PCI_COMMAND
) & PCI_COMMAND_MASTER
;
133 i
->ehci
.as
= busmaster
? pci_get_address_space(dev
) : &address_space_memory
;
136 static Property ehci_pci_properties
[] = {
137 DEFINE_PROP_UINT32("maxframes", EHCIPCIState
, ehci
.maxframes
, 128),
138 DEFINE_PROP_END_OF_LIST(),
141 static const VMStateDescription vmstate_ehci_pci
= {
144 .minimum_version_id
= 1,
145 .fields
= (VMStateField
[]) {
146 VMSTATE_PCI_DEVICE(pcidev
, EHCIPCIState
),
147 VMSTATE_STRUCT(ehci
, EHCIPCIState
, 2, vmstate_ehci
, EHCIState
),
148 VMSTATE_END_OF_LIST()
152 static void ehci_class_init(ObjectClass
*klass
, void *data
)
154 DeviceClass
*dc
= DEVICE_CLASS(klass
);
155 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
157 k
->realize
= usb_ehci_pci_realize
;
158 k
->exit
= usb_ehci_pci_exit
;
159 k
->class_id
= PCI_CLASS_SERIAL_USB
;
160 k
->config_write
= usb_ehci_pci_write_config
;
161 dc
->vmsd
= &vmstate_ehci_pci
;
162 dc
->props
= ehci_pci_properties
;
163 dc
->reset
= usb_ehci_pci_reset
;
166 static const TypeInfo ehci_pci_type_info
= {
167 .name
= TYPE_PCI_EHCI
,
168 .parent
= TYPE_PCI_DEVICE
,
169 .instance_size
= sizeof(EHCIPCIState
),
170 .instance_init
= usb_ehci_pci_init
,
171 .instance_finalize
= usb_ehci_pci_finalize
,
173 .class_init
= ehci_class_init
,
174 .interfaces
= (InterfaceInfo
[]) {
175 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
180 static void ehci_data_class_init(ObjectClass
*klass
, void *data
)
182 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
183 DeviceClass
*dc
= DEVICE_CLASS(klass
);
184 EHCIPCIInfo
*i
= data
;
186 k
->vendor_id
= i
->vendor_id
;
187 k
->device_id
= i
->device_id
;
188 k
->revision
= i
->revision
;
189 set_bit(DEVICE_CATEGORY_USB
, dc
->categories
);
191 dc
->hotpluggable
= false;
195 static struct EHCIPCIInfo ehci_pci_info
[] = {
198 .vendor_id
= PCI_VENDOR_ID_INTEL
,
199 .device_id
= PCI_DEVICE_ID_INTEL_82801D
, /* ich4 */
202 .name
= "ich9-usb-ehci1", /* 00:1d.7 */
203 .vendor_id
= PCI_VENDOR_ID_INTEL
,
204 .device_id
= PCI_DEVICE_ID_INTEL_82801I_EHCI1
,
208 .name
= "ich9-usb-ehci2", /* 00:1a.7 */
209 .vendor_id
= PCI_VENDOR_ID_INTEL
,
210 .device_id
= PCI_DEVICE_ID_INTEL_82801I_EHCI2
,
216 static void ehci_pci_register_types(void)
218 TypeInfo ehci_type_info
= {
219 .parent
= TYPE_PCI_EHCI
,
220 .class_init
= ehci_data_class_init
,
224 type_register_static(&ehci_pci_type_info
);
226 for (i
= 0; i
< ARRAY_SIZE(ehci_pci_info
); i
++) {
227 ehci_type_info
.name
= ehci_pci_info
[i
].name
;
228 ehci_type_info
.class_data
= ehci_pci_info
+ i
;
229 type_register(&ehci_type_info
);
233 type_init(ehci_pci_register_types
)