2 * QEMU USB EHCI Emulation
4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2 of the License, or(at your option) any later version.
9 * This library is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu-timer.h"
31 #define DPRINTF printf
36 #define MMIO_SIZE 0x1000
37 #define CAPA_SIZE 0x10
40 #define PORTSC_BEGIN PORTSC
41 #define PORTSC_END (PORTSC + 4 * NB_PORTS)
43 #define NB_PORTS 6 /* Number of downstream ports */
45 typedef struct EHCIPacket EHCIPacket
;
46 typedef struct EHCIQueue EHCIQueue
;
47 typedef struct EHCIState EHCIState
;
49 /* EHCI spec version 1.0 Section 3.3
51 typedef struct EHCIitd
{
55 #define ITD_XACT_ACTIVE (1 << 31)
56 #define ITD_XACT_DBERROR (1 << 30)
57 #define ITD_XACT_BABBLE (1 << 29)
58 #define ITD_XACT_XACTERR (1 << 28)
59 #define ITD_XACT_LENGTH_MASK 0x0fff0000
60 #define ITD_XACT_LENGTH_SH 16
61 #define ITD_XACT_IOC (1 << 15)
62 #define ITD_XACT_PGSEL_MASK 0x00007000
63 #define ITD_XACT_PGSEL_SH 12
64 #define ITD_XACT_OFFSET_MASK 0x00000fff
67 #define ITD_BUFPTR_MASK 0xfffff000
68 #define ITD_BUFPTR_SH 12
69 #define ITD_BUFPTR_EP_MASK 0x00000f00
70 #define ITD_BUFPTR_EP_SH 8
71 #define ITD_BUFPTR_DEVADDR_MASK 0x0000007f
72 #define ITD_BUFPTR_DEVADDR_SH 0
73 #define ITD_BUFPTR_DIRECTION (1 << 11)
74 #define ITD_BUFPTR_MAXPKT_MASK 0x000007ff
75 #define ITD_BUFPTR_MAXPKT_SH 0
76 #define ITD_BUFPTR_MULT_MASK 0x00000003
77 #define ITD_BUFPTR_MULT_SH 0
80 /* EHCI spec version 1.0 Section 3.4
82 typedef struct EHCIsitd
{
83 uint32_t next
; /* Standard next link pointer */
85 #define SITD_EPCHAR_IO (1 << 31)
86 #define SITD_EPCHAR_PORTNUM_MASK 0x7f000000
87 #define SITD_EPCHAR_PORTNUM_SH 24
88 #define SITD_EPCHAR_HUBADD_MASK 0x007f0000
89 #define SITD_EPCHAR_HUBADDR_SH 16
90 #define SITD_EPCHAR_EPNUM_MASK 0x00000f00
91 #define SITD_EPCHAR_EPNUM_SH 8
92 #define SITD_EPCHAR_DEVADDR_MASK 0x0000007f
95 #define SITD_UFRAME_CMASK_MASK 0x0000ff00
96 #define SITD_UFRAME_CMASK_SH 8
97 #define SITD_UFRAME_SMASK_MASK 0x000000ff
100 #define SITD_RESULTS_IOC (1 << 31)
101 #define SITD_RESULTS_PGSEL (1 << 30)
102 #define SITD_RESULTS_TBYTES_MASK 0x03ff0000
103 #define SITD_RESULTS_TYBYTES_SH 16
104 #define SITD_RESULTS_CPROGMASK_MASK 0x0000ff00
105 #define SITD_RESULTS_CPROGMASK_SH 8
106 #define SITD_RESULTS_ACTIVE (1 << 7)
107 #define SITD_RESULTS_ERR (1 << 6)
108 #define SITD_RESULTS_DBERR (1 << 5)
109 #define SITD_RESULTS_BABBLE (1 << 4)
110 #define SITD_RESULTS_XACTERR (1 << 3)
111 #define SITD_RESULTS_MISSEDUF (1 << 2)
112 #define SITD_RESULTS_SPLITXSTATE (1 << 1)
115 #define SITD_BUFPTR_MASK 0xfffff000
116 #define SITD_BUFPTR_CURROFF_MASK 0x00000fff
117 #define SITD_BUFPTR_TPOS_MASK 0x00000018
118 #define SITD_BUFPTR_TPOS_SH 3
119 #define SITD_BUFPTR_TCNT_MASK 0x00000007
121 uint32_t backptr
; /* Standard next link pointer */
124 /* EHCI spec version 1.0 Section 3.5
126 typedef struct EHCIqtd
{
127 uint32_t next
; /* Standard next link pointer */
128 uint32_t altnext
; /* Standard next link pointer */
130 #define QTD_TOKEN_DTOGGLE (1 << 31)
131 #define QTD_TOKEN_TBYTES_MASK 0x7fff0000
132 #define QTD_TOKEN_TBYTES_SH 16
133 #define QTD_TOKEN_IOC (1 << 15)
134 #define QTD_TOKEN_CPAGE_MASK 0x00007000
135 #define QTD_TOKEN_CPAGE_SH 12
136 #define QTD_TOKEN_CERR_MASK 0x00000c00
137 #define QTD_TOKEN_CERR_SH 10
138 #define QTD_TOKEN_PID_MASK 0x00000300
139 #define QTD_TOKEN_PID_SH 8
140 #define QTD_TOKEN_ACTIVE (1 << 7)
141 #define QTD_TOKEN_HALT (1 << 6)
142 #define QTD_TOKEN_DBERR (1 << 5)
143 #define QTD_TOKEN_BABBLE (1 << 4)
144 #define QTD_TOKEN_XACTERR (1 << 3)
145 #define QTD_TOKEN_MISSEDUF (1 << 2)
146 #define QTD_TOKEN_SPLITXSTATE (1 << 1)
147 #define QTD_TOKEN_PING (1 << 0)
149 uint32_t bufptr
[5]; /* Standard buffer pointer */
150 #define QTD_BUFPTR_MASK 0xfffff000
151 #define QTD_BUFPTR_SH 12
154 /* EHCI spec version 1.0 Section 3.6
156 typedef struct EHCIqh
{
157 uint32_t next
; /* Standard next link pointer */
159 /* endpoint characteristics */
161 #define QH_EPCHAR_RL_MASK 0xf0000000
162 #define QH_EPCHAR_RL_SH 28
163 #define QH_EPCHAR_C (1 << 27)
164 #define QH_EPCHAR_MPLEN_MASK 0x07FF0000
165 #define QH_EPCHAR_MPLEN_SH 16
166 #define QH_EPCHAR_H (1 << 15)
167 #define QH_EPCHAR_DTC (1 << 14)
168 #define QH_EPCHAR_EPS_MASK 0x00003000
169 #define QH_EPCHAR_EPS_SH 12
170 #define EHCI_QH_EPS_FULL 0
171 #define EHCI_QH_EPS_LOW 1
172 #define EHCI_QH_EPS_HIGH 2
173 #define EHCI_QH_EPS_RESERVED 3
175 #define QH_EPCHAR_EP_MASK 0x00000f00
176 #define QH_EPCHAR_EP_SH 8
177 #define QH_EPCHAR_I (1 << 7)
178 #define QH_EPCHAR_DEVADDR_MASK 0x0000007f
179 #define QH_EPCHAR_DEVADDR_SH 0
181 /* endpoint capabilities */
183 #define QH_EPCAP_MULT_MASK 0xc0000000
184 #define QH_EPCAP_MULT_SH 30
185 #define QH_EPCAP_PORTNUM_MASK 0x3f800000
186 #define QH_EPCAP_PORTNUM_SH 23
187 #define QH_EPCAP_HUBADDR_MASK 0x007f0000
188 #define QH_EPCAP_HUBADDR_SH 16
189 #define QH_EPCAP_CMASK_MASK 0x0000ff00
190 #define QH_EPCAP_CMASK_SH 8
191 #define QH_EPCAP_SMASK_MASK 0x000000ff
192 #define QH_EPCAP_SMASK_SH 0
194 uint32_t current_qtd
; /* Standard next link pointer */
195 uint32_t next_qtd
; /* Standard next link pointer */
196 uint32_t altnext_qtd
;
197 #define QH_ALTNEXT_NAKCNT_MASK 0x0000001e
198 #define QH_ALTNEXT_NAKCNT_SH 1
200 uint32_t token
; /* Same as QTD token */
201 uint32_t bufptr
[5]; /* Standard buffer pointer */
202 #define BUFPTR_CPROGMASK_MASK 0x000000ff
203 #define BUFPTR_FRAMETAG_MASK 0x0000001f
204 #define BUFPTR_SBYTES_MASK 0x00000fe0
205 #define BUFPTR_SBYTES_SH 5
208 /* EHCI spec version 1.0 Section 3.7
210 typedef struct EHCIfstn
{
211 uint32_t next
; /* Standard next link pointer */
212 uint32_t backptr
; /* Standard next link pointer */
217 EHCI_ASYNC_INITIALIZED
,
224 QTAILQ_ENTRY(EHCIPacket
) next
;
226 EHCIqtd qtd
; /* copy of current QTD (being worked on) */
227 uint32_t qtdaddr
; /* address QTD read from */
232 enum async_state async
;
238 QTAILQ_ENTRY(EHCIQueue
) next
;
244 /* cached data from guest - needs to be flushed
245 * when guest removes an entry (doorbell, handshake sequence)
247 EHCIqh qh
; /* copy of current QH (being worked on) */
248 uint32_t qhaddr
; /* address QH read from */
249 uint32_t qtdaddr
; /* address QTD read from */
251 QTAILQ_HEAD(pkts_head
, EHCIPacket
) packets
;
254 typedef QTAILQ_HEAD(EHCIQueueHead
, EHCIQueue
) EHCIQueueHead
;
261 MemoryRegion mem_caps
;
262 MemoryRegion mem_opreg
;
263 MemoryRegion mem_ports
;
272 * EHCI spec version 1.0 Section 2.3
273 * Host Controller Operational Registers
275 uint8_t caps
[CAPA_SIZE
];
277 uint32_t opreg
[PORTSC_BEGIN
/sizeof(uint32_t)];
283 uint32_t ctrldssegment
;
284 uint32_t periodiclistbase
;
285 uint32_t asynclistaddr
;
290 uint32_t portsc
[NB_PORTS
];
293 * Internal states, shadow registers, etc
295 QEMUTimer
*frame_timer
;
297 uint32_t astate
; /* Current state in asynchronous schedule */
298 uint32_t pstate
; /* Current state in periodic schedule */
299 USBPort ports
[NB_PORTS
];
300 USBPort
*companion_ports
[NB_PORTS
];
301 uint32_t usbsts_pending
;
302 uint32_t usbsts_frindex
;
303 EHCIQueueHead aqueues
;
304 EHCIQueueHead pqueues
;
306 /* which address to look at next */
307 uint32_t a_fetch_addr
;
308 uint32_t p_fetch_addr
;
313 uint64_t last_run_ns
;
314 uint32_t async_stepdown
;
315 bool int_req_by_async
;
318 extern const VMStateDescription vmstate_ehci
;
320 void usb_ehci_initfn(EHCIState
*s
, DeviceState
*dev
);