2 * vfio based device assignment support
4 * Copyright Red Hat, Inc. 2012
7 * Alex Williamson <alex.williamson@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
12 * Based on qemu-kvm device-assignment:
13 * Adapted for KVM by Qumranet.
14 * Copyright (c) 2007, Neocleus, Alex Novik (alex@neocleus.com)
15 * Copyright (c) 2007, Neocleus, Guy Zana (guy@neocleus.com)
16 * Copyright (C) 2008, Qumranet, Amit Shah (amit.shah@qumranet.com)
17 * Copyright (C) 2008, Red Hat, Amit Shah (amit.shah@redhat.com)
18 * Copyright (C) 2008, IBM, Muli Ben-Yehuda (muli@il.ibm.com)
21 #include "qemu/osdep.h"
22 #include <linux/vfio.h>
23 #include <sys/ioctl.h>
25 #include "hw/pci/msi.h"
26 #include "hw/pci/msix.h"
27 #include "hw/pci/pci_bridge.h"
28 #include "qemu/error-report.h"
29 #include "qemu/range.h"
30 #include "sysemu/kvm.h"
31 #include "sysemu/sysemu.h"
34 #include "qapi/error.h"
36 #define MSIX_CAP_LENGTH 12
38 static void vfio_disable_interrupts(VFIOPCIDevice
*vdev
);
39 static void vfio_mmap_set_enabled(VFIOPCIDevice
*vdev
, bool enabled
);
42 * Disabling BAR mmaping can be slow, but toggling it around INTx can
43 * also be a huge overhead. We try to get the best of both worlds by
44 * waiting until an interrupt to disable mmaps (subsequent transitions
45 * to the same state are effectively no overhead). If the interrupt has
46 * been serviced and the time gap is long enough, we re-enable mmaps for
47 * performance. This works well for things like graphics cards, which
48 * may not use their interrupt at all and are penalized to an unusable
49 * level by read/write BAR traps. Other devices, like NICs, have more
50 * regular interrupts and see much better latency by staying in non-mmap
51 * mode. We therefore set the default mmap_timeout such that a ping
52 * is just enough to keep the mmap disabled. Users can experiment with
53 * other options with the x-intx-mmap-timeout-ms parameter (a value of
54 * zero disables the timer).
56 static void vfio_intx_mmap_enable(void *opaque
)
58 VFIOPCIDevice
*vdev
= opaque
;
60 if (vdev
->intx
.pending
) {
61 timer_mod(vdev
->intx
.mmap_timer
,
62 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL
) + vdev
->intx
.mmap_timeout
);
66 vfio_mmap_set_enabled(vdev
, true);
69 static void vfio_intx_interrupt(void *opaque
)
71 VFIOPCIDevice
*vdev
= opaque
;
73 if (!event_notifier_test_and_clear(&vdev
->intx
.interrupt
)) {
77 trace_vfio_intx_interrupt(vdev
->vbasedev
.name
, 'A' + vdev
->intx
.pin
);
79 vdev
->intx
.pending
= true;
80 pci_irq_assert(&vdev
->pdev
);
81 vfio_mmap_set_enabled(vdev
, false);
82 if (vdev
->intx
.mmap_timeout
) {
83 timer_mod(vdev
->intx
.mmap_timer
,
84 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL
) + vdev
->intx
.mmap_timeout
);
88 static void vfio_intx_eoi(VFIODevice
*vbasedev
)
90 VFIOPCIDevice
*vdev
= container_of(vbasedev
, VFIOPCIDevice
, vbasedev
);
92 if (!vdev
->intx
.pending
) {
96 trace_vfio_intx_eoi(vbasedev
->name
);
98 vdev
->intx
.pending
= false;
99 pci_irq_deassert(&vdev
->pdev
);
100 vfio_unmask_single_irqindex(vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
103 static void vfio_intx_enable_kvm(VFIOPCIDevice
*vdev
, Error
**errp
)
106 struct kvm_irqfd irqfd
= {
107 .fd
= event_notifier_get_fd(&vdev
->intx
.interrupt
),
108 .gsi
= vdev
->intx
.route
.irq
,
109 .flags
= KVM_IRQFD_FLAG_RESAMPLE
,
111 struct vfio_irq_set
*irq_set
;
115 if (vdev
->no_kvm_intx
|| !kvm_irqfds_enabled() ||
116 vdev
->intx
.route
.mode
!= PCI_INTX_ENABLED
||
117 !kvm_resamplefds_enabled()) {
121 /* Get to a known interrupt state */
122 qemu_set_fd_handler(irqfd
.fd
, NULL
, NULL
, vdev
);
123 vfio_mask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
124 vdev
->intx
.pending
= false;
125 pci_irq_deassert(&vdev
->pdev
);
127 /* Get an eventfd for resample/unmask */
128 if (event_notifier_init(&vdev
->intx
.unmask
, 0)) {
129 error_setg(errp
, "event_notifier_init failed eoi");
133 /* KVM triggers it, VFIO listens for it */
134 irqfd
.resamplefd
= event_notifier_get_fd(&vdev
->intx
.unmask
);
136 if (kvm_vm_ioctl(kvm_state
, KVM_IRQFD
, &irqfd
)) {
137 error_setg_errno(errp
, errno
, "failed to setup resample irqfd");
141 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
143 irq_set
= g_malloc0(argsz
);
144 irq_set
->argsz
= argsz
;
145 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
| VFIO_IRQ_SET_ACTION_UNMASK
;
146 irq_set
->index
= VFIO_PCI_INTX_IRQ_INDEX
;
149 pfd
= (int32_t *)&irq_set
->data
;
151 *pfd
= irqfd
.resamplefd
;
153 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
156 error_setg_errno(errp
, -ret
, "failed to setup INTx unmask fd");
161 vfio_unmask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
163 vdev
->intx
.kvm_accel
= true;
165 trace_vfio_intx_enable_kvm(vdev
->vbasedev
.name
);
170 irqfd
.flags
= KVM_IRQFD_FLAG_DEASSIGN
;
171 kvm_vm_ioctl(kvm_state
, KVM_IRQFD
, &irqfd
);
173 event_notifier_cleanup(&vdev
->intx
.unmask
);
175 qemu_set_fd_handler(irqfd
.fd
, vfio_intx_interrupt
, NULL
, vdev
);
176 vfio_unmask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
180 static void vfio_intx_disable_kvm(VFIOPCIDevice
*vdev
)
183 struct kvm_irqfd irqfd
= {
184 .fd
= event_notifier_get_fd(&vdev
->intx
.interrupt
),
185 .gsi
= vdev
->intx
.route
.irq
,
186 .flags
= KVM_IRQFD_FLAG_DEASSIGN
,
189 if (!vdev
->intx
.kvm_accel
) {
194 * Get to a known state, hardware masked, QEMU ready to accept new
195 * interrupts, QEMU IRQ de-asserted.
197 vfio_mask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
198 vdev
->intx
.pending
= false;
199 pci_irq_deassert(&vdev
->pdev
);
201 /* Tell KVM to stop listening for an INTx irqfd */
202 if (kvm_vm_ioctl(kvm_state
, KVM_IRQFD
, &irqfd
)) {
203 error_report("vfio: Error: Failed to disable INTx irqfd: %m");
206 /* We only need to close the eventfd for VFIO to cleanup the kernel side */
207 event_notifier_cleanup(&vdev
->intx
.unmask
);
209 /* QEMU starts listening for interrupt events. */
210 qemu_set_fd_handler(irqfd
.fd
, vfio_intx_interrupt
, NULL
, vdev
);
212 vdev
->intx
.kvm_accel
= false;
214 /* If we've missed an event, let it re-fire through QEMU */
215 vfio_unmask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
217 trace_vfio_intx_disable_kvm(vdev
->vbasedev
.name
);
221 static void vfio_intx_update(PCIDevice
*pdev
)
223 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
227 if (vdev
->interrupt
!= VFIO_INT_INTx
) {
231 route
= pci_device_route_intx_to_irq(&vdev
->pdev
, vdev
->intx
.pin
);
233 if (!pci_intx_route_changed(&vdev
->intx
.route
, &route
)) {
234 return; /* Nothing changed */
237 trace_vfio_intx_update(vdev
->vbasedev
.name
,
238 vdev
->intx
.route
.irq
, route
.irq
);
240 vfio_intx_disable_kvm(vdev
);
242 vdev
->intx
.route
= route
;
244 if (route
.mode
!= PCI_INTX_ENABLED
) {
248 vfio_intx_enable_kvm(vdev
, &err
);
250 error_reportf_err(err
, WARN_PREFIX
, vdev
->vbasedev
.name
);
253 /* Re-enable the interrupt in cased we missed an EOI */
254 vfio_intx_eoi(&vdev
->vbasedev
);
257 static int vfio_intx_enable(VFIOPCIDevice
*vdev
, Error
**errp
)
259 uint8_t pin
= vfio_pci_read_config(&vdev
->pdev
, PCI_INTERRUPT_PIN
, 1);
261 struct vfio_irq_set
*irq_set
;
269 vfio_disable_interrupts(vdev
);
271 vdev
->intx
.pin
= pin
- 1; /* Pin A (1) -> irq[0] */
272 pci_config_set_interrupt_pin(vdev
->pdev
.config
, pin
);
276 * Only conditional to avoid generating error messages on platforms
277 * where we won't actually use the result anyway.
279 if (kvm_irqfds_enabled() && kvm_resamplefds_enabled()) {
280 vdev
->intx
.route
= pci_device_route_intx_to_irq(&vdev
->pdev
,
285 ret
= event_notifier_init(&vdev
->intx
.interrupt
, 0);
287 error_setg_errno(errp
, -ret
, "event_notifier_init failed");
291 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
293 irq_set
= g_malloc0(argsz
);
294 irq_set
->argsz
= argsz
;
295 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
| VFIO_IRQ_SET_ACTION_TRIGGER
;
296 irq_set
->index
= VFIO_PCI_INTX_IRQ_INDEX
;
299 pfd
= (int32_t *)&irq_set
->data
;
301 *pfd
= event_notifier_get_fd(&vdev
->intx
.interrupt
);
302 qemu_set_fd_handler(*pfd
, vfio_intx_interrupt
, NULL
, vdev
);
304 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
307 error_setg_errno(errp
, -ret
, "failed to setup INTx fd");
308 qemu_set_fd_handler(*pfd
, NULL
, NULL
, vdev
);
309 event_notifier_cleanup(&vdev
->intx
.interrupt
);
313 vfio_intx_enable_kvm(vdev
, &err
);
315 error_reportf_err(err
, WARN_PREFIX
, vdev
->vbasedev
.name
);
318 vdev
->interrupt
= VFIO_INT_INTx
;
320 trace_vfio_intx_enable(vdev
->vbasedev
.name
);
325 static void vfio_intx_disable(VFIOPCIDevice
*vdev
)
329 timer_del(vdev
->intx
.mmap_timer
);
330 vfio_intx_disable_kvm(vdev
);
331 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
332 vdev
->intx
.pending
= false;
333 pci_irq_deassert(&vdev
->pdev
);
334 vfio_mmap_set_enabled(vdev
, true);
336 fd
= event_notifier_get_fd(&vdev
->intx
.interrupt
);
337 qemu_set_fd_handler(fd
, NULL
, NULL
, vdev
);
338 event_notifier_cleanup(&vdev
->intx
.interrupt
);
340 vdev
->interrupt
= VFIO_INT_NONE
;
342 trace_vfio_intx_disable(vdev
->vbasedev
.name
);
348 static void vfio_msi_interrupt(void *opaque
)
350 VFIOMSIVector
*vector
= opaque
;
351 VFIOPCIDevice
*vdev
= vector
->vdev
;
352 MSIMessage (*get_msg
)(PCIDevice
*dev
, unsigned vector
);
353 void (*notify
)(PCIDevice
*dev
, unsigned vector
);
355 int nr
= vector
- vdev
->msi_vectors
;
357 if (!event_notifier_test_and_clear(&vector
->interrupt
)) {
361 if (vdev
->interrupt
== VFIO_INT_MSIX
) {
362 get_msg
= msix_get_message
;
363 notify
= msix_notify
;
365 /* A masked vector firing needs to use the PBA, enable it */
366 if (msix_is_masked(&vdev
->pdev
, nr
)) {
367 set_bit(nr
, vdev
->msix
->pending
);
368 memory_region_set_enabled(&vdev
->pdev
.msix_pba_mmio
, true);
369 trace_vfio_msix_pba_enable(vdev
->vbasedev
.name
);
371 } else if (vdev
->interrupt
== VFIO_INT_MSI
) {
372 get_msg
= msi_get_message
;
378 msg
= get_msg(&vdev
->pdev
, nr
);
379 trace_vfio_msi_interrupt(vdev
->vbasedev
.name
, nr
, msg
.address
, msg
.data
);
380 notify(&vdev
->pdev
, nr
);
383 static int vfio_enable_vectors(VFIOPCIDevice
*vdev
, bool msix
)
385 struct vfio_irq_set
*irq_set
;
386 int ret
= 0, i
, argsz
;
389 argsz
= sizeof(*irq_set
) + (vdev
->nr_vectors
* sizeof(*fds
));
391 irq_set
= g_malloc0(argsz
);
392 irq_set
->argsz
= argsz
;
393 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
| VFIO_IRQ_SET_ACTION_TRIGGER
;
394 irq_set
->index
= msix
? VFIO_PCI_MSIX_IRQ_INDEX
: VFIO_PCI_MSI_IRQ_INDEX
;
396 irq_set
->count
= vdev
->nr_vectors
;
397 fds
= (int32_t *)&irq_set
->data
;
399 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
403 * MSI vs MSI-X - The guest has direct access to MSI mask and pending
404 * bits, therefore we always use the KVM signaling path when setup.
405 * MSI-X mask and pending bits are emulated, so we want to use the
406 * KVM signaling path only when configured and unmasked.
408 if (vdev
->msi_vectors
[i
].use
) {
409 if (vdev
->msi_vectors
[i
].virq
< 0 ||
410 (msix
&& msix_is_masked(&vdev
->pdev
, i
))) {
411 fd
= event_notifier_get_fd(&vdev
->msi_vectors
[i
].interrupt
);
413 fd
= event_notifier_get_fd(&vdev
->msi_vectors
[i
].kvm_interrupt
);
420 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
427 static void vfio_add_kvm_msi_virq(VFIOPCIDevice
*vdev
, VFIOMSIVector
*vector
,
428 int vector_n
, bool msix
)
432 if ((msix
&& vdev
->no_kvm_msix
) || (!msix
&& vdev
->no_kvm_msi
)) {
436 if (event_notifier_init(&vector
->kvm_interrupt
, 0)) {
440 virq
= kvm_irqchip_add_msi_route(kvm_state
, vector_n
, &vdev
->pdev
);
442 event_notifier_cleanup(&vector
->kvm_interrupt
);
446 if (kvm_irqchip_add_irqfd_notifier_gsi(kvm_state
, &vector
->kvm_interrupt
,
448 kvm_irqchip_release_virq(kvm_state
, virq
);
449 event_notifier_cleanup(&vector
->kvm_interrupt
);
456 static void vfio_remove_kvm_msi_virq(VFIOMSIVector
*vector
)
458 kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state
, &vector
->kvm_interrupt
,
460 kvm_irqchip_release_virq(kvm_state
, vector
->virq
);
462 event_notifier_cleanup(&vector
->kvm_interrupt
);
465 static void vfio_update_kvm_msi_virq(VFIOMSIVector
*vector
, MSIMessage msg
,
468 kvm_irqchip_update_msi_route(kvm_state
, vector
->virq
, msg
, pdev
);
469 kvm_irqchip_commit_routes(kvm_state
);
472 static int vfio_msix_vector_do_use(PCIDevice
*pdev
, unsigned int nr
,
473 MSIMessage
*msg
, IOHandler
*handler
)
475 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
476 VFIOMSIVector
*vector
;
479 trace_vfio_msix_vector_do_use(vdev
->vbasedev
.name
, nr
);
481 vector
= &vdev
->msi_vectors
[nr
];
486 if (event_notifier_init(&vector
->interrupt
, 0)) {
487 error_report("vfio: Error: event_notifier_init failed");
490 msix_vector_use(pdev
, nr
);
493 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
494 handler
, NULL
, vector
);
497 * Attempt to enable route through KVM irqchip,
498 * default to userspace handling if unavailable.
500 if (vector
->virq
>= 0) {
502 vfio_remove_kvm_msi_virq(vector
);
504 vfio_update_kvm_msi_virq(vector
, *msg
, pdev
);
508 vfio_add_kvm_msi_virq(vdev
, vector
, nr
, true);
513 * We don't want to have the host allocate all possible MSI vectors
514 * for a device if they're not in use, so we shutdown and incrementally
515 * increase them as needed.
517 if (vdev
->nr_vectors
< nr
+ 1) {
518 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_MSIX_IRQ_INDEX
);
519 vdev
->nr_vectors
= nr
+ 1;
520 ret
= vfio_enable_vectors(vdev
, true);
522 error_report("vfio: failed to enable vectors, %d", ret
);
526 struct vfio_irq_set
*irq_set
;
529 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
531 irq_set
= g_malloc0(argsz
);
532 irq_set
->argsz
= argsz
;
533 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
534 VFIO_IRQ_SET_ACTION_TRIGGER
;
535 irq_set
->index
= VFIO_PCI_MSIX_IRQ_INDEX
;
538 pfd
= (int32_t *)&irq_set
->data
;
540 if (vector
->virq
>= 0) {
541 *pfd
= event_notifier_get_fd(&vector
->kvm_interrupt
);
543 *pfd
= event_notifier_get_fd(&vector
->interrupt
);
546 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
549 error_report("vfio: failed to modify vector, %d", ret
);
553 /* Disable PBA emulation when nothing more is pending. */
554 clear_bit(nr
, vdev
->msix
->pending
);
555 if (find_first_bit(vdev
->msix
->pending
,
556 vdev
->nr_vectors
) == vdev
->nr_vectors
) {
557 memory_region_set_enabled(&vdev
->pdev
.msix_pba_mmio
, false);
558 trace_vfio_msix_pba_disable(vdev
->vbasedev
.name
);
564 static int vfio_msix_vector_use(PCIDevice
*pdev
,
565 unsigned int nr
, MSIMessage msg
)
567 return vfio_msix_vector_do_use(pdev
, nr
, &msg
, vfio_msi_interrupt
);
570 static void vfio_msix_vector_release(PCIDevice
*pdev
, unsigned int nr
)
572 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
573 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[nr
];
575 trace_vfio_msix_vector_release(vdev
->vbasedev
.name
, nr
);
578 * There are still old guests that mask and unmask vectors on every
579 * interrupt. If we're using QEMU bypass with a KVM irqfd, leave all of
580 * the KVM setup in place, simply switch VFIO to use the non-bypass
581 * eventfd. We'll then fire the interrupt through QEMU and the MSI-X
582 * core will mask the interrupt and set pending bits, allowing it to
583 * be re-asserted on unmask. Nothing to do if already using QEMU mode.
585 if (vector
->virq
>= 0) {
587 struct vfio_irq_set
*irq_set
;
590 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
592 irq_set
= g_malloc0(argsz
);
593 irq_set
->argsz
= argsz
;
594 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
595 VFIO_IRQ_SET_ACTION_TRIGGER
;
596 irq_set
->index
= VFIO_PCI_MSIX_IRQ_INDEX
;
599 pfd
= (int32_t *)&irq_set
->data
;
601 *pfd
= event_notifier_get_fd(&vector
->interrupt
);
603 ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
609 static void vfio_msix_enable(VFIOPCIDevice
*vdev
)
611 vfio_disable_interrupts(vdev
);
613 vdev
->msi_vectors
= g_new0(VFIOMSIVector
, vdev
->msix
->entries
);
615 vdev
->interrupt
= VFIO_INT_MSIX
;
618 * Some communication channels between VF & PF or PF & fw rely on the
619 * physical state of the device and expect that enabling MSI-X from the
620 * guest enables the same on the host. When our guest is Linux, the
621 * guest driver call to pci_enable_msix() sets the enabling bit in the
622 * MSI-X capability, but leaves the vector table masked. We therefore
623 * can't rely on a vector_use callback (from request_irq() in the guest)
624 * to switch the physical device into MSI-X mode because that may come a
625 * long time after pci_enable_msix(). This code enables vector 0 with
626 * triggering to userspace, then immediately release the vector, leaving
627 * the physical device with no vectors enabled, but MSI-X enabled, just
628 * like the guest view.
630 vfio_msix_vector_do_use(&vdev
->pdev
, 0, NULL
, NULL
);
631 vfio_msix_vector_release(&vdev
->pdev
, 0);
633 if (msix_set_vector_notifiers(&vdev
->pdev
, vfio_msix_vector_use
,
634 vfio_msix_vector_release
, NULL
)) {
635 error_report("vfio: msix_set_vector_notifiers failed");
638 trace_vfio_msix_enable(vdev
->vbasedev
.name
);
641 static void vfio_msi_enable(VFIOPCIDevice
*vdev
)
645 vfio_disable_interrupts(vdev
);
647 vdev
->nr_vectors
= msi_nr_vectors_allocated(&vdev
->pdev
);
649 vdev
->msi_vectors
= g_new0(VFIOMSIVector
, vdev
->nr_vectors
);
651 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
652 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
658 if (event_notifier_init(&vector
->interrupt
, 0)) {
659 error_report("vfio: Error: event_notifier_init failed");
662 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
663 vfio_msi_interrupt
, NULL
, vector
);
666 * Attempt to enable route through KVM irqchip,
667 * default to userspace handling if unavailable.
669 vfio_add_kvm_msi_virq(vdev
, vector
, i
, false);
672 /* Set interrupt type prior to possible interrupts */
673 vdev
->interrupt
= VFIO_INT_MSI
;
675 ret
= vfio_enable_vectors(vdev
, false);
678 error_report("vfio: Error: Failed to setup MSI fds: %m");
679 } else if (ret
!= vdev
->nr_vectors
) {
680 error_report("vfio: Error: Failed to enable %d "
681 "MSI vectors, retry with %d", vdev
->nr_vectors
, ret
);
684 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
685 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
686 if (vector
->virq
>= 0) {
687 vfio_remove_kvm_msi_virq(vector
);
689 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
691 event_notifier_cleanup(&vector
->interrupt
);
694 g_free(vdev
->msi_vectors
);
696 if (ret
> 0 && ret
!= vdev
->nr_vectors
) {
697 vdev
->nr_vectors
= ret
;
700 vdev
->nr_vectors
= 0;
703 * Failing to setup MSI doesn't really fall within any specification.
704 * Let's try leaving interrupts disabled and hope the guest figures
705 * out to fall back to INTx for this device.
707 error_report("vfio: Error: Failed to enable MSI");
708 vdev
->interrupt
= VFIO_INT_NONE
;
713 trace_vfio_msi_enable(vdev
->vbasedev
.name
, vdev
->nr_vectors
);
716 static void vfio_msi_disable_common(VFIOPCIDevice
*vdev
)
721 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
722 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
723 if (vdev
->msi_vectors
[i
].use
) {
724 if (vector
->virq
>= 0) {
725 vfio_remove_kvm_msi_virq(vector
);
727 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
729 event_notifier_cleanup(&vector
->interrupt
);
733 g_free(vdev
->msi_vectors
);
734 vdev
->msi_vectors
= NULL
;
735 vdev
->nr_vectors
= 0;
736 vdev
->interrupt
= VFIO_INT_NONE
;
738 vfio_intx_enable(vdev
, &err
);
740 error_reportf_err(err
, ERR_PREFIX
, vdev
->vbasedev
.name
);
744 static void vfio_msix_disable(VFIOPCIDevice
*vdev
)
748 msix_unset_vector_notifiers(&vdev
->pdev
);
751 * MSI-X will only release vectors if MSI-X is still enabled on the
752 * device, check through the rest and release it ourselves if necessary.
754 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
755 if (vdev
->msi_vectors
[i
].use
) {
756 vfio_msix_vector_release(&vdev
->pdev
, i
);
757 msix_vector_unuse(&vdev
->pdev
, i
);
761 if (vdev
->nr_vectors
) {
762 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_MSIX_IRQ_INDEX
);
765 vfio_msi_disable_common(vdev
);
767 memset(vdev
->msix
->pending
, 0,
768 BITS_TO_LONGS(vdev
->msix
->entries
) * sizeof(unsigned long));
770 trace_vfio_msix_disable(vdev
->vbasedev
.name
);
773 static void vfio_msi_disable(VFIOPCIDevice
*vdev
)
775 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_MSI_IRQ_INDEX
);
776 vfio_msi_disable_common(vdev
);
778 trace_vfio_msi_disable(vdev
->vbasedev
.name
);
781 static void vfio_update_msi(VFIOPCIDevice
*vdev
)
785 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
786 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
789 if (!vector
->use
|| vector
->virq
< 0) {
793 msg
= msi_get_message(&vdev
->pdev
, i
);
794 vfio_update_kvm_msi_virq(vector
, msg
, &vdev
->pdev
);
798 static void vfio_pci_load_rom(VFIOPCIDevice
*vdev
)
800 struct vfio_region_info
*reg_info
;
805 if (vfio_get_region_info(&vdev
->vbasedev
,
806 VFIO_PCI_ROM_REGION_INDEX
, ®_info
)) {
807 error_report("vfio: Error getting ROM info: %m");
811 trace_vfio_pci_load_rom(vdev
->vbasedev
.name
, (unsigned long)reg_info
->size
,
812 (unsigned long)reg_info
->offset
,
813 (unsigned long)reg_info
->flags
);
815 vdev
->rom_size
= size
= reg_info
->size
;
816 vdev
->rom_offset
= reg_info
->offset
;
820 if (!vdev
->rom_size
) {
821 vdev
->rom_read_failed
= true;
822 error_report("vfio-pci: Cannot read device rom at "
823 "%s", vdev
->vbasedev
.name
);
824 error_printf("Device option ROM contents are probably invalid "
825 "(check dmesg).\nSkip option ROM probe with rombar=0, "
826 "or load from file with romfile=\n");
830 vdev
->rom
= g_malloc(size
);
831 memset(vdev
->rom
, 0xff, size
);
834 bytes
= pread(vdev
->vbasedev
.fd
, vdev
->rom
+ off
,
835 size
, vdev
->rom_offset
+ off
);
838 } else if (bytes
> 0) {
842 if (errno
== EINTR
|| errno
== EAGAIN
) {
845 error_report("vfio: Error reading device ROM: %m");
851 * Test the ROM signature against our device, if the vendor is correct
852 * but the device ID doesn't match, store the correct device ID and
853 * recompute the checksum. Intel IGD devices need this and are known
854 * to have bogus checksums so we can't simply adjust the checksum.
856 if (pci_get_word(vdev
->rom
) == 0xaa55 &&
857 pci_get_word(vdev
->rom
+ 0x18) + 8 < vdev
->rom_size
&&
858 !memcmp(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18), "PCIR", 4)) {
861 vid
= pci_get_word(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18) + 4);
862 did
= pci_get_word(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18) + 6);
864 if (vid
== vdev
->vendor_id
&& did
!= vdev
->device_id
) {
866 uint8_t csum
, *data
= vdev
->rom
;
868 pci_set_word(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18) + 6,
872 for (csum
= 0, i
= 0; i
< vdev
->rom_size
; i
++) {
881 static uint64_t vfio_rom_read(void *opaque
, hwaddr addr
, unsigned size
)
883 VFIOPCIDevice
*vdev
= opaque
;
892 /* Load the ROM lazily when the guest tries to read it */
893 if (unlikely(!vdev
->rom
&& !vdev
->rom_read_failed
)) {
894 vfio_pci_load_rom(vdev
);
897 memcpy(&val
, vdev
->rom
+ addr
,
898 (addr
< vdev
->rom_size
) ? MIN(size
, vdev
->rom_size
- addr
) : 0);
905 data
= le16_to_cpu(val
.word
);
908 data
= le32_to_cpu(val
.dword
);
911 hw_error("vfio: unsupported read size, %d bytes\n", size
);
915 trace_vfio_rom_read(vdev
->vbasedev
.name
, addr
, size
, data
);
920 static void vfio_rom_write(void *opaque
, hwaddr addr
,
921 uint64_t data
, unsigned size
)
925 static const MemoryRegionOps vfio_rom_ops
= {
926 .read
= vfio_rom_read
,
927 .write
= vfio_rom_write
,
928 .endianness
= DEVICE_LITTLE_ENDIAN
,
931 static void vfio_pci_size_rom(VFIOPCIDevice
*vdev
)
933 uint32_t orig
, size
= cpu_to_le32((uint32_t)PCI_ROM_ADDRESS_MASK
);
934 off_t offset
= vdev
->config_offset
+ PCI_ROM_ADDRESS
;
935 DeviceState
*dev
= DEVICE(vdev
);
937 int fd
= vdev
->vbasedev
.fd
;
939 if (vdev
->pdev
.romfile
|| !vdev
->pdev
.rom_bar
) {
940 /* Since pci handles romfile, just print a message and return */
941 if (vfio_blacklist_opt_rom(vdev
) && vdev
->pdev
.romfile
) {
942 error_printf("Warning : Device at %s is known to cause system instability issues during option rom execution. Proceeding anyway since user specified romfile\n",
943 vdev
->vbasedev
.name
);
949 * Use the same size ROM BAR as the physical device. The contents
950 * will get filled in later when the guest tries to read it.
952 if (pread(fd
, &orig
, 4, offset
) != 4 ||
953 pwrite(fd
, &size
, 4, offset
) != 4 ||
954 pread(fd
, &size
, 4, offset
) != 4 ||
955 pwrite(fd
, &orig
, 4, offset
) != 4) {
956 error_report("%s(%s) failed: %m", __func__
, vdev
->vbasedev
.name
);
960 size
= ~(le32_to_cpu(size
) & PCI_ROM_ADDRESS_MASK
) + 1;
966 if (vfio_blacklist_opt_rom(vdev
)) {
967 if (dev
->opts
&& qemu_opt_get(dev
->opts
, "rombar")) {
968 error_printf("Warning : Device at %s is known to cause system instability issues during option rom execution. Proceeding anyway since user specified non zero value for rombar\n",
969 vdev
->vbasedev
.name
);
971 error_printf("Warning : Rom loading for device at %s has been disabled due to system instability issues. Specify rombar=1 or romfile to force\n",
972 vdev
->vbasedev
.name
);
977 trace_vfio_pci_size_rom(vdev
->vbasedev
.name
, size
);
979 name
= g_strdup_printf("vfio[%s].rom", vdev
->vbasedev
.name
);
981 memory_region_init_io(&vdev
->pdev
.rom
, OBJECT(vdev
),
982 &vfio_rom_ops
, vdev
, name
, size
);
985 pci_register_bar(&vdev
->pdev
, PCI_ROM_SLOT
,
986 PCI_BASE_ADDRESS_SPACE_MEMORY
, &vdev
->pdev
.rom
);
988 vdev
->pdev
.has_rom
= true;
989 vdev
->rom_read_failed
= false;
992 void vfio_vga_write(void *opaque
, hwaddr addr
,
993 uint64_t data
, unsigned size
)
995 VFIOVGARegion
*region
= opaque
;
996 VFIOVGA
*vga
= container_of(region
, VFIOVGA
, region
[region
->nr
]);
1003 off_t offset
= vga
->fd_offset
+ region
->offset
+ addr
;
1010 buf
.word
= cpu_to_le16(data
);
1013 buf
.dword
= cpu_to_le32(data
);
1016 hw_error("vfio: unsupported write size, %d bytes", size
);
1020 if (pwrite(vga
->fd
, &buf
, size
, offset
) != size
) {
1021 error_report("%s(,0x%"HWADDR_PRIx
", 0x%"PRIx64
", %d) failed: %m",
1022 __func__
, region
->offset
+ addr
, data
, size
);
1025 trace_vfio_vga_write(region
->offset
+ addr
, data
, size
);
1028 uint64_t vfio_vga_read(void *opaque
, hwaddr addr
, unsigned size
)
1030 VFIOVGARegion
*region
= opaque
;
1031 VFIOVGA
*vga
= container_of(region
, VFIOVGA
, region
[region
->nr
]);
1039 off_t offset
= vga
->fd_offset
+ region
->offset
+ addr
;
1041 if (pread(vga
->fd
, &buf
, size
, offset
) != size
) {
1042 error_report("%s(,0x%"HWADDR_PRIx
", %d) failed: %m",
1043 __func__
, region
->offset
+ addr
, size
);
1044 return (uint64_t)-1;
1052 data
= le16_to_cpu(buf
.word
);
1055 data
= le32_to_cpu(buf
.dword
);
1058 hw_error("vfio: unsupported read size, %d bytes", size
);
1062 trace_vfio_vga_read(region
->offset
+ addr
, size
, data
);
1067 static const MemoryRegionOps vfio_vga_ops
= {
1068 .read
= vfio_vga_read
,
1069 .write
= vfio_vga_write
,
1070 .endianness
= DEVICE_LITTLE_ENDIAN
,
1076 uint32_t vfio_pci_read_config(PCIDevice
*pdev
, uint32_t addr
, int len
)
1078 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
1079 uint32_t emu_bits
= 0, emu_val
= 0, phys_val
= 0, val
;
1081 memcpy(&emu_bits
, vdev
->emulated_config_bits
+ addr
, len
);
1082 emu_bits
= le32_to_cpu(emu_bits
);
1085 emu_val
= pci_default_read_config(pdev
, addr
, len
);
1088 if (~emu_bits
& (0xffffffffU
>> (32 - len
* 8))) {
1091 ret
= pread(vdev
->vbasedev
.fd
, &phys_val
, len
,
1092 vdev
->config_offset
+ addr
);
1094 error_report("%s(%s, 0x%x, 0x%x) failed: %m",
1095 __func__
, vdev
->vbasedev
.name
, addr
, len
);
1098 phys_val
= le32_to_cpu(phys_val
);
1101 val
= (emu_val
& emu_bits
) | (phys_val
& ~emu_bits
);
1103 trace_vfio_pci_read_config(vdev
->vbasedev
.name
, addr
, len
, val
);
1108 void vfio_pci_write_config(PCIDevice
*pdev
,
1109 uint32_t addr
, uint32_t val
, int len
)
1111 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
1112 uint32_t val_le
= cpu_to_le32(val
);
1114 trace_vfio_pci_write_config(vdev
->vbasedev
.name
, addr
, val
, len
);
1116 /* Write everything to VFIO, let it filter out what we can't write */
1117 if (pwrite(vdev
->vbasedev
.fd
, &val_le
, len
, vdev
->config_offset
+ addr
)
1119 error_report("%s(%s, 0x%x, 0x%x, 0x%x) failed: %m",
1120 __func__
, vdev
->vbasedev
.name
, addr
, val
, len
);
1123 /* MSI/MSI-X Enabling/Disabling */
1124 if (pdev
->cap_present
& QEMU_PCI_CAP_MSI
&&
1125 ranges_overlap(addr
, len
, pdev
->msi_cap
, vdev
->msi_cap_size
)) {
1126 int is_enabled
, was_enabled
= msi_enabled(pdev
);
1128 pci_default_write_config(pdev
, addr
, val
, len
);
1130 is_enabled
= msi_enabled(pdev
);
1134 vfio_msi_enable(vdev
);
1138 vfio_msi_disable(vdev
);
1140 vfio_update_msi(vdev
);
1143 } else if (pdev
->cap_present
& QEMU_PCI_CAP_MSIX
&&
1144 ranges_overlap(addr
, len
, pdev
->msix_cap
, MSIX_CAP_LENGTH
)) {
1145 int is_enabled
, was_enabled
= msix_enabled(pdev
);
1147 pci_default_write_config(pdev
, addr
, val
, len
);
1149 is_enabled
= msix_enabled(pdev
);
1151 if (!was_enabled
&& is_enabled
) {
1152 vfio_msix_enable(vdev
);
1153 } else if (was_enabled
&& !is_enabled
) {
1154 vfio_msix_disable(vdev
);
1157 /* Write everything to QEMU to keep emulated bits correct */
1158 pci_default_write_config(pdev
, addr
, val
, len
);
1165 static void vfio_disable_interrupts(VFIOPCIDevice
*vdev
)
1168 * More complicated than it looks. Disabling MSI/X transitions the
1169 * device to INTx mode (if supported). Therefore we need to first
1170 * disable MSI/X and then cleanup by disabling INTx.
1172 if (vdev
->interrupt
== VFIO_INT_MSIX
) {
1173 vfio_msix_disable(vdev
);
1174 } else if (vdev
->interrupt
== VFIO_INT_MSI
) {
1175 vfio_msi_disable(vdev
);
1178 if (vdev
->interrupt
== VFIO_INT_INTx
) {
1179 vfio_intx_disable(vdev
);
1183 static int vfio_msi_setup(VFIOPCIDevice
*vdev
, int pos
, Error
**errp
)
1186 bool msi_64bit
, msi_maskbit
;
1190 if (pread(vdev
->vbasedev
.fd
, &ctrl
, sizeof(ctrl
),
1191 vdev
->config_offset
+ pos
+ PCI_CAP_FLAGS
) != sizeof(ctrl
)) {
1192 error_setg_errno(errp
, errno
, "failed reading MSI PCI_CAP_FLAGS");
1195 ctrl
= le16_to_cpu(ctrl
);
1197 msi_64bit
= !!(ctrl
& PCI_MSI_FLAGS_64BIT
);
1198 msi_maskbit
= !!(ctrl
& PCI_MSI_FLAGS_MASKBIT
);
1199 entries
= 1 << ((ctrl
& PCI_MSI_FLAGS_QMASK
) >> 1);
1201 trace_vfio_msi_setup(vdev
->vbasedev
.name
, pos
);
1203 ret
= msi_init(&vdev
->pdev
, pos
, entries
, msi_64bit
, msi_maskbit
, &err
);
1205 if (ret
== -ENOTSUP
) {
1208 error_prepend(&err
, "msi_init failed: ");
1209 error_propagate(errp
, err
);
1212 vdev
->msi_cap_size
= 0xa + (msi_maskbit
? 0xa : 0) + (msi_64bit
? 0x4 : 0);
1217 static void vfio_pci_fixup_msix_region(VFIOPCIDevice
*vdev
)
1220 VFIORegion
*region
= &vdev
->bars
[vdev
->msix
->table_bar
].region
;
1223 * We expect to find a single mmap covering the whole BAR, anything else
1224 * means it's either unsupported or already setup.
1226 if (region
->nr_mmaps
!= 1 || region
->mmaps
[0].offset
||
1227 region
->size
!= region
->mmaps
[0].size
) {
1231 /* MSI-X table start and end aligned to host page size */
1232 start
= vdev
->msix
->table_offset
& qemu_real_host_page_mask
;
1233 end
= REAL_HOST_PAGE_ALIGN((uint64_t)vdev
->msix
->table_offset
+
1234 (vdev
->msix
->entries
* PCI_MSIX_ENTRY_SIZE
));
1237 * Does the MSI-X table cover the beginning of the BAR? The whole BAR?
1238 * NB - Host page size is necessarily a power of two and so is the PCI
1239 * BAR (not counting EA yet), therefore if we have host page aligned
1240 * @start and @end, then any remainder of the BAR before or after those
1241 * must be at least host page sized and therefore mmap'able.
1244 if (end
>= region
->size
) {
1245 region
->nr_mmaps
= 0;
1246 g_free(region
->mmaps
);
1247 region
->mmaps
= NULL
;
1248 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1249 vdev
->msix
->table_bar
, 0, 0);
1251 region
->mmaps
[0].offset
= end
;
1252 region
->mmaps
[0].size
= region
->size
- end
;
1253 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1254 vdev
->msix
->table_bar
, region
->mmaps
[0].offset
,
1255 region
->mmaps
[0].offset
+ region
->mmaps
[0].size
);
1258 /* Maybe it's aligned at the end of the BAR */
1259 } else if (end
>= region
->size
) {
1260 region
->mmaps
[0].size
= start
;
1261 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1262 vdev
->msix
->table_bar
, region
->mmaps
[0].offset
,
1263 region
->mmaps
[0].offset
+ region
->mmaps
[0].size
);
1265 /* Otherwise it must split the BAR */
1267 region
->nr_mmaps
= 2;
1268 region
->mmaps
= g_renew(VFIOMmap
, region
->mmaps
, 2);
1270 memcpy(®ion
->mmaps
[1], ®ion
->mmaps
[0], sizeof(VFIOMmap
));
1272 region
->mmaps
[0].size
= start
;
1273 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1274 vdev
->msix
->table_bar
, region
->mmaps
[0].offset
,
1275 region
->mmaps
[0].offset
+ region
->mmaps
[0].size
);
1277 region
->mmaps
[1].offset
= end
;
1278 region
->mmaps
[1].size
= region
->size
- end
;
1279 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1280 vdev
->msix
->table_bar
, region
->mmaps
[1].offset
,
1281 region
->mmaps
[1].offset
+ region
->mmaps
[1].size
);
1286 * We don't have any control over how pci_add_capability() inserts
1287 * capabilities into the chain. In order to setup MSI-X we need a
1288 * MemoryRegion for the BAR. In order to setup the BAR and not
1289 * attempt to mmap the MSI-X table area, which VFIO won't allow, we
1290 * need to first look for where the MSI-X table lives. So we
1291 * unfortunately split MSI-X setup across two functions.
1293 static int vfio_msix_early_setup(VFIOPCIDevice
*vdev
, Error
**errp
)
1297 uint32_t table
, pba
;
1298 int fd
= vdev
->vbasedev
.fd
;
1301 pos
= pci_find_capability(&vdev
->pdev
, PCI_CAP_ID_MSIX
);
1306 if (pread(fd
, &ctrl
, sizeof(ctrl
),
1307 vdev
->config_offset
+ pos
+ PCI_MSIX_FLAGS
) != sizeof(ctrl
)) {
1308 error_setg_errno(errp
, errno
, "failed to read PCI MSIX FLAGS");
1312 if (pread(fd
, &table
, sizeof(table
),
1313 vdev
->config_offset
+ pos
+ PCI_MSIX_TABLE
) != sizeof(table
)) {
1314 error_setg_errno(errp
, errno
, "failed to read PCI MSIX TABLE");
1318 if (pread(fd
, &pba
, sizeof(pba
),
1319 vdev
->config_offset
+ pos
+ PCI_MSIX_PBA
) != sizeof(pba
)) {
1320 error_setg_errno(errp
, errno
, "failed to read PCI MSIX PBA");
1324 ctrl
= le16_to_cpu(ctrl
);
1325 table
= le32_to_cpu(table
);
1326 pba
= le32_to_cpu(pba
);
1328 msix
= g_malloc0(sizeof(*msix
));
1329 msix
->table_bar
= table
& PCI_MSIX_FLAGS_BIRMASK
;
1330 msix
->table_offset
= table
& ~PCI_MSIX_FLAGS_BIRMASK
;
1331 msix
->pba_bar
= pba
& PCI_MSIX_FLAGS_BIRMASK
;
1332 msix
->pba_offset
= pba
& ~PCI_MSIX_FLAGS_BIRMASK
;
1333 msix
->entries
= (ctrl
& PCI_MSIX_FLAGS_QSIZE
) + 1;
1336 * Test the size of the pba_offset variable and catch if it extends outside
1337 * of the specified BAR. If it is the case, we need to apply a hardware
1338 * specific quirk if the device is known or we have a broken configuration.
1340 if (msix
->pba_offset
>= vdev
->bars
[msix
->pba_bar
].region
.size
) {
1342 * Chelsio T5 Virtual Function devices are encoded as 0x58xx for T5
1343 * adapters. The T5 hardware returns an incorrect value of 0x8000 for
1344 * the VF PBA offset while the BAR itself is only 8k. The correct value
1345 * is 0x1000, so we hard code that here.
1347 if (vdev
->vendor_id
== PCI_VENDOR_ID_CHELSIO
&&
1348 (vdev
->device_id
& 0xff00) == 0x5800) {
1349 msix
->pba_offset
= 0x1000;
1351 error_setg(errp
, "hardware reports invalid configuration, "
1352 "MSIX PBA outside of specified BAR");
1358 trace_vfio_msix_early_setup(vdev
->vbasedev
.name
, pos
, msix
->table_bar
,
1359 msix
->table_offset
, msix
->entries
);
1362 vfio_pci_fixup_msix_region(vdev
);
1367 static int vfio_msix_setup(VFIOPCIDevice
*vdev
, int pos
, Error
**errp
)
1371 vdev
->msix
->pending
= g_malloc0(BITS_TO_LONGS(vdev
->msix
->entries
) *
1372 sizeof(unsigned long));
1373 ret
= msix_init(&vdev
->pdev
, vdev
->msix
->entries
,
1374 vdev
->bars
[vdev
->msix
->table_bar
].region
.mem
,
1375 vdev
->msix
->table_bar
, vdev
->msix
->table_offset
,
1376 vdev
->bars
[vdev
->msix
->pba_bar
].region
.mem
,
1377 vdev
->msix
->pba_bar
, vdev
->msix
->pba_offset
, pos
);
1379 if (ret
== -ENOTSUP
) {
1382 error_setg(errp
, "msix_init failed");
1387 * The PCI spec suggests that devices provide additional alignment for
1388 * MSI-X structures and avoid overlapping non-MSI-X related registers.
1389 * For an assigned device, this hopefully means that emulation of MSI-X
1390 * structures does not affect the performance of the device. If devices
1391 * fail to provide that alignment, a significant performance penalty may
1392 * result, for instance Mellanox MT27500 VFs:
1393 * http://www.spinics.net/lists/kvm/msg125881.html
1395 * The PBA is simply not that important for such a serious regression and
1396 * most drivers do not appear to look at it. The solution for this is to
1397 * disable the PBA MemoryRegion unless it's being used. We disable it
1398 * here and only enable it if a masked vector fires through QEMU. As the
1399 * vector-use notifier is called, which occurs on unmask, we test whether
1400 * PBA emulation is needed and again disable if not.
1402 memory_region_set_enabled(&vdev
->pdev
.msix_pba_mmio
, false);
1407 static void vfio_teardown_msi(VFIOPCIDevice
*vdev
)
1409 msi_uninit(&vdev
->pdev
);
1412 msix_uninit(&vdev
->pdev
,
1413 vdev
->bars
[vdev
->msix
->table_bar
].region
.mem
,
1414 vdev
->bars
[vdev
->msix
->pba_bar
].region
.mem
);
1415 g_free(vdev
->msix
->pending
);
1422 static void vfio_mmap_set_enabled(VFIOPCIDevice
*vdev
, bool enabled
)
1426 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1427 vfio_region_mmaps_set_enabled(&vdev
->bars
[i
].region
, enabled
);
1431 static void vfio_bar_setup(VFIOPCIDevice
*vdev
, int nr
)
1433 VFIOBAR
*bar
= &vdev
->bars
[nr
];
1439 /* Skip both unimplemented BARs and the upper half of 64bit BARS. */
1440 if (!bar
->region
.size
) {
1444 /* Determine what type of BAR this is for registration */
1445 ret
= pread(vdev
->vbasedev
.fd
, &pci_bar
, sizeof(pci_bar
),
1446 vdev
->config_offset
+ PCI_BASE_ADDRESS_0
+ (4 * nr
));
1447 if (ret
!= sizeof(pci_bar
)) {
1448 error_report("vfio: Failed to read BAR %d (%m)", nr
);
1452 pci_bar
= le32_to_cpu(pci_bar
);
1453 bar
->ioport
= (pci_bar
& PCI_BASE_ADDRESS_SPACE_IO
);
1454 bar
->mem64
= bar
->ioport
? 0 : (pci_bar
& PCI_BASE_ADDRESS_MEM_TYPE_64
);
1455 type
= pci_bar
& (bar
->ioport
? ~PCI_BASE_ADDRESS_IO_MASK
:
1456 ~PCI_BASE_ADDRESS_MEM_MASK
);
1458 if (vfio_region_mmap(&bar
->region
)) {
1459 error_report("Failed to mmap %s BAR %d. Performance may be slow",
1460 vdev
->vbasedev
.name
, nr
);
1463 pci_register_bar(&vdev
->pdev
, nr
, type
, bar
->region
.mem
);
1466 static void vfio_bars_setup(VFIOPCIDevice
*vdev
)
1470 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1471 vfio_bar_setup(vdev
, i
);
1475 static void vfio_bars_exit(VFIOPCIDevice
*vdev
)
1479 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1480 vfio_bar_quirk_exit(vdev
, i
);
1481 vfio_region_exit(&vdev
->bars
[i
].region
);
1485 pci_unregister_vga(&vdev
->pdev
);
1486 vfio_vga_quirk_exit(vdev
);
1490 static void vfio_bars_finalize(VFIOPCIDevice
*vdev
)
1494 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1495 vfio_bar_quirk_finalize(vdev
, i
);
1496 vfio_region_finalize(&vdev
->bars
[i
].region
);
1500 vfio_vga_quirk_finalize(vdev
);
1501 for (i
= 0; i
< ARRAY_SIZE(vdev
->vga
->region
); i
++) {
1502 object_unparent(OBJECT(&vdev
->vga
->region
[i
].mem
));
1511 static uint8_t vfio_std_cap_max_size(PCIDevice
*pdev
, uint8_t pos
)
1514 uint16_t next
= PCI_CONFIG_SPACE_SIZE
;
1516 for (tmp
= pdev
->config
[PCI_CAPABILITY_LIST
]; tmp
;
1517 tmp
= pdev
->config
[tmp
+ PCI_CAP_LIST_NEXT
]) {
1518 if (tmp
> pos
&& tmp
< next
) {
1527 static uint16_t vfio_ext_cap_max_size(const uint8_t *config
, uint16_t pos
)
1529 uint16_t tmp
, next
= PCIE_CONFIG_SPACE_SIZE
;
1531 for (tmp
= PCI_CONFIG_SPACE_SIZE
; tmp
;
1532 tmp
= PCI_EXT_CAP_NEXT(pci_get_long(config
+ tmp
))) {
1533 if (tmp
> pos
&& tmp
< next
) {
1541 static void vfio_set_word_bits(uint8_t *buf
, uint16_t val
, uint16_t mask
)
1543 pci_set_word(buf
, (pci_get_word(buf
) & ~mask
) | val
);
1546 static void vfio_add_emulated_word(VFIOPCIDevice
*vdev
, int pos
,
1547 uint16_t val
, uint16_t mask
)
1549 vfio_set_word_bits(vdev
->pdev
.config
+ pos
, val
, mask
);
1550 vfio_set_word_bits(vdev
->pdev
.wmask
+ pos
, ~mask
, mask
);
1551 vfio_set_word_bits(vdev
->emulated_config_bits
+ pos
, mask
, mask
);
1554 static void vfio_set_long_bits(uint8_t *buf
, uint32_t val
, uint32_t mask
)
1556 pci_set_long(buf
, (pci_get_long(buf
) & ~mask
) | val
);
1559 static void vfio_add_emulated_long(VFIOPCIDevice
*vdev
, int pos
,
1560 uint32_t val
, uint32_t mask
)
1562 vfio_set_long_bits(vdev
->pdev
.config
+ pos
, val
, mask
);
1563 vfio_set_long_bits(vdev
->pdev
.wmask
+ pos
, ~mask
, mask
);
1564 vfio_set_long_bits(vdev
->emulated_config_bits
+ pos
, mask
, mask
);
1567 static int vfio_setup_pcie_cap(VFIOPCIDevice
*vdev
, int pos
, uint8_t size
,
1573 flags
= pci_get_word(vdev
->pdev
.config
+ pos
+ PCI_CAP_FLAGS
);
1574 type
= (flags
& PCI_EXP_FLAGS_TYPE
) >> 4;
1576 if (type
!= PCI_EXP_TYPE_ENDPOINT
&&
1577 type
!= PCI_EXP_TYPE_LEG_END
&&
1578 type
!= PCI_EXP_TYPE_RC_END
) {
1580 error_setg(errp
, "assignment of PCIe type 0x%x "
1581 "devices is not currently supported", type
);
1585 if (!pci_bus_is_express(vdev
->pdev
.bus
)) {
1586 PCIBus
*bus
= vdev
->pdev
.bus
;
1590 * Traditionally PCI device assignment exposes the PCIe capability
1591 * as-is on non-express buses. The reason being that some drivers
1592 * simply assume that it's there, for example tg3. However when
1593 * we're running on a native PCIe machine type, like Q35, we need
1594 * to hide the PCIe capability. The reason for this is twofold;
1595 * first Windows guests get a Code 10 error when the PCIe capability
1596 * is exposed in this configuration. Therefore express devices won't
1597 * work at all unless they're attached to express buses in the VM.
1598 * Second, a native PCIe machine introduces the possibility of fine
1599 * granularity IOMMUs supporting both translation and isolation.
1600 * Guest code to discover the IOMMU visibility of a device, such as
1601 * IOMMU grouping code on Linux, is very aware of device types and
1602 * valid transitions between bus types. An express device on a non-
1603 * express bus is not a valid combination on bare metal systems.
1605 * Drivers that require a PCIe capability to make the device
1606 * functional are simply going to need to have their devices placed
1607 * on a PCIe bus in the VM.
1609 while (!pci_bus_is_root(bus
)) {
1610 bridge
= pci_bridge_get_device(bus
);
1614 if (pci_bus_is_express(bus
)) {
1618 } else if (pci_bus_is_root(vdev
->pdev
.bus
)) {
1620 * On a Root Complex bus Endpoints become Root Complex Integrated
1621 * Endpoints, which changes the type and clears the LNK & LNK2 fields.
1623 if (type
== PCI_EXP_TYPE_ENDPOINT
) {
1624 vfio_add_emulated_word(vdev
, pos
+ PCI_CAP_FLAGS
,
1625 PCI_EXP_TYPE_RC_END
<< 4,
1626 PCI_EXP_FLAGS_TYPE
);
1628 /* Link Capabilities, Status, and Control goes away */
1629 if (size
> PCI_EXP_LNKCTL
) {
1630 vfio_add_emulated_long(vdev
, pos
+ PCI_EXP_LNKCAP
, 0, ~0);
1631 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKCTL
, 0, ~0);
1632 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKSTA
, 0, ~0);
1634 #ifndef PCI_EXP_LNKCAP2
1635 #define PCI_EXP_LNKCAP2 44
1637 #ifndef PCI_EXP_LNKSTA2
1638 #define PCI_EXP_LNKSTA2 50
1640 /* Link 2 Capabilities, Status, and Control goes away */
1641 if (size
> PCI_EXP_LNKCAP2
) {
1642 vfio_add_emulated_long(vdev
, pos
+ PCI_EXP_LNKCAP2
, 0, ~0);
1643 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKCTL2
, 0, ~0);
1644 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKSTA2
, 0, ~0);
1648 } else if (type
== PCI_EXP_TYPE_LEG_END
) {
1650 * Legacy endpoints don't belong on the root complex. Windows
1651 * seems to be happier with devices if we skip the capability.
1658 * Convert Root Complex Integrated Endpoints to regular endpoints.
1659 * These devices don't support LNK/LNK2 capabilities, so make them up.
1661 if (type
== PCI_EXP_TYPE_RC_END
) {
1662 vfio_add_emulated_word(vdev
, pos
+ PCI_CAP_FLAGS
,
1663 PCI_EXP_TYPE_ENDPOINT
<< 4,
1664 PCI_EXP_FLAGS_TYPE
);
1665 vfio_add_emulated_long(vdev
, pos
+ PCI_EXP_LNKCAP
,
1666 PCI_EXP_LNK_MLW_1
| PCI_EXP_LNK_LS_25
, ~0);
1667 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKCTL
, 0, ~0);
1670 /* Mark the Link Status bits as emulated to allow virtual negotiation */
1671 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKSTA
,
1672 pci_get_word(vdev
->pdev
.config
+ pos
+
1674 PCI_EXP_LNKCAP_MLW
| PCI_EXP_LNKCAP_SLS
);
1677 pos
= pci_add_capability(&vdev
->pdev
, PCI_CAP_ID_EXP
, pos
, size
);
1679 vdev
->pdev
.exp
.exp_cap
= pos
;
1685 static void vfio_check_pcie_flr(VFIOPCIDevice
*vdev
, uint8_t pos
)
1687 uint32_t cap
= pci_get_long(vdev
->pdev
.config
+ pos
+ PCI_EXP_DEVCAP
);
1689 if (cap
& PCI_EXP_DEVCAP_FLR
) {
1690 trace_vfio_check_pcie_flr(vdev
->vbasedev
.name
);
1691 vdev
->has_flr
= true;
1695 static void vfio_check_pm_reset(VFIOPCIDevice
*vdev
, uint8_t pos
)
1697 uint16_t csr
= pci_get_word(vdev
->pdev
.config
+ pos
+ PCI_PM_CTRL
);
1699 if (!(csr
& PCI_PM_CTRL_NO_SOFT_RESET
)) {
1700 trace_vfio_check_pm_reset(vdev
->vbasedev
.name
);
1701 vdev
->has_pm_reset
= true;
1705 static void vfio_check_af_flr(VFIOPCIDevice
*vdev
, uint8_t pos
)
1707 uint8_t cap
= pci_get_byte(vdev
->pdev
.config
+ pos
+ PCI_AF_CAP
);
1709 if ((cap
& PCI_AF_CAP_TP
) && (cap
& PCI_AF_CAP_FLR
)) {
1710 trace_vfio_check_af_flr(vdev
->vbasedev
.name
);
1711 vdev
->has_flr
= true;
1715 static int vfio_add_std_cap(VFIOPCIDevice
*vdev
, uint8_t pos
, Error
**errp
)
1717 PCIDevice
*pdev
= &vdev
->pdev
;
1718 uint8_t cap_id
, next
, size
;
1721 cap_id
= pdev
->config
[pos
];
1722 next
= pdev
->config
[pos
+ PCI_CAP_LIST_NEXT
];
1725 * If it becomes important to configure capabilities to their actual
1726 * size, use this as the default when it's something we don't recognize.
1727 * Since QEMU doesn't actually handle many of the config accesses,
1728 * exact size doesn't seem worthwhile.
1730 size
= vfio_std_cap_max_size(pdev
, pos
);
1733 * pci_add_capability always inserts the new capability at the head
1734 * of the chain. Therefore to end up with a chain that matches the
1735 * physical device, we insert from the end by making this recursive.
1736 * This is also why we pre-calculate size above as cached config space
1737 * will be changed as we unwind the stack.
1740 ret
= vfio_add_std_cap(vdev
, next
, errp
);
1745 /* Begin the rebuild, use QEMU emulated list bits */
1746 pdev
->config
[PCI_CAPABILITY_LIST
] = 0;
1747 vdev
->emulated_config_bits
[PCI_CAPABILITY_LIST
] = 0xff;
1748 vdev
->emulated_config_bits
[PCI_STATUS
] |= PCI_STATUS_CAP_LIST
;
1751 /* Use emulated next pointer to allow dropping caps */
1752 pci_set_byte(vdev
->emulated_config_bits
+ pos
+ PCI_CAP_LIST_NEXT
, 0xff);
1755 case PCI_CAP_ID_MSI
:
1756 ret
= vfio_msi_setup(vdev
, pos
, errp
);
1758 case PCI_CAP_ID_EXP
:
1759 vfio_check_pcie_flr(vdev
, pos
);
1760 ret
= vfio_setup_pcie_cap(vdev
, pos
, size
, errp
);
1762 case PCI_CAP_ID_MSIX
:
1763 ret
= vfio_msix_setup(vdev
, pos
, errp
);
1766 vfio_check_pm_reset(vdev
, pos
);
1768 ret
= pci_add_capability2(pdev
, cap_id
, pos
, size
, errp
);
1771 vfio_check_af_flr(vdev
, pos
);
1772 ret
= pci_add_capability2(pdev
, cap_id
, pos
, size
, errp
);
1775 ret
= pci_add_capability2(pdev
, cap_id
, pos
, size
, errp
);
1781 "failed to add PCI capability 0x%x[0x%x]@0x%x: ",
1789 static void vfio_add_ext_cap(VFIOPCIDevice
*vdev
)
1791 PCIDevice
*pdev
= &vdev
->pdev
;
1793 uint16_t cap_id
, next
, size
;
1797 /* Only add extended caps if we have them and the guest can see them */
1798 if (!pci_is_express(pdev
) || !pci_bus_is_express(pdev
->bus
) ||
1799 !pci_get_long(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
)) {
1804 * pcie_add_capability always inserts the new capability at the tail
1805 * of the chain. Therefore to end up with a chain that matches the
1806 * physical device, we cache the config space to avoid overwriting
1807 * the original config space when we parse the extended capabilities.
1809 config
= g_memdup(pdev
->config
, vdev
->config_size
);
1812 * Extended capabilities are chained with each pointing to the next, so we
1813 * can drop anything other than the head of the chain simply by modifying
1814 * the previous next pointer. For the head of the chain, we can modify the
1815 * capability ID to something that cannot match a valid capability. ID
1816 * 0 is reserved for this since absence of capabilities is indicated by
1817 * 0 for the ID, version, AND next pointer. However, pcie_add_capability()
1818 * uses ID 0 as reserved for list management and will incorrectly match and
1819 * assert if we attempt to pre-load the head of the chain with with this
1820 * ID. Use ID 0xFFFF temporarily since it is also seems to be reserved in
1821 * part for identifying absence of capabilities in a root complex register
1822 * block. If the ID still exists after adding capabilities, switch back to
1823 * zero. We'll mark this entire first dword as emulated for this purpose.
1825 pci_set_long(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
,
1826 PCI_EXT_CAP(0xFFFF, 0, 0));
1827 pci_set_long(pdev
->wmask
+ PCI_CONFIG_SPACE_SIZE
, 0);
1828 pci_set_long(vdev
->emulated_config_bits
+ PCI_CONFIG_SPACE_SIZE
, ~0);
1830 for (next
= PCI_CONFIG_SPACE_SIZE
; next
;
1831 next
= PCI_EXT_CAP_NEXT(pci_get_long(config
+ next
))) {
1832 header
= pci_get_long(config
+ next
);
1833 cap_id
= PCI_EXT_CAP_ID(header
);
1834 cap_ver
= PCI_EXT_CAP_VER(header
);
1837 * If it becomes important to configure extended capabilities to their
1838 * actual size, use this as the default when it's something we don't
1839 * recognize. Since QEMU doesn't actually handle many of the config
1840 * accesses, exact size doesn't seem worthwhile.
1842 size
= vfio_ext_cap_max_size(config
, next
);
1844 /* Use emulated next pointer to allow dropping extended caps */
1845 pci_long_test_and_set_mask(vdev
->emulated_config_bits
+ next
,
1846 PCI_EXT_CAP_NEXT_MASK
);
1849 case PCI_EXT_CAP_ID_SRIOV
: /* Read-only VF BARs confuse OVMF */
1850 case PCI_EXT_CAP_ID_ARI
: /* XXX Needs next function virtualization */
1851 trace_vfio_add_ext_cap_dropped(vdev
->vbasedev
.name
, cap_id
, next
);
1854 pcie_add_capability(pdev
, cap_id
, cap_ver
, next
, size
);
1859 /* Cleanup chain head ID if necessary */
1860 if (pci_get_word(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
) == 0xFFFF) {
1861 pci_set_word(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
, 0);
1868 static int vfio_add_capabilities(VFIOPCIDevice
*vdev
, Error
**errp
)
1870 PCIDevice
*pdev
= &vdev
->pdev
;
1873 if (!(pdev
->config
[PCI_STATUS
] & PCI_STATUS_CAP_LIST
) ||
1874 !pdev
->config
[PCI_CAPABILITY_LIST
]) {
1875 return 0; /* Nothing to add */
1878 ret
= vfio_add_std_cap(vdev
, pdev
->config
[PCI_CAPABILITY_LIST
], errp
);
1883 vfio_add_ext_cap(vdev
);
1887 static void vfio_pci_pre_reset(VFIOPCIDevice
*vdev
)
1889 PCIDevice
*pdev
= &vdev
->pdev
;
1892 vfio_disable_interrupts(vdev
);
1894 /* Make sure the device is in D0 */
1899 pmcsr
= vfio_pci_read_config(pdev
, vdev
->pm_cap
+ PCI_PM_CTRL
, 2);
1900 state
= pmcsr
& PCI_PM_CTRL_STATE_MASK
;
1902 pmcsr
&= ~PCI_PM_CTRL_STATE_MASK
;
1903 vfio_pci_write_config(pdev
, vdev
->pm_cap
+ PCI_PM_CTRL
, pmcsr
, 2);
1904 /* vfio handles the necessary delay here */
1905 pmcsr
= vfio_pci_read_config(pdev
, vdev
->pm_cap
+ PCI_PM_CTRL
, 2);
1906 state
= pmcsr
& PCI_PM_CTRL_STATE_MASK
;
1908 error_report("vfio: Unable to power on device, stuck in D%d",
1915 * Stop any ongoing DMA by disconecting I/O, MMIO, and bus master.
1916 * Also put INTx Disable in known state.
1918 cmd
= vfio_pci_read_config(pdev
, PCI_COMMAND
, 2);
1919 cmd
&= ~(PCI_COMMAND_IO
| PCI_COMMAND_MEMORY
| PCI_COMMAND_MASTER
|
1920 PCI_COMMAND_INTX_DISABLE
);
1921 vfio_pci_write_config(pdev
, PCI_COMMAND
, cmd
, 2);
1924 static void vfio_pci_post_reset(VFIOPCIDevice
*vdev
)
1928 vfio_intx_enable(vdev
, &err
);
1930 error_reportf_err(err
, ERR_PREFIX
, vdev
->vbasedev
.name
);
1934 static bool vfio_pci_host_match(PCIHostDeviceAddress
*addr
, const char *name
)
1938 sprintf(tmp
, "%04x:%02x:%02x.%1x", addr
->domain
,
1939 addr
->bus
, addr
->slot
, addr
->function
);
1941 return (strcmp(tmp
, name
) == 0);
1944 static int vfio_pci_hot_reset(VFIOPCIDevice
*vdev
, bool single
)
1947 struct vfio_pci_hot_reset_info
*info
;
1948 struct vfio_pci_dependent_device
*devices
;
1949 struct vfio_pci_hot_reset
*reset
;
1954 trace_vfio_pci_hot_reset(vdev
->vbasedev
.name
, single
? "one" : "multi");
1956 vfio_pci_pre_reset(vdev
);
1957 vdev
->vbasedev
.needs_reset
= false;
1959 info
= g_malloc0(sizeof(*info
));
1960 info
->argsz
= sizeof(*info
);
1962 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_GET_PCI_HOT_RESET_INFO
, info
);
1963 if (ret
&& errno
!= ENOSPC
) {
1965 if (!vdev
->has_pm_reset
) {
1966 error_report("vfio: Cannot reset device %s, "
1967 "no available reset mechanism.", vdev
->vbasedev
.name
);
1972 count
= info
->count
;
1973 info
= g_realloc(info
, sizeof(*info
) + (count
* sizeof(*devices
)));
1974 info
->argsz
= sizeof(*info
) + (count
* sizeof(*devices
));
1975 devices
= &info
->devices
[0];
1977 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_GET_PCI_HOT_RESET_INFO
, info
);
1980 error_report("vfio: hot reset info failed: %m");
1984 trace_vfio_pci_hot_reset_has_dep_devices(vdev
->vbasedev
.name
);
1986 /* Verify that we have all the groups required */
1987 for (i
= 0; i
< info
->count
; i
++) {
1988 PCIHostDeviceAddress host
;
1990 VFIODevice
*vbasedev_iter
;
1992 host
.domain
= devices
[i
].segment
;
1993 host
.bus
= devices
[i
].bus
;
1994 host
.slot
= PCI_SLOT(devices
[i
].devfn
);
1995 host
.function
= PCI_FUNC(devices
[i
].devfn
);
1997 trace_vfio_pci_hot_reset_dep_devices(host
.domain
,
1998 host
.bus
, host
.slot
, host
.function
, devices
[i
].group_id
);
2000 if (vfio_pci_host_match(&host
, vdev
->vbasedev
.name
)) {
2004 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2005 if (group
->groupid
== devices
[i
].group_id
) {
2011 if (!vdev
->has_pm_reset
) {
2012 error_report("vfio: Cannot reset device %s, "
2013 "depends on group %d which is not owned.",
2014 vdev
->vbasedev
.name
, devices
[i
].group_id
);
2020 /* Prep dependent devices for reset and clear our marker. */
2021 QLIST_FOREACH(vbasedev_iter
, &group
->device_list
, next
) {
2022 if (vbasedev_iter
->type
!= VFIO_DEVICE_TYPE_PCI
) {
2025 tmp
= container_of(vbasedev_iter
, VFIOPCIDevice
, vbasedev
);
2026 if (vfio_pci_host_match(&host
, tmp
->vbasedev
.name
)) {
2031 vfio_pci_pre_reset(tmp
);
2032 tmp
->vbasedev
.needs_reset
= false;
2039 if (!single
&& !multi
) {
2044 /* Determine how many group fds need to be passed */
2046 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2047 for (i
= 0; i
< info
->count
; i
++) {
2048 if (group
->groupid
== devices
[i
].group_id
) {
2055 reset
= g_malloc0(sizeof(*reset
) + (count
* sizeof(*fds
)));
2056 reset
->argsz
= sizeof(*reset
) + (count
* sizeof(*fds
));
2057 fds
= &reset
->group_fds
[0];
2059 /* Fill in group fds */
2060 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2061 for (i
= 0; i
< info
->count
; i
++) {
2062 if (group
->groupid
== devices
[i
].group_id
) {
2063 fds
[reset
->count
++] = group
->fd
;
2070 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_PCI_HOT_RESET
, reset
);
2073 trace_vfio_pci_hot_reset_result(vdev
->vbasedev
.name
,
2074 ret
? "%m" : "Success");
2077 /* Re-enable INTx on affected devices */
2078 for (i
= 0; i
< info
->count
; i
++) {
2079 PCIHostDeviceAddress host
;
2081 VFIODevice
*vbasedev_iter
;
2083 host
.domain
= devices
[i
].segment
;
2084 host
.bus
= devices
[i
].bus
;
2085 host
.slot
= PCI_SLOT(devices
[i
].devfn
);
2086 host
.function
= PCI_FUNC(devices
[i
].devfn
);
2088 if (vfio_pci_host_match(&host
, vdev
->vbasedev
.name
)) {
2092 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2093 if (group
->groupid
== devices
[i
].group_id
) {
2102 QLIST_FOREACH(vbasedev_iter
, &group
->device_list
, next
) {
2103 if (vbasedev_iter
->type
!= VFIO_DEVICE_TYPE_PCI
) {
2106 tmp
= container_of(vbasedev_iter
, VFIOPCIDevice
, vbasedev
);
2107 if (vfio_pci_host_match(&host
, tmp
->vbasedev
.name
)) {
2108 vfio_pci_post_reset(tmp
);
2114 vfio_pci_post_reset(vdev
);
2121 * We want to differentiate hot reset of mulitple in-use devices vs hot reset
2122 * of a single in-use device. VFIO_DEVICE_RESET will already handle the case
2123 * of doing hot resets when there is only a single device per bus. The in-use
2124 * here refers to how many VFIODevices are affected. A hot reset that affects
2125 * multiple devices, but only a single in-use device, means that we can call
2126 * it from our bus ->reset() callback since the extent is effectively a single
2127 * device. This allows us to make use of it in the hotplug path. When there
2128 * are multiple in-use devices, we can only trigger the hot reset during a
2129 * system reset and thus from our reset handler. We separate _one vs _multi
2130 * here so that we don't overlap and do a double reset on the system reset
2131 * path where both our reset handler and ->reset() callback are used. Calling
2132 * _one() will only do a hot reset for the one in-use devices case, calling
2133 * _multi() will do nothing if a _one() would have been sufficient.
2135 static int vfio_pci_hot_reset_one(VFIOPCIDevice
*vdev
)
2137 return vfio_pci_hot_reset(vdev
, true);
2140 static int vfio_pci_hot_reset_multi(VFIODevice
*vbasedev
)
2142 VFIOPCIDevice
*vdev
= container_of(vbasedev
, VFIOPCIDevice
, vbasedev
);
2143 return vfio_pci_hot_reset(vdev
, false);
2146 static void vfio_pci_compute_needs_reset(VFIODevice
*vbasedev
)
2148 VFIOPCIDevice
*vdev
= container_of(vbasedev
, VFIOPCIDevice
, vbasedev
);
2149 if (!vbasedev
->reset_works
|| (!vdev
->has_flr
&& vdev
->has_pm_reset
)) {
2150 vbasedev
->needs_reset
= true;
2154 static VFIODeviceOps vfio_pci_ops
= {
2155 .vfio_compute_needs_reset
= vfio_pci_compute_needs_reset
,
2156 .vfio_hot_reset_multi
= vfio_pci_hot_reset_multi
,
2157 .vfio_eoi
= vfio_intx_eoi
,
2160 int vfio_populate_vga(VFIOPCIDevice
*vdev
, Error
**errp
)
2162 VFIODevice
*vbasedev
= &vdev
->vbasedev
;
2163 struct vfio_region_info
*reg_info
;
2166 ret
= vfio_get_region_info(vbasedev
, VFIO_PCI_VGA_REGION_INDEX
, ®_info
);
2168 error_setg_errno(errp
, -ret
,
2169 "failed getting region info for VGA region index %d",
2170 VFIO_PCI_VGA_REGION_INDEX
);
2174 if (!(reg_info
->flags
& VFIO_REGION_INFO_FLAG_READ
) ||
2175 !(reg_info
->flags
& VFIO_REGION_INFO_FLAG_WRITE
) ||
2176 reg_info
->size
< 0xbffff + 1) {
2177 error_setg(errp
, "unexpected VGA info, flags 0x%lx, size 0x%lx",
2178 (unsigned long)reg_info
->flags
,
2179 (unsigned long)reg_info
->size
);
2184 vdev
->vga
= g_new0(VFIOVGA
, 1);
2186 vdev
->vga
->fd_offset
= reg_info
->offset
;
2187 vdev
->vga
->fd
= vdev
->vbasedev
.fd
;
2191 vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].offset
= QEMU_PCI_VGA_MEM_BASE
;
2192 vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].nr
= QEMU_PCI_VGA_MEM
;
2193 QLIST_INIT(&vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].quirks
);
2195 memory_region_init_io(&vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].mem
,
2196 OBJECT(vdev
), &vfio_vga_ops
,
2197 &vdev
->vga
->region
[QEMU_PCI_VGA_MEM
],
2198 "vfio-vga-mmio@0xa0000",
2199 QEMU_PCI_VGA_MEM_SIZE
);
2201 vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].offset
= QEMU_PCI_VGA_IO_LO_BASE
;
2202 vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].nr
= QEMU_PCI_VGA_IO_LO
;
2203 QLIST_INIT(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].quirks
);
2205 memory_region_init_io(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].mem
,
2206 OBJECT(vdev
), &vfio_vga_ops
,
2207 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
],
2208 "vfio-vga-io@0x3b0",
2209 QEMU_PCI_VGA_IO_LO_SIZE
);
2211 vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].offset
= QEMU_PCI_VGA_IO_HI_BASE
;
2212 vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].nr
= QEMU_PCI_VGA_IO_HI
;
2213 QLIST_INIT(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].quirks
);
2215 memory_region_init_io(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].mem
,
2216 OBJECT(vdev
), &vfio_vga_ops
,
2217 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
],
2218 "vfio-vga-io@0x3c0",
2219 QEMU_PCI_VGA_IO_HI_SIZE
);
2221 pci_register_vga(&vdev
->pdev
, &vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].mem
,
2222 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].mem
,
2223 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].mem
);
2228 static int vfio_populate_device(VFIOPCIDevice
*vdev
, Error
**errp
)
2230 VFIODevice
*vbasedev
= &vdev
->vbasedev
;
2231 struct vfio_region_info
*reg_info
;
2232 struct vfio_irq_info irq_info
= { .argsz
= sizeof(irq_info
) };
2235 /* Sanity check device */
2236 if (!(vbasedev
->flags
& VFIO_DEVICE_FLAGS_PCI
)) {
2237 error_setg(errp
, "this isn't a PCI device");
2241 if (vbasedev
->num_regions
< VFIO_PCI_CONFIG_REGION_INDEX
+ 1) {
2242 error_setg(errp
, "unexpected number of io regions %u",
2243 vbasedev
->num_regions
);
2247 if (vbasedev
->num_irqs
< VFIO_PCI_MSIX_IRQ_INDEX
+ 1) {
2248 error_setg(errp
, "unexpected number of irqs %u", vbasedev
->num_irqs
);
2252 for (i
= VFIO_PCI_BAR0_REGION_INDEX
; i
< VFIO_PCI_ROM_REGION_INDEX
; i
++) {
2253 char *name
= g_strdup_printf("%s BAR %d", vbasedev
->name
, i
);
2255 ret
= vfio_region_setup(OBJECT(vdev
), vbasedev
,
2256 &vdev
->bars
[i
].region
, i
, name
);
2260 error_setg_errno(errp
, -ret
, "failed to get region %d info", i
);
2264 QLIST_INIT(&vdev
->bars
[i
].quirks
);
2267 ret
= vfio_get_region_info(vbasedev
,
2268 VFIO_PCI_CONFIG_REGION_INDEX
, ®_info
);
2270 error_setg_errno(errp
, -ret
, "failed to get config info");
2274 trace_vfio_populate_device_config(vdev
->vbasedev
.name
,
2275 (unsigned long)reg_info
->size
,
2276 (unsigned long)reg_info
->offset
,
2277 (unsigned long)reg_info
->flags
);
2279 vdev
->config_size
= reg_info
->size
;
2280 if (vdev
->config_size
== PCI_CONFIG_SPACE_SIZE
) {
2281 vdev
->pdev
.cap_present
&= ~QEMU_PCI_CAP_EXPRESS
;
2283 vdev
->config_offset
= reg_info
->offset
;
2287 if (vdev
->features
& VFIO_FEATURE_ENABLE_VGA
) {
2288 ret
= vfio_populate_vga(vdev
, errp
);
2290 error_append_hint(errp
, "device does not support "
2291 "requested feature x-vga\n");
2296 irq_info
.index
= VFIO_PCI_ERR_IRQ_INDEX
;
2298 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_GET_IRQ_INFO
, &irq_info
);
2300 /* This can fail for an old kernel or legacy PCI dev */
2301 trace_vfio_populate_device_get_irq_info_failure();
2303 } else if (irq_info
.count
== 1) {
2304 vdev
->pci_aer
= true;
2306 error_report(WARN_PREFIX
2307 "Could not enable error recovery for the device",
2315 static void vfio_put_device(VFIOPCIDevice
*vdev
)
2317 g_free(vdev
->vbasedev
.name
);
2320 vfio_put_base_device(&vdev
->vbasedev
);
2323 static void vfio_err_notifier_handler(void *opaque
)
2325 VFIOPCIDevice
*vdev
= opaque
;
2327 if (!event_notifier_test_and_clear(&vdev
->err_notifier
)) {
2332 * TBD. Retrieve the error details and decide what action
2333 * needs to be taken. One of the actions could be to pass
2334 * the error to the guest and have the guest driver recover
2335 * from the error. This requires that PCIe capabilities be
2336 * exposed to the guest. For now, we just terminate the
2337 * guest to contain the error.
2340 error_report("%s(%s) Unrecoverable error detected. Please collect any data possible and then kill the guest", __func__
, vdev
->vbasedev
.name
);
2342 vm_stop(RUN_STATE_INTERNAL_ERROR
);
2346 * Registers error notifier for devices supporting error recovery.
2347 * If we encounter a failure in this function, we report an error
2348 * and continue after disabling error recovery support for the
2351 static void vfio_register_err_notifier(VFIOPCIDevice
*vdev
)
2355 struct vfio_irq_set
*irq_set
;
2358 if (!vdev
->pci_aer
) {
2362 if (event_notifier_init(&vdev
->err_notifier
, 0)) {
2363 error_report("vfio: Unable to init event notifier for error detection");
2364 vdev
->pci_aer
= false;
2368 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
2370 irq_set
= g_malloc0(argsz
);
2371 irq_set
->argsz
= argsz
;
2372 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
2373 VFIO_IRQ_SET_ACTION_TRIGGER
;
2374 irq_set
->index
= VFIO_PCI_ERR_IRQ_INDEX
;
2377 pfd
= (int32_t *)&irq_set
->data
;
2379 *pfd
= event_notifier_get_fd(&vdev
->err_notifier
);
2380 qemu_set_fd_handler(*pfd
, vfio_err_notifier_handler
, NULL
, vdev
);
2382 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
2384 error_report("vfio: Failed to set up error notification");
2385 qemu_set_fd_handler(*pfd
, NULL
, NULL
, vdev
);
2386 event_notifier_cleanup(&vdev
->err_notifier
);
2387 vdev
->pci_aer
= false;
2392 static void vfio_unregister_err_notifier(VFIOPCIDevice
*vdev
)
2395 struct vfio_irq_set
*irq_set
;
2399 if (!vdev
->pci_aer
) {
2403 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
2405 irq_set
= g_malloc0(argsz
);
2406 irq_set
->argsz
= argsz
;
2407 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
2408 VFIO_IRQ_SET_ACTION_TRIGGER
;
2409 irq_set
->index
= VFIO_PCI_ERR_IRQ_INDEX
;
2412 pfd
= (int32_t *)&irq_set
->data
;
2415 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
2417 error_report("vfio: Failed to de-assign error fd: %m");
2420 qemu_set_fd_handler(event_notifier_get_fd(&vdev
->err_notifier
),
2422 event_notifier_cleanup(&vdev
->err_notifier
);
2425 static void vfio_req_notifier_handler(void *opaque
)
2427 VFIOPCIDevice
*vdev
= opaque
;
2429 if (!event_notifier_test_and_clear(&vdev
->req_notifier
)) {
2433 qdev_unplug(&vdev
->pdev
.qdev
, NULL
);
2436 static void vfio_register_req_notifier(VFIOPCIDevice
*vdev
)
2438 struct vfio_irq_info irq_info
= { .argsz
= sizeof(irq_info
),
2439 .index
= VFIO_PCI_REQ_IRQ_INDEX
};
2441 struct vfio_irq_set
*irq_set
;
2444 if (!(vdev
->features
& VFIO_FEATURE_ENABLE_REQ
)) {
2448 if (ioctl(vdev
->vbasedev
.fd
,
2449 VFIO_DEVICE_GET_IRQ_INFO
, &irq_info
) < 0 || irq_info
.count
< 1) {
2453 if (event_notifier_init(&vdev
->req_notifier
, 0)) {
2454 error_report("vfio: Unable to init event notifier for device request");
2458 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
2460 irq_set
= g_malloc0(argsz
);
2461 irq_set
->argsz
= argsz
;
2462 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
2463 VFIO_IRQ_SET_ACTION_TRIGGER
;
2464 irq_set
->index
= VFIO_PCI_REQ_IRQ_INDEX
;
2467 pfd
= (int32_t *)&irq_set
->data
;
2469 *pfd
= event_notifier_get_fd(&vdev
->req_notifier
);
2470 qemu_set_fd_handler(*pfd
, vfio_req_notifier_handler
, NULL
, vdev
);
2472 if (ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
)) {
2473 error_report("vfio: Failed to set up device request notification");
2474 qemu_set_fd_handler(*pfd
, NULL
, NULL
, vdev
);
2475 event_notifier_cleanup(&vdev
->req_notifier
);
2477 vdev
->req_enabled
= true;
2483 static void vfio_unregister_req_notifier(VFIOPCIDevice
*vdev
)
2486 struct vfio_irq_set
*irq_set
;
2489 if (!vdev
->req_enabled
) {
2493 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
2495 irq_set
= g_malloc0(argsz
);
2496 irq_set
->argsz
= argsz
;
2497 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
2498 VFIO_IRQ_SET_ACTION_TRIGGER
;
2499 irq_set
->index
= VFIO_PCI_REQ_IRQ_INDEX
;
2502 pfd
= (int32_t *)&irq_set
->data
;
2505 if (ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
)) {
2506 error_report("vfio: Failed to de-assign device request fd: %m");
2509 qemu_set_fd_handler(event_notifier_get_fd(&vdev
->req_notifier
),
2511 event_notifier_cleanup(&vdev
->req_notifier
);
2513 vdev
->req_enabled
= false;
2516 static int vfio_initfn(PCIDevice
*pdev
)
2518 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
2519 VFIODevice
*vbasedev_iter
;
2521 char *tmp
, group_path
[PATH_MAX
], *group_name
;
2528 if (!vdev
->vbasedev
.sysfsdev
) {
2529 vdev
->vbasedev
.sysfsdev
=
2530 g_strdup_printf("/sys/bus/pci/devices/%04x:%02x:%02x.%01x",
2531 vdev
->host
.domain
, vdev
->host
.bus
,
2532 vdev
->host
.slot
, vdev
->host
.function
);
2535 if (stat(vdev
->vbasedev
.sysfsdev
, &st
) < 0) {
2536 error_setg_errno(&err
, errno
, "no such host device");
2541 vdev
->vbasedev
.name
= g_strdup(basename(vdev
->vbasedev
.sysfsdev
));
2542 vdev
->vbasedev
.ops
= &vfio_pci_ops
;
2543 vdev
->vbasedev
.type
= VFIO_DEVICE_TYPE_PCI
;
2545 tmp
= g_strdup_printf("%s/iommu_group", vdev
->vbasedev
.sysfsdev
);
2546 len
= readlink(tmp
, group_path
, sizeof(group_path
));
2549 if (len
<= 0 || len
>= sizeof(group_path
)) {
2550 ret
= len
< 0 ? -errno
: -ENAMETOOLONG
;
2551 error_setg_errno(&err
, -ret
, "no iommu_group found");
2555 group_path
[len
] = 0;
2557 group_name
= basename(group_path
);
2558 if (sscanf(group_name
, "%d", &groupid
) != 1) {
2559 error_setg_errno(&err
, errno
, "failed to read %s", group_path
);
2564 trace_vfio_initfn(vdev
->vbasedev
.name
, groupid
);
2566 group
= vfio_get_group(groupid
, pci_device_iommu_address_space(pdev
));
2568 error_setg(&err
, "failed to get group %d", groupid
);
2573 QLIST_FOREACH(vbasedev_iter
, &group
->device_list
, next
) {
2574 if (strcmp(vbasedev_iter
->name
, vdev
->vbasedev
.name
) == 0) {
2575 error_setg(&err
, "device is already attached");
2576 vfio_put_group(group
);
2582 ret
= vfio_get_device(group
, vdev
->vbasedev
.name
, &vdev
->vbasedev
);
2584 error_setg_errno(&err
, -ret
, "failed to get device");
2585 vfio_put_group(group
);
2589 ret
= vfio_populate_device(vdev
, &err
);
2594 /* Get a copy of config space */
2595 ret
= pread(vdev
->vbasedev
.fd
, vdev
->pdev
.config
,
2596 MIN(pci_config_size(&vdev
->pdev
), vdev
->config_size
),
2597 vdev
->config_offset
);
2598 if (ret
< (int)MIN(pci_config_size(&vdev
->pdev
), vdev
->config_size
)) {
2599 ret
= ret
< 0 ? -errno
: -EFAULT
;
2600 error_setg_errno(&err
, -ret
, "failed to read device config space");
2604 /* vfio emulates a lot for us, but some bits need extra love */
2605 vdev
->emulated_config_bits
= g_malloc0(vdev
->config_size
);
2607 /* QEMU can choose to expose the ROM or not */
2608 memset(vdev
->emulated_config_bits
+ PCI_ROM_ADDRESS
, 0xff, 4);
2611 * The PCI spec reserves vendor ID 0xffff as an invalid value. The
2612 * device ID is managed by the vendor and need only be a 16-bit value.
2613 * Allow any 16-bit value for subsystem so they can be hidden or changed.
2615 if (vdev
->vendor_id
!= PCI_ANY_ID
) {
2616 if (vdev
->vendor_id
>= 0xffff) {
2617 error_setg(&err
, "invalid PCI vendor ID provided");
2621 vfio_add_emulated_word(vdev
, PCI_VENDOR_ID
, vdev
->vendor_id
, ~0);
2622 trace_vfio_pci_emulated_vendor_id(vdev
->vbasedev
.name
, vdev
->vendor_id
);
2624 vdev
->vendor_id
= pci_get_word(pdev
->config
+ PCI_VENDOR_ID
);
2627 if (vdev
->device_id
!= PCI_ANY_ID
) {
2628 if (vdev
->device_id
> 0xffff) {
2629 error_setg(&err
, "invalid PCI device ID provided");
2633 vfio_add_emulated_word(vdev
, PCI_DEVICE_ID
, vdev
->device_id
, ~0);
2634 trace_vfio_pci_emulated_device_id(vdev
->vbasedev
.name
, vdev
->device_id
);
2636 vdev
->device_id
= pci_get_word(pdev
->config
+ PCI_DEVICE_ID
);
2639 if (vdev
->sub_vendor_id
!= PCI_ANY_ID
) {
2640 if (vdev
->sub_vendor_id
> 0xffff) {
2641 error_setg(&err
, "invalid PCI subsystem vendor ID provided");
2645 vfio_add_emulated_word(vdev
, PCI_SUBSYSTEM_VENDOR_ID
,
2646 vdev
->sub_vendor_id
, ~0);
2647 trace_vfio_pci_emulated_sub_vendor_id(vdev
->vbasedev
.name
,
2648 vdev
->sub_vendor_id
);
2651 if (vdev
->sub_device_id
!= PCI_ANY_ID
) {
2652 if (vdev
->sub_device_id
> 0xffff) {
2653 error_setg(&err
, "invalid PCI subsystem device ID provided");
2657 vfio_add_emulated_word(vdev
, PCI_SUBSYSTEM_ID
, vdev
->sub_device_id
, ~0);
2658 trace_vfio_pci_emulated_sub_device_id(vdev
->vbasedev
.name
,
2659 vdev
->sub_device_id
);
2662 /* QEMU can change multi-function devices to single function, or reverse */
2663 vdev
->emulated_config_bits
[PCI_HEADER_TYPE
] =
2664 PCI_HEADER_TYPE_MULTI_FUNCTION
;
2666 /* Restore or clear multifunction, this is always controlled by QEMU */
2667 if (vdev
->pdev
.cap_present
& QEMU_PCI_CAP_MULTIFUNCTION
) {
2668 vdev
->pdev
.config
[PCI_HEADER_TYPE
] |= PCI_HEADER_TYPE_MULTI_FUNCTION
;
2670 vdev
->pdev
.config
[PCI_HEADER_TYPE
] &= ~PCI_HEADER_TYPE_MULTI_FUNCTION
;
2674 * Clear host resource mapping info. If we choose not to register a
2675 * BAR, such as might be the case with the option ROM, we can get
2676 * confusing, unwritable, residual addresses from the host here.
2678 memset(&vdev
->pdev
.config
[PCI_BASE_ADDRESS_0
], 0, 24);
2679 memset(&vdev
->pdev
.config
[PCI_ROM_ADDRESS
], 0, 4);
2681 vfio_pci_size_rom(vdev
);
2683 ret
= vfio_msix_early_setup(vdev
, &err
);
2688 vfio_bars_setup(vdev
);
2690 ret
= vfio_add_capabilities(vdev
, &err
);
2696 vfio_vga_quirk_setup(vdev
);
2699 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
2700 vfio_bar_quirk_setup(vdev
, i
);
2703 if (!vdev
->igd_opregion
&&
2704 vdev
->features
& VFIO_FEATURE_ENABLE_IGD_OPREGION
) {
2705 struct vfio_region_info
*opregion
;
2707 if (vdev
->pdev
.qdev
.hotplugged
) {
2709 "cannot support IGD OpRegion feature on hotplugged "
2715 ret
= vfio_get_dev_region_info(&vdev
->vbasedev
,
2716 VFIO_REGION_TYPE_PCI_VENDOR_TYPE
| PCI_VENDOR_ID_INTEL
,
2717 VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION
, &opregion
);
2719 error_setg_errno(&err
, -ret
,
2720 "does not support requested IGD OpRegion feature");
2724 ret
= vfio_pci_igd_opregion_init(vdev
, opregion
, &err
);
2731 /* QEMU emulates all of MSI & MSIX */
2732 if (pdev
->cap_present
& QEMU_PCI_CAP_MSIX
) {
2733 memset(vdev
->emulated_config_bits
+ pdev
->msix_cap
, 0xff,
2737 if (pdev
->cap_present
& QEMU_PCI_CAP_MSI
) {
2738 memset(vdev
->emulated_config_bits
+ pdev
->msi_cap
, 0xff,
2739 vdev
->msi_cap_size
);
2742 if (vfio_pci_read_config(&vdev
->pdev
, PCI_INTERRUPT_PIN
, 1)) {
2743 vdev
->intx
.mmap_timer
= timer_new_ms(QEMU_CLOCK_VIRTUAL
,
2744 vfio_intx_mmap_enable
, vdev
);
2745 pci_device_set_intx_routing_notifier(&vdev
->pdev
, vfio_intx_update
);
2746 ret
= vfio_intx_enable(vdev
, &err
);
2752 vfio_register_err_notifier(vdev
);
2753 vfio_register_req_notifier(vdev
);
2754 vfio_setup_resetfn_quirk(vdev
);
2759 pci_device_set_intx_routing_notifier(&vdev
->pdev
, NULL
);
2760 vfio_teardown_msi(vdev
);
2761 vfio_bars_exit(vdev
);
2764 error_reportf_err(err
, ERR_PREFIX
, vdev
->vbasedev
.name
);
2769 static void vfio_instance_finalize(Object
*obj
)
2771 PCIDevice
*pci_dev
= PCI_DEVICE(obj
);
2772 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pci_dev
);
2773 VFIOGroup
*group
= vdev
->vbasedev
.group
;
2775 vfio_bars_finalize(vdev
);
2776 g_free(vdev
->emulated_config_bits
);
2779 * XXX Leaking igd_opregion is not an oversight, we can't remove the
2780 * fw_cfg entry therefore leaking this allocation seems like the safest
2783 * g_free(vdev->igd_opregion);
2785 vfio_put_device(vdev
);
2786 vfio_put_group(group
);
2789 static void vfio_exitfn(PCIDevice
*pdev
)
2791 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
2793 vfio_unregister_req_notifier(vdev
);
2794 vfio_unregister_err_notifier(vdev
);
2795 pci_device_set_intx_routing_notifier(&vdev
->pdev
, NULL
);
2796 vfio_disable_interrupts(vdev
);
2797 if (vdev
->intx
.mmap_timer
) {
2798 timer_free(vdev
->intx
.mmap_timer
);
2800 vfio_teardown_msi(vdev
);
2801 vfio_bars_exit(vdev
);
2804 static void vfio_pci_reset(DeviceState
*dev
)
2806 PCIDevice
*pdev
= DO_UPCAST(PCIDevice
, qdev
, dev
);
2807 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
2809 trace_vfio_pci_reset(vdev
->vbasedev
.name
);
2811 vfio_pci_pre_reset(vdev
);
2813 if (vdev
->resetfn
&& !vdev
->resetfn(vdev
)) {
2817 if (vdev
->vbasedev
.reset_works
&&
2818 (vdev
->has_flr
|| !vdev
->has_pm_reset
) &&
2819 !ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_RESET
)) {
2820 trace_vfio_pci_reset_flr(vdev
->vbasedev
.name
);
2824 /* See if we can do our own bus reset */
2825 if (!vfio_pci_hot_reset_one(vdev
)) {
2829 /* If nothing else works and the device supports PM reset, use it */
2830 if (vdev
->vbasedev
.reset_works
&& vdev
->has_pm_reset
&&
2831 !ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_RESET
)) {
2832 trace_vfio_pci_reset_pm(vdev
->vbasedev
.name
);
2837 vfio_pci_post_reset(vdev
);
2840 static void vfio_instance_init(Object
*obj
)
2842 PCIDevice
*pci_dev
= PCI_DEVICE(obj
);
2843 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, PCI_DEVICE(obj
));
2845 device_add_bootindex_property(obj
, &vdev
->bootindex
,
2847 &pci_dev
->qdev
, NULL
);
2850 static Property vfio_pci_dev_properties
[] = {
2851 DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice
, host
),
2852 DEFINE_PROP_STRING("sysfsdev", VFIOPCIDevice
, vbasedev
.sysfsdev
),
2853 DEFINE_PROP_UINT32("x-intx-mmap-timeout-ms", VFIOPCIDevice
,
2854 intx
.mmap_timeout
, 1100),
2855 DEFINE_PROP_BIT("x-vga", VFIOPCIDevice
, features
,
2856 VFIO_FEATURE_ENABLE_VGA_BIT
, false),
2857 DEFINE_PROP_BIT("x-req", VFIOPCIDevice
, features
,
2858 VFIO_FEATURE_ENABLE_REQ_BIT
, true),
2859 DEFINE_PROP_BIT("x-igd-opregion", VFIOPCIDevice
, features
,
2860 VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT
, false),
2861 DEFINE_PROP_BOOL("x-no-mmap", VFIOPCIDevice
, vbasedev
.no_mmap
, false),
2862 DEFINE_PROP_BOOL("x-no-kvm-intx", VFIOPCIDevice
, no_kvm_intx
, false),
2863 DEFINE_PROP_BOOL("x-no-kvm-msi", VFIOPCIDevice
, no_kvm_msi
, false),
2864 DEFINE_PROP_BOOL("x-no-kvm-msix", VFIOPCIDevice
, no_kvm_msix
, false),
2865 DEFINE_PROP_UINT32("x-pci-vendor-id", VFIOPCIDevice
, vendor_id
, PCI_ANY_ID
),
2866 DEFINE_PROP_UINT32("x-pci-device-id", VFIOPCIDevice
, device_id
, PCI_ANY_ID
),
2867 DEFINE_PROP_UINT32("x-pci-sub-vendor-id", VFIOPCIDevice
,
2868 sub_vendor_id
, PCI_ANY_ID
),
2869 DEFINE_PROP_UINT32("x-pci-sub-device-id", VFIOPCIDevice
,
2870 sub_device_id
, PCI_ANY_ID
),
2871 DEFINE_PROP_UINT32("x-igd-gms", VFIOPCIDevice
, igd_gms
, 0),
2873 * TODO - support passed fds... is this necessary?
2874 * DEFINE_PROP_STRING("vfiofd", VFIOPCIDevice, vfiofd_name),
2875 * DEFINE_PROP_STRING("vfiogroupfd, VFIOPCIDevice, vfiogroupfd_name),
2877 DEFINE_PROP_END_OF_LIST(),
2880 static const VMStateDescription vfio_pci_vmstate
= {
2885 static void vfio_pci_dev_class_init(ObjectClass
*klass
, void *data
)
2887 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2888 PCIDeviceClass
*pdc
= PCI_DEVICE_CLASS(klass
);
2890 dc
->reset
= vfio_pci_reset
;
2891 dc
->props
= vfio_pci_dev_properties
;
2892 dc
->vmsd
= &vfio_pci_vmstate
;
2893 dc
->desc
= "VFIO-based PCI device assignment";
2894 set_bit(DEVICE_CATEGORY_MISC
, dc
->categories
);
2895 pdc
->init
= vfio_initfn
;
2896 pdc
->exit
= vfio_exitfn
;
2897 pdc
->config_read
= vfio_pci_read_config
;
2898 pdc
->config_write
= vfio_pci_write_config
;
2899 pdc
->is_express
= 1; /* We might be */
2902 static const TypeInfo vfio_pci_dev_info
= {
2904 .parent
= TYPE_PCI_DEVICE
,
2905 .instance_size
= sizeof(VFIOPCIDevice
),
2906 .class_init
= vfio_pci_dev_class_init
,
2907 .instance_init
= vfio_instance_init
,
2908 .instance_finalize
= vfio_instance_finalize
,
2911 static void register_vfio_pci_dev_type(void)
2913 type_register_static(&vfio_pci_dev_info
);
2916 type_init(register_vfio_pci_dev_type
)