2 * vfio based device assignment support
4 * Copyright Red Hat, Inc. 2012
7 * Alex Williamson <alex.williamson@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
12 * Based on qemu-kvm device-assignment:
13 * Adapted for KVM by Qumranet.
14 * Copyright (c) 2007, Neocleus, Alex Novik (alex@neocleus.com)
15 * Copyright (c) 2007, Neocleus, Guy Zana (guy@neocleus.com)
16 * Copyright (C) 2008, Qumranet, Amit Shah (amit.shah@qumranet.com)
17 * Copyright (C) 2008, Red Hat, Amit Shah (amit.shah@redhat.com)
18 * Copyright (C) 2008, IBM, Muli Ben-Yehuda (muli@il.ibm.com)
21 #include "qemu/osdep.h"
22 #include <linux/vfio.h>
23 #include <sys/ioctl.h>
25 #include "hw/pci/msi.h"
26 #include "hw/pci/msix.h"
27 #include "hw/pci/pci_bridge.h"
28 #include "qemu/error-report.h"
29 #include "qemu/option.h"
30 #include "qemu/range.h"
31 #include "qemu/units.h"
32 #include "sysemu/kvm.h"
33 #include "sysemu/sysemu.h"
36 #include "qapi/error.h"
38 #define MSIX_CAP_LENGTH 12
40 static void vfio_disable_interrupts(VFIOPCIDevice
*vdev
);
41 static void vfio_mmap_set_enabled(VFIOPCIDevice
*vdev
, bool enabled
);
44 * Disabling BAR mmaping can be slow, but toggling it around INTx can
45 * also be a huge overhead. We try to get the best of both worlds by
46 * waiting until an interrupt to disable mmaps (subsequent transitions
47 * to the same state are effectively no overhead). If the interrupt has
48 * been serviced and the time gap is long enough, we re-enable mmaps for
49 * performance. This works well for things like graphics cards, which
50 * may not use their interrupt at all and are penalized to an unusable
51 * level by read/write BAR traps. Other devices, like NICs, have more
52 * regular interrupts and see much better latency by staying in non-mmap
53 * mode. We therefore set the default mmap_timeout such that a ping
54 * is just enough to keep the mmap disabled. Users can experiment with
55 * other options with the x-intx-mmap-timeout-ms parameter (a value of
56 * zero disables the timer).
58 static void vfio_intx_mmap_enable(void *opaque
)
60 VFIOPCIDevice
*vdev
= opaque
;
62 if (vdev
->intx
.pending
) {
63 timer_mod(vdev
->intx
.mmap_timer
,
64 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL
) + vdev
->intx
.mmap_timeout
);
68 vfio_mmap_set_enabled(vdev
, true);
71 static void vfio_intx_interrupt(void *opaque
)
73 VFIOPCIDevice
*vdev
= opaque
;
75 if (!event_notifier_test_and_clear(&vdev
->intx
.interrupt
)) {
79 trace_vfio_intx_interrupt(vdev
->vbasedev
.name
, 'A' + vdev
->intx
.pin
);
81 vdev
->intx
.pending
= true;
82 pci_irq_assert(&vdev
->pdev
);
83 vfio_mmap_set_enabled(vdev
, false);
84 if (vdev
->intx
.mmap_timeout
) {
85 timer_mod(vdev
->intx
.mmap_timer
,
86 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL
) + vdev
->intx
.mmap_timeout
);
90 static void vfio_intx_eoi(VFIODevice
*vbasedev
)
92 VFIOPCIDevice
*vdev
= container_of(vbasedev
, VFIOPCIDevice
, vbasedev
);
94 if (!vdev
->intx
.pending
) {
98 trace_vfio_intx_eoi(vbasedev
->name
);
100 vdev
->intx
.pending
= false;
101 pci_irq_deassert(&vdev
->pdev
);
102 vfio_unmask_single_irqindex(vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
105 static void vfio_intx_enable_kvm(VFIOPCIDevice
*vdev
, Error
**errp
)
108 struct kvm_irqfd irqfd
= {
109 .fd
= event_notifier_get_fd(&vdev
->intx
.interrupt
),
110 .gsi
= vdev
->intx
.route
.irq
,
111 .flags
= KVM_IRQFD_FLAG_RESAMPLE
,
113 struct vfio_irq_set
*irq_set
;
117 if (vdev
->no_kvm_intx
|| !kvm_irqfds_enabled() ||
118 vdev
->intx
.route
.mode
!= PCI_INTX_ENABLED
||
119 !kvm_resamplefds_enabled()) {
123 /* Get to a known interrupt state */
124 qemu_set_fd_handler(irqfd
.fd
, NULL
, NULL
, vdev
);
125 vfio_mask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
126 vdev
->intx
.pending
= false;
127 pci_irq_deassert(&vdev
->pdev
);
129 /* Get an eventfd for resample/unmask */
130 if (event_notifier_init(&vdev
->intx
.unmask
, 0)) {
131 error_setg(errp
, "event_notifier_init failed eoi");
135 /* KVM triggers it, VFIO listens for it */
136 irqfd
.resamplefd
= event_notifier_get_fd(&vdev
->intx
.unmask
);
138 if (kvm_vm_ioctl(kvm_state
, KVM_IRQFD
, &irqfd
)) {
139 error_setg_errno(errp
, errno
, "failed to setup resample irqfd");
143 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
145 irq_set
= g_malloc0(argsz
);
146 irq_set
->argsz
= argsz
;
147 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
| VFIO_IRQ_SET_ACTION_UNMASK
;
148 irq_set
->index
= VFIO_PCI_INTX_IRQ_INDEX
;
151 pfd
= (int32_t *)&irq_set
->data
;
153 *pfd
= irqfd
.resamplefd
;
155 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
158 error_setg_errno(errp
, -ret
, "failed to setup INTx unmask fd");
163 vfio_unmask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
165 vdev
->intx
.kvm_accel
= true;
167 trace_vfio_intx_enable_kvm(vdev
->vbasedev
.name
);
172 irqfd
.flags
= KVM_IRQFD_FLAG_DEASSIGN
;
173 kvm_vm_ioctl(kvm_state
, KVM_IRQFD
, &irqfd
);
175 event_notifier_cleanup(&vdev
->intx
.unmask
);
177 qemu_set_fd_handler(irqfd
.fd
, vfio_intx_interrupt
, NULL
, vdev
);
178 vfio_unmask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
182 static void vfio_intx_disable_kvm(VFIOPCIDevice
*vdev
)
185 struct kvm_irqfd irqfd
= {
186 .fd
= event_notifier_get_fd(&vdev
->intx
.interrupt
),
187 .gsi
= vdev
->intx
.route
.irq
,
188 .flags
= KVM_IRQFD_FLAG_DEASSIGN
,
191 if (!vdev
->intx
.kvm_accel
) {
196 * Get to a known state, hardware masked, QEMU ready to accept new
197 * interrupts, QEMU IRQ de-asserted.
199 vfio_mask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
200 vdev
->intx
.pending
= false;
201 pci_irq_deassert(&vdev
->pdev
);
203 /* Tell KVM to stop listening for an INTx irqfd */
204 if (kvm_vm_ioctl(kvm_state
, KVM_IRQFD
, &irqfd
)) {
205 error_report("vfio: Error: Failed to disable INTx irqfd: %m");
208 /* We only need to close the eventfd for VFIO to cleanup the kernel side */
209 event_notifier_cleanup(&vdev
->intx
.unmask
);
211 /* QEMU starts listening for interrupt events. */
212 qemu_set_fd_handler(irqfd
.fd
, vfio_intx_interrupt
, NULL
, vdev
);
214 vdev
->intx
.kvm_accel
= false;
216 /* If we've missed an event, let it re-fire through QEMU */
217 vfio_unmask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
219 trace_vfio_intx_disable_kvm(vdev
->vbasedev
.name
);
223 static void vfio_intx_update(PCIDevice
*pdev
)
225 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
229 if (vdev
->interrupt
!= VFIO_INT_INTx
) {
233 route
= pci_device_route_intx_to_irq(&vdev
->pdev
, vdev
->intx
.pin
);
235 if (!pci_intx_route_changed(&vdev
->intx
.route
, &route
)) {
236 return; /* Nothing changed */
239 trace_vfio_intx_update(vdev
->vbasedev
.name
,
240 vdev
->intx
.route
.irq
, route
.irq
);
242 vfio_intx_disable_kvm(vdev
);
244 vdev
->intx
.route
= route
;
246 if (route
.mode
!= PCI_INTX_ENABLED
) {
250 vfio_intx_enable_kvm(vdev
, &err
);
252 error_reportf_err(err
, WARN_PREFIX
, vdev
->vbasedev
.name
);
255 /* Re-enable the interrupt in cased we missed an EOI */
256 vfio_intx_eoi(&vdev
->vbasedev
);
259 static int vfio_intx_enable(VFIOPCIDevice
*vdev
, Error
**errp
)
261 uint8_t pin
= vfio_pci_read_config(&vdev
->pdev
, PCI_INTERRUPT_PIN
, 1);
262 int ret
, argsz
, retval
= 0;
263 struct vfio_irq_set
*irq_set
;
271 vfio_disable_interrupts(vdev
);
273 vdev
->intx
.pin
= pin
- 1; /* Pin A (1) -> irq[0] */
274 pci_config_set_interrupt_pin(vdev
->pdev
.config
, pin
);
278 * Only conditional to avoid generating error messages on platforms
279 * where we won't actually use the result anyway.
281 if (kvm_irqfds_enabled() && kvm_resamplefds_enabled()) {
282 vdev
->intx
.route
= pci_device_route_intx_to_irq(&vdev
->pdev
,
287 ret
= event_notifier_init(&vdev
->intx
.interrupt
, 0);
289 error_setg_errno(errp
, -ret
, "event_notifier_init failed");
293 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
295 irq_set
= g_malloc0(argsz
);
296 irq_set
->argsz
= argsz
;
297 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
| VFIO_IRQ_SET_ACTION_TRIGGER
;
298 irq_set
->index
= VFIO_PCI_INTX_IRQ_INDEX
;
301 pfd
= (int32_t *)&irq_set
->data
;
303 *pfd
= event_notifier_get_fd(&vdev
->intx
.interrupt
);
304 qemu_set_fd_handler(*pfd
, vfio_intx_interrupt
, NULL
, vdev
);
306 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
308 error_setg_errno(errp
, -ret
, "failed to setup INTx fd");
309 qemu_set_fd_handler(*pfd
, NULL
, NULL
, vdev
);
310 event_notifier_cleanup(&vdev
->intx
.interrupt
);
315 vfio_intx_enable_kvm(vdev
, &err
);
317 error_reportf_err(err
, WARN_PREFIX
, vdev
->vbasedev
.name
);
320 vdev
->interrupt
= VFIO_INT_INTx
;
322 trace_vfio_intx_enable(vdev
->vbasedev
.name
);
330 static void vfio_intx_disable(VFIOPCIDevice
*vdev
)
334 timer_del(vdev
->intx
.mmap_timer
);
335 vfio_intx_disable_kvm(vdev
);
336 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
337 vdev
->intx
.pending
= false;
338 pci_irq_deassert(&vdev
->pdev
);
339 vfio_mmap_set_enabled(vdev
, true);
341 fd
= event_notifier_get_fd(&vdev
->intx
.interrupt
);
342 qemu_set_fd_handler(fd
, NULL
, NULL
, vdev
);
343 event_notifier_cleanup(&vdev
->intx
.interrupt
);
345 vdev
->interrupt
= VFIO_INT_NONE
;
347 trace_vfio_intx_disable(vdev
->vbasedev
.name
);
353 static void vfio_msi_interrupt(void *opaque
)
355 VFIOMSIVector
*vector
= opaque
;
356 VFIOPCIDevice
*vdev
= vector
->vdev
;
357 MSIMessage (*get_msg
)(PCIDevice
*dev
, unsigned vector
);
358 void (*notify
)(PCIDevice
*dev
, unsigned vector
);
360 int nr
= vector
- vdev
->msi_vectors
;
362 if (!event_notifier_test_and_clear(&vector
->interrupt
)) {
366 if (vdev
->interrupt
== VFIO_INT_MSIX
) {
367 get_msg
= msix_get_message
;
368 notify
= msix_notify
;
370 /* A masked vector firing needs to use the PBA, enable it */
371 if (msix_is_masked(&vdev
->pdev
, nr
)) {
372 set_bit(nr
, vdev
->msix
->pending
);
373 memory_region_set_enabled(&vdev
->pdev
.msix_pba_mmio
, true);
374 trace_vfio_msix_pba_enable(vdev
->vbasedev
.name
);
376 } else if (vdev
->interrupt
== VFIO_INT_MSI
) {
377 get_msg
= msi_get_message
;
383 msg
= get_msg(&vdev
->pdev
, nr
);
384 trace_vfio_msi_interrupt(vdev
->vbasedev
.name
, nr
, msg
.address
, msg
.data
);
385 notify(&vdev
->pdev
, nr
);
388 static int vfio_enable_vectors(VFIOPCIDevice
*vdev
, bool msix
)
390 struct vfio_irq_set
*irq_set
;
391 int ret
= 0, i
, argsz
;
394 argsz
= sizeof(*irq_set
) + (vdev
->nr_vectors
* sizeof(*fds
));
396 irq_set
= g_malloc0(argsz
);
397 irq_set
->argsz
= argsz
;
398 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
| VFIO_IRQ_SET_ACTION_TRIGGER
;
399 irq_set
->index
= msix
? VFIO_PCI_MSIX_IRQ_INDEX
: VFIO_PCI_MSI_IRQ_INDEX
;
401 irq_set
->count
= vdev
->nr_vectors
;
402 fds
= (int32_t *)&irq_set
->data
;
404 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
408 * MSI vs MSI-X - The guest has direct access to MSI mask and pending
409 * bits, therefore we always use the KVM signaling path when setup.
410 * MSI-X mask and pending bits are emulated, so we want to use the
411 * KVM signaling path only when configured and unmasked.
413 if (vdev
->msi_vectors
[i
].use
) {
414 if (vdev
->msi_vectors
[i
].virq
< 0 ||
415 (msix
&& msix_is_masked(&vdev
->pdev
, i
))) {
416 fd
= event_notifier_get_fd(&vdev
->msi_vectors
[i
].interrupt
);
418 fd
= event_notifier_get_fd(&vdev
->msi_vectors
[i
].kvm_interrupt
);
425 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
432 static void vfio_add_kvm_msi_virq(VFIOPCIDevice
*vdev
, VFIOMSIVector
*vector
,
433 int vector_n
, bool msix
)
437 if ((msix
&& vdev
->no_kvm_msix
) || (!msix
&& vdev
->no_kvm_msi
)) {
441 if (event_notifier_init(&vector
->kvm_interrupt
, 0)) {
445 virq
= kvm_irqchip_add_msi_route(kvm_state
, vector_n
, &vdev
->pdev
);
447 event_notifier_cleanup(&vector
->kvm_interrupt
);
451 if (kvm_irqchip_add_irqfd_notifier_gsi(kvm_state
, &vector
->kvm_interrupt
,
453 kvm_irqchip_release_virq(kvm_state
, virq
);
454 event_notifier_cleanup(&vector
->kvm_interrupt
);
461 static void vfio_remove_kvm_msi_virq(VFIOMSIVector
*vector
)
463 kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state
, &vector
->kvm_interrupt
,
465 kvm_irqchip_release_virq(kvm_state
, vector
->virq
);
467 event_notifier_cleanup(&vector
->kvm_interrupt
);
470 static void vfio_update_kvm_msi_virq(VFIOMSIVector
*vector
, MSIMessage msg
,
473 kvm_irqchip_update_msi_route(kvm_state
, vector
->virq
, msg
, pdev
);
474 kvm_irqchip_commit_routes(kvm_state
);
477 static int vfio_msix_vector_do_use(PCIDevice
*pdev
, unsigned int nr
,
478 MSIMessage
*msg
, IOHandler
*handler
)
480 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
481 VFIOMSIVector
*vector
;
484 trace_vfio_msix_vector_do_use(vdev
->vbasedev
.name
, nr
);
486 vector
= &vdev
->msi_vectors
[nr
];
491 if (event_notifier_init(&vector
->interrupt
, 0)) {
492 error_report("vfio: Error: event_notifier_init failed");
495 msix_vector_use(pdev
, nr
);
498 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
499 handler
, NULL
, vector
);
502 * Attempt to enable route through KVM irqchip,
503 * default to userspace handling if unavailable.
505 if (vector
->virq
>= 0) {
507 vfio_remove_kvm_msi_virq(vector
);
509 vfio_update_kvm_msi_virq(vector
, *msg
, pdev
);
513 vfio_add_kvm_msi_virq(vdev
, vector
, nr
, true);
518 * We don't want to have the host allocate all possible MSI vectors
519 * for a device if they're not in use, so we shutdown and incrementally
520 * increase them as needed.
522 if (vdev
->nr_vectors
< nr
+ 1) {
523 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_MSIX_IRQ_INDEX
);
524 vdev
->nr_vectors
= nr
+ 1;
525 ret
= vfio_enable_vectors(vdev
, true);
527 error_report("vfio: failed to enable vectors, %d", ret
);
531 struct vfio_irq_set
*irq_set
;
534 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
536 irq_set
= g_malloc0(argsz
);
537 irq_set
->argsz
= argsz
;
538 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
539 VFIO_IRQ_SET_ACTION_TRIGGER
;
540 irq_set
->index
= VFIO_PCI_MSIX_IRQ_INDEX
;
543 pfd
= (int32_t *)&irq_set
->data
;
545 if (vector
->virq
>= 0) {
546 *pfd
= event_notifier_get_fd(&vector
->kvm_interrupt
);
548 *pfd
= event_notifier_get_fd(&vector
->interrupt
);
551 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
554 error_report("vfio: failed to modify vector, %d", ret
);
558 /* Disable PBA emulation when nothing more is pending. */
559 clear_bit(nr
, vdev
->msix
->pending
);
560 if (find_first_bit(vdev
->msix
->pending
,
561 vdev
->nr_vectors
) == vdev
->nr_vectors
) {
562 memory_region_set_enabled(&vdev
->pdev
.msix_pba_mmio
, false);
563 trace_vfio_msix_pba_disable(vdev
->vbasedev
.name
);
569 static int vfio_msix_vector_use(PCIDevice
*pdev
,
570 unsigned int nr
, MSIMessage msg
)
572 return vfio_msix_vector_do_use(pdev
, nr
, &msg
, vfio_msi_interrupt
);
575 static void vfio_msix_vector_release(PCIDevice
*pdev
, unsigned int nr
)
577 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
578 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[nr
];
580 trace_vfio_msix_vector_release(vdev
->vbasedev
.name
, nr
);
583 * There are still old guests that mask and unmask vectors on every
584 * interrupt. If we're using QEMU bypass with a KVM irqfd, leave all of
585 * the KVM setup in place, simply switch VFIO to use the non-bypass
586 * eventfd. We'll then fire the interrupt through QEMU and the MSI-X
587 * core will mask the interrupt and set pending bits, allowing it to
588 * be re-asserted on unmask. Nothing to do if already using QEMU mode.
590 if (vector
->virq
>= 0) {
592 struct vfio_irq_set
*irq_set
;
595 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
597 irq_set
= g_malloc0(argsz
);
598 irq_set
->argsz
= argsz
;
599 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
600 VFIO_IRQ_SET_ACTION_TRIGGER
;
601 irq_set
->index
= VFIO_PCI_MSIX_IRQ_INDEX
;
604 pfd
= (int32_t *)&irq_set
->data
;
606 *pfd
= event_notifier_get_fd(&vector
->interrupt
);
608 ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
614 static void vfio_msix_enable(VFIOPCIDevice
*vdev
)
616 vfio_disable_interrupts(vdev
);
618 vdev
->msi_vectors
= g_new0(VFIOMSIVector
, vdev
->msix
->entries
);
620 vdev
->interrupt
= VFIO_INT_MSIX
;
623 * Some communication channels between VF & PF or PF & fw rely on the
624 * physical state of the device and expect that enabling MSI-X from the
625 * guest enables the same on the host. When our guest is Linux, the
626 * guest driver call to pci_enable_msix() sets the enabling bit in the
627 * MSI-X capability, but leaves the vector table masked. We therefore
628 * can't rely on a vector_use callback (from request_irq() in the guest)
629 * to switch the physical device into MSI-X mode because that may come a
630 * long time after pci_enable_msix(). This code enables vector 0 with
631 * triggering to userspace, then immediately release the vector, leaving
632 * the physical device with no vectors enabled, but MSI-X enabled, just
633 * like the guest view.
635 vfio_msix_vector_do_use(&vdev
->pdev
, 0, NULL
, NULL
);
636 vfio_msix_vector_release(&vdev
->pdev
, 0);
638 if (msix_set_vector_notifiers(&vdev
->pdev
, vfio_msix_vector_use
,
639 vfio_msix_vector_release
, NULL
)) {
640 error_report("vfio: msix_set_vector_notifiers failed");
643 trace_vfio_msix_enable(vdev
->vbasedev
.name
);
646 static void vfio_msi_enable(VFIOPCIDevice
*vdev
)
650 vfio_disable_interrupts(vdev
);
652 vdev
->nr_vectors
= msi_nr_vectors_allocated(&vdev
->pdev
);
654 vdev
->msi_vectors
= g_new0(VFIOMSIVector
, vdev
->nr_vectors
);
656 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
657 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
663 if (event_notifier_init(&vector
->interrupt
, 0)) {
664 error_report("vfio: Error: event_notifier_init failed");
667 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
668 vfio_msi_interrupt
, NULL
, vector
);
671 * Attempt to enable route through KVM irqchip,
672 * default to userspace handling if unavailable.
674 vfio_add_kvm_msi_virq(vdev
, vector
, i
, false);
677 /* Set interrupt type prior to possible interrupts */
678 vdev
->interrupt
= VFIO_INT_MSI
;
680 ret
= vfio_enable_vectors(vdev
, false);
683 error_report("vfio: Error: Failed to setup MSI fds: %m");
684 } else if (ret
!= vdev
->nr_vectors
) {
685 error_report("vfio: Error: Failed to enable %d "
686 "MSI vectors, retry with %d", vdev
->nr_vectors
, ret
);
689 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
690 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
691 if (vector
->virq
>= 0) {
692 vfio_remove_kvm_msi_virq(vector
);
694 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
696 event_notifier_cleanup(&vector
->interrupt
);
699 g_free(vdev
->msi_vectors
);
701 if (ret
> 0 && ret
!= vdev
->nr_vectors
) {
702 vdev
->nr_vectors
= ret
;
705 vdev
->nr_vectors
= 0;
708 * Failing to setup MSI doesn't really fall within any specification.
709 * Let's try leaving interrupts disabled and hope the guest figures
710 * out to fall back to INTx for this device.
712 error_report("vfio: Error: Failed to enable MSI");
713 vdev
->interrupt
= VFIO_INT_NONE
;
718 trace_vfio_msi_enable(vdev
->vbasedev
.name
, vdev
->nr_vectors
);
721 static void vfio_msi_disable_common(VFIOPCIDevice
*vdev
)
726 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
727 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
728 if (vdev
->msi_vectors
[i
].use
) {
729 if (vector
->virq
>= 0) {
730 vfio_remove_kvm_msi_virq(vector
);
732 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
734 event_notifier_cleanup(&vector
->interrupt
);
738 g_free(vdev
->msi_vectors
);
739 vdev
->msi_vectors
= NULL
;
740 vdev
->nr_vectors
= 0;
741 vdev
->interrupt
= VFIO_INT_NONE
;
743 vfio_intx_enable(vdev
, &err
);
745 error_reportf_err(err
, ERR_PREFIX
, vdev
->vbasedev
.name
);
749 static void vfio_msix_disable(VFIOPCIDevice
*vdev
)
753 msix_unset_vector_notifiers(&vdev
->pdev
);
756 * MSI-X will only release vectors if MSI-X is still enabled on the
757 * device, check through the rest and release it ourselves if necessary.
759 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
760 if (vdev
->msi_vectors
[i
].use
) {
761 vfio_msix_vector_release(&vdev
->pdev
, i
);
762 msix_vector_unuse(&vdev
->pdev
, i
);
766 if (vdev
->nr_vectors
) {
767 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_MSIX_IRQ_INDEX
);
770 vfio_msi_disable_common(vdev
);
772 memset(vdev
->msix
->pending
, 0,
773 BITS_TO_LONGS(vdev
->msix
->entries
) * sizeof(unsigned long));
775 trace_vfio_msix_disable(vdev
->vbasedev
.name
);
778 static void vfio_msi_disable(VFIOPCIDevice
*vdev
)
780 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_MSI_IRQ_INDEX
);
781 vfio_msi_disable_common(vdev
);
783 trace_vfio_msi_disable(vdev
->vbasedev
.name
);
786 static void vfio_update_msi(VFIOPCIDevice
*vdev
)
790 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
791 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
794 if (!vector
->use
|| vector
->virq
< 0) {
798 msg
= msi_get_message(&vdev
->pdev
, i
);
799 vfio_update_kvm_msi_virq(vector
, msg
, &vdev
->pdev
);
803 static void vfio_pci_load_rom(VFIOPCIDevice
*vdev
)
805 struct vfio_region_info
*reg_info
;
810 if (vfio_get_region_info(&vdev
->vbasedev
,
811 VFIO_PCI_ROM_REGION_INDEX
, ®_info
)) {
812 error_report("vfio: Error getting ROM info: %m");
816 trace_vfio_pci_load_rom(vdev
->vbasedev
.name
, (unsigned long)reg_info
->size
,
817 (unsigned long)reg_info
->offset
,
818 (unsigned long)reg_info
->flags
);
820 vdev
->rom_size
= size
= reg_info
->size
;
821 vdev
->rom_offset
= reg_info
->offset
;
825 if (!vdev
->rom_size
) {
826 vdev
->rom_read_failed
= true;
827 error_report("vfio-pci: Cannot read device rom at "
828 "%s", vdev
->vbasedev
.name
);
829 error_printf("Device option ROM contents are probably invalid "
830 "(check dmesg).\nSkip option ROM probe with rombar=0, "
831 "or load from file with romfile=\n");
835 vdev
->rom
= g_malloc(size
);
836 memset(vdev
->rom
, 0xff, size
);
839 bytes
= pread(vdev
->vbasedev
.fd
, vdev
->rom
+ off
,
840 size
, vdev
->rom_offset
+ off
);
843 } else if (bytes
> 0) {
847 if (errno
== EINTR
|| errno
== EAGAIN
) {
850 error_report("vfio: Error reading device ROM: %m");
856 * Test the ROM signature against our device, if the vendor is correct
857 * but the device ID doesn't match, store the correct device ID and
858 * recompute the checksum. Intel IGD devices need this and are known
859 * to have bogus checksums so we can't simply adjust the checksum.
861 if (pci_get_word(vdev
->rom
) == 0xaa55 &&
862 pci_get_word(vdev
->rom
+ 0x18) + 8 < vdev
->rom_size
&&
863 !memcmp(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18), "PCIR", 4)) {
866 vid
= pci_get_word(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18) + 4);
867 did
= pci_get_word(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18) + 6);
869 if (vid
== vdev
->vendor_id
&& did
!= vdev
->device_id
) {
871 uint8_t csum
, *data
= vdev
->rom
;
873 pci_set_word(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18) + 6,
877 for (csum
= 0, i
= 0; i
< vdev
->rom_size
; i
++) {
886 static uint64_t vfio_rom_read(void *opaque
, hwaddr addr
, unsigned size
)
888 VFIOPCIDevice
*vdev
= opaque
;
897 /* Load the ROM lazily when the guest tries to read it */
898 if (unlikely(!vdev
->rom
&& !vdev
->rom_read_failed
)) {
899 vfio_pci_load_rom(vdev
);
902 memcpy(&val
, vdev
->rom
+ addr
,
903 (addr
< vdev
->rom_size
) ? MIN(size
, vdev
->rom_size
- addr
) : 0);
910 data
= le16_to_cpu(val
.word
);
913 data
= le32_to_cpu(val
.dword
);
916 hw_error("vfio: unsupported read size, %d bytes\n", size
);
920 trace_vfio_rom_read(vdev
->vbasedev
.name
, addr
, size
, data
);
925 static void vfio_rom_write(void *opaque
, hwaddr addr
,
926 uint64_t data
, unsigned size
)
930 static const MemoryRegionOps vfio_rom_ops
= {
931 .read
= vfio_rom_read
,
932 .write
= vfio_rom_write
,
933 .endianness
= DEVICE_LITTLE_ENDIAN
,
936 static void vfio_pci_size_rom(VFIOPCIDevice
*vdev
)
938 uint32_t orig
, size
= cpu_to_le32((uint32_t)PCI_ROM_ADDRESS_MASK
);
939 off_t offset
= vdev
->config_offset
+ PCI_ROM_ADDRESS
;
940 DeviceState
*dev
= DEVICE(vdev
);
942 int fd
= vdev
->vbasedev
.fd
;
944 if (vdev
->pdev
.romfile
|| !vdev
->pdev
.rom_bar
) {
945 /* Since pci handles romfile, just print a message and return */
946 if (vfio_blacklist_opt_rom(vdev
) && vdev
->pdev
.romfile
) {
947 error_printf("Warning : Device at %s is known to cause system instability issues during option rom execution. Proceeding anyway since user specified romfile\n",
948 vdev
->vbasedev
.name
);
954 * Use the same size ROM BAR as the physical device. The contents
955 * will get filled in later when the guest tries to read it.
957 if (pread(fd
, &orig
, 4, offset
) != 4 ||
958 pwrite(fd
, &size
, 4, offset
) != 4 ||
959 pread(fd
, &size
, 4, offset
) != 4 ||
960 pwrite(fd
, &orig
, 4, offset
) != 4) {
961 error_report("%s(%s) failed: %m", __func__
, vdev
->vbasedev
.name
);
965 size
= ~(le32_to_cpu(size
) & PCI_ROM_ADDRESS_MASK
) + 1;
971 if (vfio_blacklist_opt_rom(vdev
)) {
972 if (dev
->opts
&& qemu_opt_get(dev
->opts
, "rombar")) {
973 error_printf("Warning : Device at %s is known to cause system instability issues during option rom execution. Proceeding anyway since user specified non zero value for rombar\n",
974 vdev
->vbasedev
.name
);
976 error_printf("Warning : Rom loading for device at %s has been disabled due to system instability issues. Specify rombar=1 or romfile to force\n",
977 vdev
->vbasedev
.name
);
982 trace_vfio_pci_size_rom(vdev
->vbasedev
.name
, size
);
984 name
= g_strdup_printf("vfio[%s].rom", vdev
->vbasedev
.name
);
986 memory_region_init_io(&vdev
->pdev
.rom
, OBJECT(vdev
),
987 &vfio_rom_ops
, vdev
, name
, size
);
990 pci_register_bar(&vdev
->pdev
, PCI_ROM_SLOT
,
991 PCI_BASE_ADDRESS_SPACE_MEMORY
, &vdev
->pdev
.rom
);
993 vdev
->pdev
.has_rom
= true;
994 vdev
->rom_read_failed
= false;
997 void vfio_vga_write(void *opaque
, hwaddr addr
,
998 uint64_t data
, unsigned size
)
1000 VFIOVGARegion
*region
= opaque
;
1001 VFIOVGA
*vga
= container_of(region
, VFIOVGA
, region
[region
->nr
]);
1008 off_t offset
= vga
->fd_offset
+ region
->offset
+ addr
;
1015 buf
.word
= cpu_to_le16(data
);
1018 buf
.dword
= cpu_to_le32(data
);
1021 hw_error("vfio: unsupported write size, %d bytes", size
);
1025 if (pwrite(vga
->fd
, &buf
, size
, offset
) != size
) {
1026 error_report("%s(,0x%"HWADDR_PRIx
", 0x%"PRIx64
", %d) failed: %m",
1027 __func__
, region
->offset
+ addr
, data
, size
);
1030 trace_vfio_vga_write(region
->offset
+ addr
, data
, size
);
1033 uint64_t vfio_vga_read(void *opaque
, hwaddr addr
, unsigned size
)
1035 VFIOVGARegion
*region
= opaque
;
1036 VFIOVGA
*vga
= container_of(region
, VFIOVGA
, region
[region
->nr
]);
1044 off_t offset
= vga
->fd_offset
+ region
->offset
+ addr
;
1046 if (pread(vga
->fd
, &buf
, size
, offset
) != size
) {
1047 error_report("%s(,0x%"HWADDR_PRIx
", %d) failed: %m",
1048 __func__
, region
->offset
+ addr
, size
);
1049 return (uint64_t)-1;
1057 data
= le16_to_cpu(buf
.word
);
1060 data
= le32_to_cpu(buf
.dword
);
1063 hw_error("vfio: unsupported read size, %d bytes", size
);
1067 trace_vfio_vga_read(region
->offset
+ addr
, size
, data
);
1072 static const MemoryRegionOps vfio_vga_ops
= {
1073 .read
= vfio_vga_read
,
1074 .write
= vfio_vga_write
,
1075 .endianness
= DEVICE_LITTLE_ENDIAN
,
1079 * Expand memory region of sub-page(size < PAGE_SIZE) MMIO BAR to page
1080 * size if the BAR is in an exclusive page in host so that we could map
1081 * this BAR to guest. But this sub-page BAR may not occupy an exclusive
1082 * page in guest. So we should set the priority of the expanded memory
1083 * region to zero in case of overlap with BARs which share the same page
1084 * with the sub-page BAR in guest. Besides, we should also recover the
1085 * size of this sub-page BAR when its base address is changed in guest
1086 * and not page aligned any more.
1088 static void vfio_sub_page_bar_update_mapping(PCIDevice
*pdev
, int bar
)
1090 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
1091 VFIORegion
*region
= &vdev
->bars
[bar
].region
;
1092 MemoryRegion
*mmap_mr
, *region_mr
, *base_mr
;
1095 uint64_t size
= region
->size
;
1097 /* Make sure that the whole region is allowed to be mmapped */
1098 if (region
->nr_mmaps
!= 1 || !region
->mmaps
[0].mmap
||
1099 region
->mmaps
[0].size
!= region
->size
) {
1103 r
= &pdev
->io_regions
[bar
];
1105 base_mr
= vdev
->bars
[bar
].mr
;
1106 region_mr
= region
->mem
;
1107 mmap_mr
= ®ion
->mmaps
[0].mem
;
1109 /* If BAR is mapped and page aligned, update to fill PAGE_SIZE */
1110 if (bar_addr
!= PCI_BAR_UNMAPPED
&&
1111 !(bar_addr
& ~qemu_real_host_page_mask
)) {
1112 size
= qemu_real_host_page_size
;
1115 memory_region_transaction_begin();
1117 if (vdev
->bars
[bar
].size
< size
) {
1118 memory_region_set_size(base_mr
, size
);
1120 memory_region_set_size(region_mr
, size
);
1121 memory_region_set_size(mmap_mr
, size
);
1122 if (size
!= vdev
->bars
[bar
].size
&& memory_region_is_mapped(base_mr
)) {
1123 memory_region_del_subregion(r
->address_space
, base_mr
);
1124 memory_region_add_subregion_overlap(r
->address_space
,
1125 bar_addr
, base_mr
, 0);
1128 memory_region_transaction_commit();
1134 uint32_t vfio_pci_read_config(PCIDevice
*pdev
, uint32_t addr
, int len
)
1136 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
1137 uint32_t emu_bits
= 0, emu_val
= 0, phys_val
= 0, val
;
1139 memcpy(&emu_bits
, vdev
->emulated_config_bits
+ addr
, len
);
1140 emu_bits
= le32_to_cpu(emu_bits
);
1143 emu_val
= pci_default_read_config(pdev
, addr
, len
);
1146 if (~emu_bits
& (0xffffffffU
>> (32 - len
* 8))) {
1149 ret
= pread(vdev
->vbasedev
.fd
, &phys_val
, len
,
1150 vdev
->config_offset
+ addr
);
1152 error_report("%s(%s, 0x%x, 0x%x) failed: %m",
1153 __func__
, vdev
->vbasedev
.name
, addr
, len
);
1156 phys_val
= le32_to_cpu(phys_val
);
1159 val
= (emu_val
& emu_bits
) | (phys_val
& ~emu_bits
);
1161 trace_vfio_pci_read_config(vdev
->vbasedev
.name
, addr
, len
, val
);
1166 void vfio_pci_write_config(PCIDevice
*pdev
,
1167 uint32_t addr
, uint32_t val
, int len
)
1169 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
1170 uint32_t val_le
= cpu_to_le32(val
);
1172 trace_vfio_pci_write_config(vdev
->vbasedev
.name
, addr
, val
, len
);
1174 /* Write everything to VFIO, let it filter out what we can't write */
1175 if (pwrite(vdev
->vbasedev
.fd
, &val_le
, len
, vdev
->config_offset
+ addr
)
1177 error_report("%s(%s, 0x%x, 0x%x, 0x%x) failed: %m",
1178 __func__
, vdev
->vbasedev
.name
, addr
, val
, len
);
1181 /* MSI/MSI-X Enabling/Disabling */
1182 if (pdev
->cap_present
& QEMU_PCI_CAP_MSI
&&
1183 ranges_overlap(addr
, len
, pdev
->msi_cap
, vdev
->msi_cap_size
)) {
1184 int is_enabled
, was_enabled
= msi_enabled(pdev
);
1186 pci_default_write_config(pdev
, addr
, val
, len
);
1188 is_enabled
= msi_enabled(pdev
);
1192 vfio_msi_enable(vdev
);
1196 vfio_msi_disable(vdev
);
1198 vfio_update_msi(vdev
);
1201 } else if (pdev
->cap_present
& QEMU_PCI_CAP_MSIX
&&
1202 ranges_overlap(addr
, len
, pdev
->msix_cap
, MSIX_CAP_LENGTH
)) {
1203 int is_enabled
, was_enabled
= msix_enabled(pdev
);
1205 pci_default_write_config(pdev
, addr
, val
, len
);
1207 is_enabled
= msix_enabled(pdev
);
1209 if (!was_enabled
&& is_enabled
) {
1210 vfio_msix_enable(vdev
);
1211 } else if (was_enabled
&& !is_enabled
) {
1212 vfio_msix_disable(vdev
);
1214 } else if (ranges_overlap(addr
, len
, PCI_BASE_ADDRESS_0
, 24) ||
1215 range_covers_byte(addr
, len
, PCI_COMMAND
)) {
1216 pcibus_t old_addr
[PCI_NUM_REGIONS
- 1];
1219 for (bar
= 0; bar
< PCI_ROM_SLOT
; bar
++) {
1220 old_addr
[bar
] = pdev
->io_regions
[bar
].addr
;
1223 pci_default_write_config(pdev
, addr
, val
, len
);
1225 for (bar
= 0; bar
< PCI_ROM_SLOT
; bar
++) {
1226 if (old_addr
[bar
] != pdev
->io_regions
[bar
].addr
&&
1227 vdev
->bars
[bar
].region
.size
> 0 &&
1228 vdev
->bars
[bar
].region
.size
< qemu_real_host_page_size
) {
1229 vfio_sub_page_bar_update_mapping(pdev
, bar
);
1233 /* Write everything to QEMU to keep emulated bits correct */
1234 pci_default_write_config(pdev
, addr
, val
, len
);
1241 static void vfio_disable_interrupts(VFIOPCIDevice
*vdev
)
1244 * More complicated than it looks. Disabling MSI/X transitions the
1245 * device to INTx mode (if supported). Therefore we need to first
1246 * disable MSI/X and then cleanup by disabling INTx.
1248 if (vdev
->interrupt
== VFIO_INT_MSIX
) {
1249 vfio_msix_disable(vdev
);
1250 } else if (vdev
->interrupt
== VFIO_INT_MSI
) {
1251 vfio_msi_disable(vdev
);
1254 if (vdev
->interrupt
== VFIO_INT_INTx
) {
1255 vfio_intx_disable(vdev
);
1259 static int vfio_msi_setup(VFIOPCIDevice
*vdev
, int pos
, Error
**errp
)
1262 bool msi_64bit
, msi_maskbit
;
1266 if (pread(vdev
->vbasedev
.fd
, &ctrl
, sizeof(ctrl
),
1267 vdev
->config_offset
+ pos
+ PCI_CAP_FLAGS
) != sizeof(ctrl
)) {
1268 error_setg_errno(errp
, errno
, "failed reading MSI PCI_CAP_FLAGS");
1271 ctrl
= le16_to_cpu(ctrl
);
1273 msi_64bit
= !!(ctrl
& PCI_MSI_FLAGS_64BIT
);
1274 msi_maskbit
= !!(ctrl
& PCI_MSI_FLAGS_MASKBIT
);
1275 entries
= 1 << ((ctrl
& PCI_MSI_FLAGS_QMASK
) >> 1);
1277 trace_vfio_msi_setup(vdev
->vbasedev
.name
, pos
);
1279 ret
= msi_init(&vdev
->pdev
, pos
, entries
, msi_64bit
, msi_maskbit
, &err
);
1281 if (ret
== -ENOTSUP
) {
1284 error_prepend(&err
, "msi_init failed: ");
1285 error_propagate(errp
, err
);
1288 vdev
->msi_cap_size
= 0xa + (msi_maskbit
? 0xa : 0) + (msi_64bit
? 0x4 : 0);
1293 static void vfio_pci_fixup_msix_region(VFIOPCIDevice
*vdev
)
1296 VFIORegion
*region
= &vdev
->bars
[vdev
->msix
->table_bar
].region
;
1299 * If the host driver allows mapping of a MSIX data, we are going to
1300 * do map the entire BAR and emulate MSIX table on top of that.
1302 if (vfio_has_region_cap(&vdev
->vbasedev
, region
->nr
,
1303 VFIO_REGION_INFO_CAP_MSIX_MAPPABLE
)) {
1308 * We expect to find a single mmap covering the whole BAR, anything else
1309 * means it's either unsupported or already setup.
1311 if (region
->nr_mmaps
!= 1 || region
->mmaps
[0].offset
||
1312 region
->size
!= region
->mmaps
[0].size
) {
1316 /* MSI-X table start and end aligned to host page size */
1317 start
= vdev
->msix
->table_offset
& qemu_real_host_page_mask
;
1318 end
= REAL_HOST_PAGE_ALIGN((uint64_t)vdev
->msix
->table_offset
+
1319 (vdev
->msix
->entries
* PCI_MSIX_ENTRY_SIZE
));
1322 * Does the MSI-X table cover the beginning of the BAR? The whole BAR?
1323 * NB - Host page size is necessarily a power of two and so is the PCI
1324 * BAR (not counting EA yet), therefore if we have host page aligned
1325 * @start and @end, then any remainder of the BAR before or after those
1326 * must be at least host page sized and therefore mmap'able.
1329 if (end
>= region
->size
) {
1330 region
->nr_mmaps
= 0;
1331 g_free(region
->mmaps
);
1332 region
->mmaps
= NULL
;
1333 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1334 vdev
->msix
->table_bar
, 0, 0);
1336 region
->mmaps
[0].offset
= end
;
1337 region
->mmaps
[0].size
= region
->size
- end
;
1338 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1339 vdev
->msix
->table_bar
, region
->mmaps
[0].offset
,
1340 region
->mmaps
[0].offset
+ region
->mmaps
[0].size
);
1343 /* Maybe it's aligned at the end of the BAR */
1344 } else if (end
>= region
->size
) {
1345 region
->mmaps
[0].size
= start
;
1346 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1347 vdev
->msix
->table_bar
, region
->mmaps
[0].offset
,
1348 region
->mmaps
[0].offset
+ region
->mmaps
[0].size
);
1350 /* Otherwise it must split the BAR */
1352 region
->nr_mmaps
= 2;
1353 region
->mmaps
= g_renew(VFIOMmap
, region
->mmaps
, 2);
1355 memcpy(®ion
->mmaps
[1], ®ion
->mmaps
[0], sizeof(VFIOMmap
));
1357 region
->mmaps
[0].size
= start
;
1358 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1359 vdev
->msix
->table_bar
, region
->mmaps
[0].offset
,
1360 region
->mmaps
[0].offset
+ region
->mmaps
[0].size
);
1362 region
->mmaps
[1].offset
= end
;
1363 region
->mmaps
[1].size
= region
->size
- end
;
1364 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1365 vdev
->msix
->table_bar
, region
->mmaps
[1].offset
,
1366 region
->mmaps
[1].offset
+ region
->mmaps
[1].size
);
1370 static void vfio_pci_relocate_msix(VFIOPCIDevice
*vdev
, Error
**errp
)
1372 int target_bar
= -1;
1375 if (!vdev
->msix
|| vdev
->msix_relo
== OFF_AUTOPCIBAR_OFF
) {
1379 /* The actual minimum size of MSI-X structures */
1380 msix_sz
= (vdev
->msix
->entries
* PCI_MSIX_ENTRY_SIZE
) +
1381 (QEMU_ALIGN_UP(vdev
->msix
->entries
, 64) / 8);
1382 /* Round up to host pages, we don't want to share a page */
1383 msix_sz
= REAL_HOST_PAGE_ALIGN(msix_sz
);
1384 /* PCI BARs must be a power of 2 */
1385 msix_sz
= pow2ceil(msix_sz
);
1387 if (vdev
->msix_relo
== OFF_AUTOPCIBAR_AUTO
) {
1389 * TODO: Lookup table for known devices.
1391 * Logically we might use an algorithm here to select the BAR adding
1392 * the least additional MMIO space, but we cannot programatically
1393 * predict the driver dependency on BAR ordering or sizing, therefore
1394 * 'auto' becomes a lookup for combinations reported to work.
1396 if (target_bar
< 0) {
1397 error_setg(errp
, "No automatic MSI-X relocation available for "
1398 "device %04x:%04x", vdev
->vendor_id
, vdev
->device_id
);
1402 target_bar
= (int)(vdev
->msix_relo
- OFF_AUTOPCIBAR_BAR0
);
1405 /* I/O port BARs cannot host MSI-X structures */
1406 if (vdev
->bars
[target_bar
].ioport
) {
1407 error_setg(errp
, "Invalid MSI-X relocation BAR %d, "
1408 "I/O port BAR", target_bar
);
1412 /* Cannot use a BAR in the "shadow" of a 64-bit BAR */
1413 if (!vdev
->bars
[target_bar
].size
&&
1414 target_bar
> 0 && vdev
->bars
[target_bar
- 1].mem64
) {
1415 error_setg(errp
, "Invalid MSI-X relocation BAR %d, "
1416 "consumed by 64-bit BAR %d", target_bar
, target_bar
- 1);
1420 /* 2GB max size for 32-bit BARs, cannot double if already > 1G */
1421 if (vdev
->bars
[target_bar
].size
> 1 * GiB
&&
1422 !vdev
->bars
[target_bar
].mem64
) {
1423 error_setg(errp
, "Invalid MSI-X relocation BAR %d, "
1424 "no space to extend 32-bit BAR", target_bar
);
1429 * If adding a new BAR, test if we can make it 64bit. We make it
1430 * prefetchable since QEMU MSI-X emulation has no read side effects
1431 * and doing so makes mapping more flexible.
1433 if (!vdev
->bars
[target_bar
].size
) {
1434 if (target_bar
< (PCI_ROM_SLOT
- 1) &&
1435 !vdev
->bars
[target_bar
+ 1].size
) {
1436 vdev
->bars
[target_bar
].mem64
= true;
1437 vdev
->bars
[target_bar
].type
= PCI_BASE_ADDRESS_MEM_TYPE_64
;
1439 vdev
->bars
[target_bar
].type
|= PCI_BASE_ADDRESS_MEM_PREFETCH
;
1440 vdev
->bars
[target_bar
].size
= msix_sz
;
1441 vdev
->msix
->table_offset
= 0;
1443 vdev
->bars
[target_bar
].size
= MAX(vdev
->bars
[target_bar
].size
* 2,
1446 * Due to above size calc, MSI-X always starts halfway into the BAR,
1447 * which will always be a separate host page.
1449 vdev
->msix
->table_offset
= vdev
->bars
[target_bar
].size
/ 2;
1452 vdev
->msix
->table_bar
= target_bar
;
1453 vdev
->msix
->pba_bar
= target_bar
;
1454 /* Requires 8-byte alignment, but PCI_MSIX_ENTRY_SIZE guarantees that */
1455 vdev
->msix
->pba_offset
= vdev
->msix
->table_offset
+
1456 (vdev
->msix
->entries
* PCI_MSIX_ENTRY_SIZE
);
1458 trace_vfio_msix_relo(vdev
->vbasedev
.name
,
1459 vdev
->msix
->table_bar
, vdev
->msix
->table_offset
);
1463 * We don't have any control over how pci_add_capability() inserts
1464 * capabilities into the chain. In order to setup MSI-X we need a
1465 * MemoryRegion for the BAR. In order to setup the BAR and not
1466 * attempt to mmap the MSI-X table area, which VFIO won't allow, we
1467 * need to first look for where the MSI-X table lives. So we
1468 * unfortunately split MSI-X setup across two functions.
1470 static void vfio_msix_early_setup(VFIOPCIDevice
*vdev
, Error
**errp
)
1474 uint32_t table
, pba
;
1475 int fd
= vdev
->vbasedev
.fd
;
1478 pos
= pci_find_capability(&vdev
->pdev
, PCI_CAP_ID_MSIX
);
1483 if (pread(fd
, &ctrl
, sizeof(ctrl
),
1484 vdev
->config_offset
+ pos
+ PCI_MSIX_FLAGS
) != sizeof(ctrl
)) {
1485 error_setg_errno(errp
, errno
, "failed to read PCI MSIX FLAGS");
1489 if (pread(fd
, &table
, sizeof(table
),
1490 vdev
->config_offset
+ pos
+ PCI_MSIX_TABLE
) != sizeof(table
)) {
1491 error_setg_errno(errp
, errno
, "failed to read PCI MSIX TABLE");
1495 if (pread(fd
, &pba
, sizeof(pba
),
1496 vdev
->config_offset
+ pos
+ PCI_MSIX_PBA
) != sizeof(pba
)) {
1497 error_setg_errno(errp
, errno
, "failed to read PCI MSIX PBA");
1501 ctrl
= le16_to_cpu(ctrl
);
1502 table
= le32_to_cpu(table
);
1503 pba
= le32_to_cpu(pba
);
1505 msix
= g_malloc0(sizeof(*msix
));
1506 msix
->table_bar
= table
& PCI_MSIX_FLAGS_BIRMASK
;
1507 msix
->table_offset
= table
& ~PCI_MSIX_FLAGS_BIRMASK
;
1508 msix
->pba_bar
= pba
& PCI_MSIX_FLAGS_BIRMASK
;
1509 msix
->pba_offset
= pba
& ~PCI_MSIX_FLAGS_BIRMASK
;
1510 msix
->entries
= (ctrl
& PCI_MSIX_FLAGS_QSIZE
) + 1;
1513 * Test the size of the pba_offset variable and catch if it extends outside
1514 * of the specified BAR. If it is the case, we need to apply a hardware
1515 * specific quirk if the device is known or we have a broken configuration.
1517 if (msix
->pba_offset
>= vdev
->bars
[msix
->pba_bar
].region
.size
) {
1519 * Chelsio T5 Virtual Function devices are encoded as 0x58xx for T5
1520 * adapters. The T5 hardware returns an incorrect value of 0x8000 for
1521 * the VF PBA offset while the BAR itself is only 8k. The correct value
1522 * is 0x1000, so we hard code that here.
1524 if (vdev
->vendor_id
== PCI_VENDOR_ID_CHELSIO
&&
1525 (vdev
->device_id
& 0xff00) == 0x5800) {
1526 msix
->pba_offset
= 0x1000;
1528 error_setg(errp
, "hardware reports invalid configuration, "
1529 "MSIX PBA outside of specified BAR");
1535 trace_vfio_msix_early_setup(vdev
->vbasedev
.name
, pos
, msix
->table_bar
,
1536 msix
->table_offset
, msix
->entries
);
1539 vfio_pci_fixup_msix_region(vdev
);
1541 vfio_pci_relocate_msix(vdev
, errp
);
1544 static int vfio_msix_setup(VFIOPCIDevice
*vdev
, int pos
, Error
**errp
)
1549 vdev
->msix
->pending
= g_malloc0(BITS_TO_LONGS(vdev
->msix
->entries
) *
1550 sizeof(unsigned long));
1551 ret
= msix_init(&vdev
->pdev
, vdev
->msix
->entries
,
1552 vdev
->bars
[vdev
->msix
->table_bar
].mr
,
1553 vdev
->msix
->table_bar
, vdev
->msix
->table_offset
,
1554 vdev
->bars
[vdev
->msix
->pba_bar
].mr
,
1555 vdev
->msix
->pba_bar
, vdev
->msix
->pba_offset
, pos
,
1558 if (ret
== -ENOTSUP
) {
1559 error_report_err(err
);
1563 error_propagate(errp
, err
);
1568 * The PCI spec suggests that devices provide additional alignment for
1569 * MSI-X structures and avoid overlapping non-MSI-X related registers.
1570 * For an assigned device, this hopefully means that emulation of MSI-X
1571 * structures does not affect the performance of the device. If devices
1572 * fail to provide that alignment, a significant performance penalty may
1573 * result, for instance Mellanox MT27500 VFs:
1574 * http://www.spinics.net/lists/kvm/msg125881.html
1576 * The PBA is simply not that important for such a serious regression and
1577 * most drivers do not appear to look at it. The solution for this is to
1578 * disable the PBA MemoryRegion unless it's being used. We disable it
1579 * here and only enable it if a masked vector fires through QEMU. As the
1580 * vector-use notifier is called, which occurs on unmask, we test whether
1581 * PBA emulation is needed and again disable if not.
1583 memory_region_set_enabled(&vdev
->pdev
.msix_pba_mmio
, false);
1586 * The emulated machine may provide a paravirt interface for MSIX setup
1587 * so it is not strictly necessary to emulate MSIX here. This becomes
1588 * helpful when frequently accessed MMIO registers are located in
1589 * subpages adjacent to the MSIX table but the MSIX data containing page
1590 * cannot be mapped because of a host page size bigger than the MSIX table
1593 if (object_property_get_bool(OBJECT(qdev_get_machine()),
1594 "vfio-no-msix-emulation", NULL
)) {
1595 memory_region_set_enabled(&vdev
->pdev
.msix_table_mmio
, false);
1601 static void vfio_teardown_msi(VFIOPCIDevice
*vdev
)
1603 msi_uninit(&vdev
->pdev
);
1606 msix_uninit(&vdev
->pdev
,
1607 vdev
->bars
[vdev
->msix
->table_bar
].mr
,
1608 vdev
->bars
[vdev
->msix
->pba_bar
].mr
);
1609 g_free(vdev
->msix
->pending
);
1616 static void vfio_mmap_set_enabled(VFIOPCIDevice
*vdev
, bool enabled
)
1620 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1621 vfio_region_mmaps_set_enabled(&vdev
->bars
[i
].region
, enabled
);
1625 static void vfio_bar_prepare(VFIOPCIDevice
*vdev
, int nr
)
1627 VFIOBAR
*bar
= &vdev
->bars
[nr
];
1632 /* Skip both unimplemented BARs and the upper half of 64bit BARS. */
1633 if (!bar
->region
.size
) {
1637 /* Determine what type of BAR this is for registration */
1638 ret
= pread(vdev
->vbasedev
.fd
, &pci_bar
, sizeof(pci_bar
),
1639 vdev
->config_offset
+ PCI_BASE_ADDRESS_0
+ (4 * nr
));
1640 if (ret
!= sizeof(pci_bar
)) {
1641 error_report("vfio: Failed to read BAR %d (%m)", nr
);
1645 pci_bar
= le32_to_cpu(pci_bar
);
1646 bar
->ioport
= (pci_bar
& PCI_BASE_ADDRESS_SPACE_IO
);
1647 bar
->mem64
= bar
->ioport
? 0 : (pci_bar
& PCI_BASE_ADDRESS_MEM_TYPE_64
);
1648 bar
->type
= pci_bar
& (bar
->ioport
? ~PCI_BASE_ADDRESS_IO_MASK
:
1649 ~PCI_BASE_ADDRESS_MEM_MASK
);
1650 bar
->size
= bar
->region
.size
;
1653 static void vfio_bars_prepare(VFIOPCIDevice
*vdev
)
1657 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1658 vfio_bar_prepare(vdev
, i
);
1662 static void vfio_bar_register(VFIOPCIDevice
*vdev
, int nr
)
1664 VFIOBAR
*bar
= &vdev
->bars
[nr
];
1671 bar
->mr
= g_new0(MemoryRegion
, 1);
1672 name
= g_strdup_printf("%s base BAR %d", vdev
->vbasedev
.name
, nr
);
1673 memory_region_init_io(bar
->mr
, OBJECT(vdev
), NULL
, NULL
, name
, bar
->size
);
1676 if (bar
->region
.size
) {
1677 memory_region_add_subregion(bar
->mr
, 0, bar
->region
.mem
);
1679 if (vfio_region_mmap(&bar
->region
)) {
1680 error_report("Failed to mmap %s BAR %d. Performance may be slow",
1681 vdev
->vbasedev
.name
, nr
);
1685 pci_register_bar(&vdev
->pdev
, nr
, bar
->type
, bar
->mr
);
1688 static void vfio_bars_register(VFIOPCIDevice
*vdev
)
1692 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1693 vfio_bar_register(vdev
, i
);
1697 static void vfio_bars_exit(VFIOPCIDevice
*vdev
)
1701 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1702 VFIOBAR
*bar
= &vdev
->bars
[i
];
1704 vfio_bar_quirk_exit(vdev
, i
);
1705 vfio_region_exit(&bar
->region
);
1706 if (bar
->region
.size
) {
1707 memory_region_del_subregion(bar
->mr
, bar
->region
.mem
);
1712 pci_unregister_vga(&vdev
->pdev
);
1713 vfio_vga_quirk_exit(vdev
);
1717 static void vfio_bars_finalize(VFIOPCIDevice
*vdev
)
1721 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1722 VFIOBAR
*bar
= &vdev
->bars
[i
];
1724 vfio_bar_quirk_finalize(vdev
, i
);
1725 vfio_region_finalize(&bar
->region
);
1727 object_unparent(OBJECT(bar
->mr
));
1733 vfio_vga_quirk_finalize(vdev
);
1734 for (i
= 0; i
< ARRAY_SIZE(vdev
->vga
->region
); i
++) {
1735 object_unparent(OBJECT(&vdev
->vga
->region
[i
].mem
));
1744 static uint8_t vfio_std_cap_max_size(PCIDevice
*pdev
, uint8_t pos
)
1747 uint16_t next
= PCI_CONFIG_SPACE_SIZE
;
1749 for (tmp
= pdev
->config
[PCI_CAPABILITY_LIST
]; tmp
;
1750 tmp
= pdev
->config
[tmp
+ PCI_CAP_LIST_NEXT
]) {
1751 if (tmp
> pos
&& tmp
< next
) {
1760 static uint16_t vfio_ext_cap_max_size(const uint8_t *config
, uint16_t pos
)
1762 uint16_t tmp
, next
= PCIE_CONFIG_SPACE_SIZE
;
1764 for (tmp
= PCI_CONFIG_SPACE_SIZE
; tmp
;
1765 tmp
= PCI_EXT_CAP_NEXT(pci_get_long(config
+ tmp
))) {
1766 if (tmp
> pos
&& tmp
< next
) {
1774 static void vfio_set_word_bits(uint8_t *buf
, uint16_t val
, uint16_t mask
)
1776 pci_set_word(buf
, (pci_get_word(buf
) & ~mask
) | val
);
1779 static void vfio_add_emulated_word(VFIOPCIDevice
*vdev
, int pos
,
1780 uint16_t val
, uint16_t mask
)
1782 vfio_set_word_bits(vdev
->pdev
.config
+ pos
, val
, mask
);
1783 vfio_set_word_bits(vdev
->pdev
.wmask
+ pos
, ~mask
, mask
);
1784 vfio_set_word_bits(vdev
->emulated_config_bits
+ pos
, mask
, mask
);
1787 static void vfio_set_long_bits(uint8_t *buf
, uint32_t val
, uint32_t mask
)
1789 pci_set_long(buf
, (pci_get_long(buf
) & ~mask
) | val
);
1792 static void vfio_add_emulated_long(VFIOPCIDevice
*vdev
, int pos
,
1793 uint32_t val
, uint32_t mask
)
1795 vfio_set_long_bits(vdev
->pdev
.config
+ pos
, val
, mask
);
1796 vfio_set_long_bits(vdev
->pdev
.wmask
+ pos
, ~mask
, mask
);
1797 vfio_set_long_bits(vdev
->emulated_config_bits
+ pos
, mask
, mask
);
1800 static int vfio_setup_pcie_cap(VFIOPCIDevice
*vdev
, int pos
, uint8_t size
,
1806 flags
= pci_get_word(vdev
->pdev
.config
+ pos
+ PCI_CAP_FLAGS
);
1807 type
= (flags
& PCI_EXP_FLAGS_TYPE
) >> 4;
1809 if (type
!= PCI_EXP_TYPE_ENDPOINT
&&
1810 type
!= PCI_EXP_TYPE_LEG_END
&&
1811 type
!= PCI_EXP_TYPE_RC_END
) {
1813 error_setg(errp
, "assignment of PCIe type 0x%x "
1814 "devices is not currently supported", type
);
1818 if (!pci_bus_is_express(pci_get_bus(&vdev
->pdev
))) {
1819 PCIBus
*bus
= pci_get_bus(&vdev
->pdev
);
1823 * Traditionally PCI device assignment exposes the PCIe capability
1824 * as-is on non-express buses. The reason being that some drivers
1825 * simply assume that it's there, for example tg3. However when
1826 * we're running on a native PCIe machine type, like Q35, we need
1827 * to hide the PCIe capability. The reason for this is twofold;
1828 * first Windows guests get a Code 10 error when the PCIe capability
1829 * is exposed in this configuration. Therefore express devices won't
1830 * work at all unless they're attached to express buses in the VM.
1831 * Second, a native PCIe machine introduces the possibility of fine
1832 * granularity IOMMUs supporting both translation and isolation.
1833 * Guest code to discover the IOMMU visibility of a device, such as
1834 * IOMMU grouping code on Linux, is very aware of device types and
1835 * valid transitions between bus types. An express device on a non-
1836 * express bus is not a valid combination on bare metal systems.
1838 * Drivers that require a PCIe capability to make the device
1839 * functional are simply going to need to have their devices placed
1840 * on a PCIe bus in the VM.
1842 while (!pci_bus_is_root(bus
)) {
1843 bridge
= pci_bridge_get_device(bus
);
1844 bus
= pci_get_bus(bridge
);
1847 if (pci_bus_is_express(bus
)) {
1851 } else if (pci_bus_is_root(pci_get_bus(&vdev
->pdev
))) {
1853 * On a Root Complex bus Endpoints become Root Complex Integrated
1854 * Endpoints, which changes the type and clears the LNK & LNK2 fields.
1856 if (type
== PCI_EXP_TYPE_ENDPOINT
) {
1857 vfio_add_emulated_word(vdev
, pos
+ PCI_CAP_FLAGS
,
1858 PCI_EXP_TYPE_RC_END
<< 4,
1859 PCI_EXP_FLAGS_TYPE
);
1861 /* Link Capabilities, Status, and Control goes away */
1862 if (size
> PCI_EXP_LNKCTL
) {
1863 vfio_add_emulated_long(vdev
, pos
+ PCI_EXP_LNKCAP
, 0, ~0);
1864 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKCTL
, 0, ~0);
1865 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKSTA
, 0, ~0);
1867 #ifndef PCI_EXP_LNKCAP2
1868 #define PCI_EXP_LNKCAP2 44
1870 #ifndef PCI_EXP_LNKSTA2
1871 #define PCI_EXP_LNKSTA2 50
1873 /* Link 2 Capabilities, Status, and Control goes away */
1874 if (size
> PCI_EXP_LNKCAP2
) {
1875 vfio_add_emulated_long(vdev
, pos
+ PCI_EXP_LNKCAP2
, 0, ~0);
1876 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKCTL2
, 0, ~0);
1877 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKSTA2
, 0, ~0);
1881 } else if (type
== PCI_EXP_TYPE_LEG_END
) {
1883 * Legacy endpoints don't belong on the root complex. Windows
1884 * seems to be happier with devices if we skip the capability.
1891 * Convert Root Complex Integrated Endpoints to regular endpoints.
1892 * These devices don't support LNK/LNK2 capabilities, so make them up.
1894 if (type
== PCI_EXP_TYPE_RC_END
) {
1895 vfio_add_emulated_word(vdev
, pos
+ PCI_CAP_FLAGS
,
1896 PCI_EXP_TYPE_ENDPOINT
<< 4,
1897 PCI_EXP_FLAGS_TYPE
);
1898 vfio_add_emulated_long(vdev
, pos
+ PCI_EXP_LNKCAP
,
1899 PCI_EXP_LNK_MLW_1
| PCI_EXP_LNK_LS_25
, ~0);
1900 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKCTL
, 0, ~0);
1903 /* Mark the Link Status bits as emulated to allow virtual negotiation */
1904 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKSTA
,
1905 pci_get_word(vdev
->pdev
.config
+ pos
+
1907 PCI_EXP_LNKCAP_MLW
| PCI_EXP_LNKCAP_SLS
);
1911 * Intel 82599 SR-IOV VFs report an invalid PCIe capability version 0
1912 * (Niantic errate #35) causing Windows to error with a Code 10 for the
1913 * device on Q35. Fixup any such devices to report version 1. If we
1914 * were to remove the capability entirely the guest would lose extended
1917 if ((flags
& PCI_EXP_FLAGS_VERS
) == 0) {
1918 vfio_add_emulated_word(vdev
, pos
+ PCI_CAP_FLAGS
,
1919 1, PCI_EXP_FLAGS_VERS
);
1922 pos
= pci_add_capability(&vdev
->pdev
, PCI_CAP_ID_EXP
, pos
, size
,
1928 vdev
->pdev
.exp
.exp_cap
= pos
;
1933 static void vfio_check_pcie_flr(VFIOPCIDevice
*vdev
, uint8_t pos
)
1935 uint32_t cap
= pci_get_long(vdev
->pdev
.config
+ pos
+ PCI_EXP_DEVCAP
);
1937 if (cap
& PCI_EXP_DEVCAP_FLR
) {
1938 trace_vfio_check_pcie_flr(vdev
->vbasedev
.name
);
1939 vdev
->has_flr
= true;
1943 static void vfio_check_pm_reset(VFIOPCIDevice
*vdev
, uint8_t pos
)
1945 uint16_t csr
= pci_get_word(vdev
->pdev
.config
+ pos
+ PCI_PM_CTRL
);
1947 if (!(csr
& PCI_PM_CTRL_NO_SOFT_RESET
)) {
1948 trace_vfio_check_pm_reset(vdev
->vbasedev
.name
);
1949 vdev
->has_pm_reset
= true;
1953 static void vfio_check_af_flr(VFIOPCIDevice
*vdev
, uint8_t pos
)
1955 uint8_t cap
= pci_get_byte(vdev
->pdev
.config
+ pos
+ PCI_AF_CAP
);
1957 if ((cap
& PCI_AF_CAP_TP
) && (cap
& PCI_AF_CAP_FLR
)) {
1958 trace_vfio_check_af_flr(vdev
->vbasedev
.name
);
1959 vdev
->has_flr
= true;
1963 static int vfio_add_std_cap(VFIOPCIDevice
*vdev
, uint8_t pos
, Error
**errp
)
1965 PCIDevice
*pdev
= &vdev
->pdev
;
1966 uint8_t cap_id
, next
, size
;
1969 cap_id
= pdev
->config
[pos
];
1970 next
= pdev
->config
[pos
+ PCI_CAP_LIST_NEXT
];
1973 * If it becomes important to configure capabilities to their actual
1974 * size, use this as the default when it's something we don't recognize.
1975 * Since QEMU doesn't actually handle many of the config accesses,
1976 * exact size doesn't seem worthwhile.
1978 size
= vfio_std_cap_max_size(pdev
, pos
);
1981 * pci_add_capability always inserts the new capability at the head
1982 * of the chain. Therefore to end up with a chain that matches the
1983 * physical device, we insert from the end by making this recursive.
1984 * This is also why we pre-calculate size above as cached config space
1985 * will be changed as we unwind the stack.
1988 ret
= vfio_add_std_cap(vdev
, next
, errp
);
1993 /* Begin the rebuild, use QEMU emulated list bits */
1994 pdev
->config
[PCI_CAPABILITY_LIST
] = 0;
1995 vdev
->emulated_config_bits
[PCI_CAPABILITY_LIST
] = 0xff;
1996 vdev
->emulated_config_bits
[PCI_STATUS
] |= PCI_STATUS_CAP_LIST
;
1998 ret
= vfio_add_virt_caps(vdev
, errp
);
2004 /* Scale down size, esp in case virt caps were added above */
2005 size
= MIN(size
, vfio_std_cap_max_size(pdev
, pos
));
2007 /* Use emulated next pointer to allow dropping caps */
2008 pci_set_byte(vdev
->emulated_config_bits
+ pos
+ PCI_CAP_LIST_NEXT
, 0xff);
2011 case PCI_CAP_ID_MSI
:
2012 ret
= vfio_msi_setup(vdev
, pos
, errp
);
2014 case PCI_CAP_ID_EXP
:
2015 vfio_check_pcie_flr(vdev
, pos
);
2016 ret
= vfio_setup_pcie_cap(vdev
, pos
, size
, errp
);
2018 case PCI_CAP_ID_MSIX
:
2019 ret
= vfio_msix_setup(vdev
, pos
, errp
);
2022 vfio_check_pm_reset(vdev
, pos
);
2024 ret
= pci_add_capability(pdev
, cap_id
, pos
, size
, errp
);
2027 vfio_check_af_flr(vdev
, pos
);
2028 ret
= pci_add_capability(pdev
, cap_id
, pos
, size
, errp
);
2031 ret
= pci_add_capability(pdev
, cap_id
, pos
, size
, errp
);
2037 "failed to add PCI capability 0x%x[0x%x]@0x%x: ",
2045 static void vfio_add_ext_cap(VFIOPCIDevice
*vdev
)
2047 PCIDevice
*pdev
= &vdev
->pdev
;
2049 uint16_t cap_id
, next
, size
;
2053 /* Only add extended caps if we have them and the guest can see them */
2054 if (!pci_is_express(pdev
) || !pci_bus_is_express(pci_get_bus(pdev
)) ||
2055 !pci_get_long(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
)) {
2060 * pcie_add_capability always inserts the new capability at the tail
2061 * of the chain. Therefore to end up with a chain that matches the
2062 * physical device, we cache the config space to avoid overwriting
2063 * the original config space when we parse the extended capabilities.
2065 config
= g_memdup(pdev
->config
, vdev
->config_size
);
2068 * Extended capabilities are chained with each pointing to the next, so we
2069 * can drop anything other than the head of the chain simply by modifying
2070 * the previous next pointer. Seed the head of the chain here such that
2071 * we can simply skip any capabilities we want to drop below, regardless
2072 * of their position in the chain. If this stub capability still exists
2073 * after we add the capabilities we want to expose, update the capability
2074 * ID to zero. Note that we cannot seed with the capability header being
2075 * zero as this conflicts with definition of an absent capability chain
2076 * and prevents capabilities beyond the head of the list from being added.
2077 * By replacing the dummy capability ID with zero after walking the device
2078 * chain, we also transparently mark extended capabilities as absent if
2079 * no capabilities were added. Note that the PCIe spec defines an absence
2080 * of extended capabilities to be determined by a value of zero for the
2081 * capability ID, version, AND next pointer. A non-zero next pointer
2082 * should be sufficient to indicate additional capabilities are present,
2083 * which will occur if we call pcie_add_capability() below. The entire
2084 * first dword is emulated to support this.
2086 * NB. The kernel side does similar masking, so be prepared that our
2087 * view of the device may also contain a capability ID zero in the head
2088 * of the chain. Skip it for the same reason that we cannot seed the
2089 * chain with a zero capability.
2091 pci_set_long(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
,
2092 PCI_EXT_CAP(0xFFFF, 0, 0));
2093 pci_set_long(pdev
->wmask
+ PCI_CONFIG_SPACE_SIZE
, 0);
2094 pci_set_long(vdev
->emulated_config_bits
+ PCI_CONFIG_SPACE_SIZE
, ~0);
2096 for (next
= PCI_CONFIG_SPACE_SIZE
; next
;
2097 next
= PCI_EXT_CAP_NEXT(pci_get_long(config
+ next
))) {
2098 header
= pci_get_long(config
+ next
);
2099 cap_id
= PCI_EXT_CAP_ID(header
);
2100 cap_ver
= PCI_EXT_CAP_VER(header
);
2103 * If it becomes important to configure extended capabilities to their
2104 * actual size, use this as the default when it's something we don't
2105 * recognize. Since QEMU doesn't actually handle many of the config
2106 * accesses, exact size doesn't seem worthwhile.
2108 size
= vfio_ext_cap_max_size(config
, next
);
2110 /* Use emulated next pointer to allow dropping extended caps */
2111 pci_long_test_and_set_mask(vdev
->emulated_config_bits
+ next
,
2112 PCI_EXT_CAP_NEXT_MASK
);
2115 case 0: /* kernel masked capability */
2116 case PCI_EXT_CAP_ID_SRIOV
: /* Read-only VF BARs confuse OVMF */
2117 case PCI_EXT_CAP_ID_ARI
: /* XXX Needs next function virtualization */
2118 trace_vfio_add_ext_cap_dropped(vdev
->vbasedev
.name
, cap_id
, next
);
2121 pcie_add_capability(pdev
, cap_id
, cap_ver
, next
, size
);
2126 /* Cleanup chain head ID if necessary */
2127 if (pci_get_word(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
) == 0xFFFF) {
2128 pci_set_word(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
, 0);
2135 static int vfio_add_capabilities(VFIOPCIDevice
*vdev
, Error
**errp
)
2137 PCIDevice
*pdev
= &vdev
->pdev
;
2140 if (!(pdev
->config
[PCI_STATUS
] & PCI_STATUS_CAP_LIST
) ||
2141 !pdev
->config
[PCI_CAPABILITY_LIST
]) {
2142 return 0; /* Nothing to add */
2145 ret
= vfio_add_std_cap(vdev
, pdev
->config
[PCI_CAPABILITY_LIST
], errp
);
2150 vfio_add_ext_cap(vdev
);
2154 static void vfio_pci_pre_reset(VFIOPCIDevice
*vdev
)
2156 PCIDevice
*pdev
= &vdev
->pdev
;
2159 vfio_disable_interrupts(vdev
);
2161 /* Make sure the device is in D0 */
2166 pmcsr
= vfio_pci_read_config(pdev
, vdev
->pm_cap
+ PCI_PM_CTRL
, 2);
2167 state
= pmcsr
& PCI_PM_CTRL_STATE_MASK
;
2169 pmcsr
&= ~PCI_PM_CTRL_STATE_MASK
;
2170 vfio_pci_write_config(pdev
, vdev
->pm_cap
+ PCI_PM_CTRL
, pmcsr
, 2);
2171 /* vfio handles the necessary delay here */
2172 pmcsr
= vfio_pci_read_config(pdev
, vdev
->pm_cap
+ PCI_PM_CTRL
, 2);
2173 state
= pmcsr
& PCI_PM_CTRL_STATE_MASK
;
2175 error_report("vfio: Unable to power on device, stuck in D%d",
2182 * Stop any ongoing DMA by disconecting I/O, MMIO, and bus master.
2183 * Also put INTx Disable in known state.
2185 cmd
= vfio_pci_read_config(pdev
, PCI_COMMAND
, 2);
2186 cmd
&= ~(PCI_COMMAND_IO
| PCI_COMMAND_MEMORY
| PCI_COMMAND_MASTER
|
2187 PCI_COMMAND_INTX_DISABLE
);
2188 vfio_pci_write_config(pdev
, PCI_COMMAND
, cmd
, 2);
2191 static void vfio_pci_post_reset(VFIOPCIDevice
*vdev
)
2196 vfio_intx_enable(vdev
, &err
);
2198 error_reportf_err(err
, ERR_PREFIX
, vdev
->vbasedev
.name
);
2201 for (nr
= 0; nr
< PCI_NUM_REGIONS
- 1; ++nr
) {
2202 off_t addr
= vdev
->config_offset
+ PCI_BASE_ADDRESS_0
+ (4 * nr
);
2204 uint32_t len
= sizeof(val
);
2206 if (pwrite(vdev
->vbasedev
.fd
, &val
, len
, addr
) != len
) {
2207 error_report("%s(%s) reset bar %d failed: %m", __func__
,
2208 vdev
->vbasedev
.name
, nr
);
2212 vfio_quirk_reset(vdev
);
2215 static bool vfio_pci_host_match(PCIHostDeviceAddress
*addr
, const char *name
)
2219 sprintf(tmp
, "%04x:%02x:%02x.%1x", addr
->domain
,
2220 addr
->bus
, addr
->slot
, addr
->function
);
2222 return (strcmp(tmp
, name
) == 0);
2225 static int vfio_pci_hot_reset(VFIOPCIDevice
*vdev
, bool single
)
2228 struct vfio_pci_hot_reset_info
*info
;
2229 struct vfio_pci_dependent_device
*devices
;
2230 struct vfio_pci_hot_reset
*reset
;
2235 trace_vfio_pci_hot_reset(vdev
->vbasedev
.name
, single
? "one" : "multi");
2238 vfio_pci_pre_reset(vdev
);
2240 vdev
->vbasedev
.needs_reset
= false;
2242 info
= g_malloc0(sizeof(*info
));
2243 info
->argsz
= sizeof(*info
);
2245 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_GET_PCI_HOT_RESET_INFO
, info
);
2246 if (ret
&& errno
!= ENOSPC
) {
2248 if (!vdev
->has_pm_reset
) {
2249 error_report("vfio: Cannot reset device %s, "
2250 "no available reset mechanism.", vdev
->vbasedev
.name
);
2255 count
= info
->count
;
2256 info
= g_realloc(info
, sizeof(*info
) + (count
* sizeof(*devices
)));
2257 info
->argsz
= sizeof(*info
) + (count
* sizeof(*devices
));
2258 devices
= &info
->devices
[0];
2260 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_GET_PCI_HOT_RESET_INFO
, info
);
2263 error_report("vfio: hot reset info failed: %m");
2267 trace_vfio_pci_hot_reset_has_dep_devices(vdev
->vbasedev
.name
);
2269 /* Verify that we have all the groups required */
2270 for (i
= 0; i
< info
->count
; i
++) {
2271 PCIHostDeviceAddress host
;
2273 VFIODevice
*vbasedev_iter
;
2275 host
.domain
= devices
[i
].segment
;
2276 host
.bus
= devices
[i
].bus
;
2277 host
.slot
= PCI_SLOT(devices
[i
].devfn
);
2278 host
.function
= PCI_FUNC(devices
[i
].devfn
);
2280 trace_vfio_pci_hot_reset_dep_devices(host
.domain
,
2281 host
.bus
, host
.slot
, host
.function
, devices
[i
].group_id
);
2283 if (vfio_pci_host_match(&host
, vdev
->vbasedev
.name
)) {
2287 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2288 if (group
->groupid
== devices
[i
].group_id
) {
2294 if (!vdev
->has_pm_reset
) {
2295 error_report("vfio: Cannot reset device %s, "
2296 "depends on group %d which is not owned.",
2297 vdev
->vbasedev
.name
, devices
[i
].group_id
);
2303 /* Prep dependent devices for reset and clear our marker. */
2304 QLIST_FOREACH(vbasedev_iter
, &group
->device_list
, next
) {
2305 if (!vbasedev_iter
->dev
->realized
||
2306 vbasedev_iter
->type
!= VFIO_DEVICE_TYPE_PCI
) {
2309 tmp
= container_of(vbasedev_iter
, VFIOPCIDevice
, vbasedev
);
2310 if (vfio_pci_host_match(&host
, tmp
->vbasedev
.name
)) {
2315 vfio_pci_pre_reset(tmp
);
2316 tmp
->vbasedev
.needs_reset
= false;
2323 if (!single
&& !multi
) {
2328 /* Determine how many group fds need to be passed */
2330 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2331 for (i
= 0; i
< info
->count
; i
++) {
2332 if (group
->groupid
== devices
[i
].group_id
) {
2339 reset
= g_malloc0(sizeof(*reset
) + (count
* sizeof(*fds
)));
2340 reset
->argsz
= sizeof(*reset
) + (count
* sizeof(*fds
));
2341 fds
= &reset
->group_fds
[0];
2343 /* Fill in group fds */
2344 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2345 for (i
= 0; i
< info
->count
; i
++) {
2346 if (group
->groupid
== devices
[i
].group_id
) {
2347 fds
[reset
->count
++] = group
->fd
;
2354 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_PCI_HOT_RESET
, reset
);
2357 trace_vfio_pci_hot_reset_result(vdev
->vbasedev
.name
,
2358 ret
? "%m" : "Success");
2361 /* Re-enable INTx on affected devices */
2362 for (i
= 0; i
< info
->count
; i
++) {
2363 PCIHostDeviceAddress host
;
2365 VFIODevice
*vbasedev_iter
;
2367 host
.domain
= devices
[i
].segment
;
2368 host
.bus
= devices
[i
].bus
;
2369 host
.slot
= PCI_SLOT(devices
[i
].devfn
);
2370 host
.function
= PCI_FUNC(devices
[i
].devfn
);
2372 if (vfio_pci_host_match(&host
, vdev
->vbasedev
.name
)) {
2376 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2377 if (group
->groupid
== devices
[i
].group_id
) {
2386 QLIST_FOREACH(vbasedev_iter
, &group
->device_list
, next
) {
2387 if (!vbasedev_iter
->dev
->realized
||
2388 vbasedev_iter
->type
!= VFIO_DEVICE_TYPE_PCI
) {
2391 tmp
= container_of(vbasedev_iter
, VFIOPCIDevice
, vbasedev
);
2392 if (vfio_pci_host_match(&host
, tmp
->vbasedev
.name
)) {
2393 vfio_pci_post_reset(tmp
);
2400 vfio_pci_post_reset(vdev
);
2408 * We want to differentiate hot reset of mulitple in-use devices vs hot reset
2409 * of a single in-use device. VFIO_DEVICE_RESET will already handle the case
2410 * of doing hot resets when there is only a single device per bus. The in-use
2411 * here refers to how many VFIODevices are affected. A hot reset that affects
2412 * multiple devices, but only a single in-use device, means that we can call
2413 * it from our bus ->reset() callback since the extent is effectively a single
2414 * device. This allows us to make use of it in the hotplug path. When there
2415 * are multiple in-use devices, we can only trigger the hot reset during a
2416 * system reset and thus from our reset handler. We separate _one vs _multi
2417 * here so that we don't overlap and do a double reset on the system reset
2418 * path where both our reset handler and ->reset() callback are used. Calling
2419 * _one() will only do a hot reset for the one in-use devices case, calling
2420 * _multi() will do nothing if a _one() would have been sufficient.
2422 static int vfio_pci_hot_reset_one(VFIOPCIDevice
*vdev
)
2424 return vfio_pci_hot_reset(vdev
, true);
2427 static int vfio_pci_hot_reset_multi(VFIODevice
*vbasedev
)
2429 VFIOPCIDevice
*vdev
= container_of(vbasedev
, VFIOPCIDevice
, vbasedev
);
2430 return vfio_pci_hot_reset(vdev
, false);
2433 static void vfio_pci_compute_needs_reset(VFIODevice
*vbasedev
)
2435 VFIOPCIDevice
*vdev
= container_of(vbasedev
, VFIOPCIDevice
, vbasedev
);
2436 if (!vbasedev
->reset_works
|| (!vdev
->has_flr
&& vdev
->has_pm_reset
)) {
2437 vbasedev
->needs_reset
= true;
2441 static VFIODeviceOps vfio_pci_ops
= {
2442 .vfio_compute_needs_reset
= vfio_pci_compute_needs_reset
,
2443 .vfio_hot_reset_multi
= vfio_pci_hot_reset_multi
,
2444 .vfio_eoi
= vfio_intx_eoi
,
2447 int vfio_populate_vga(VFIOPCIDevice
*vdev
, Error
**errp
)
2449 VFIODevice
*vbasedev
= &vdev
->vbasedev
;
2450 struct vfio_region_info
*reg_info
;
2453 ret
= vfio_get_region_info(vbasedev
, VFIO_PCI_VGA_REGION_INDEX
, ®_info
);
2455 error_setg_errno(errp
, -ret
,
2456 "failed getting region info for VGA region index %d",
2457 VFIO_PCI_VGA_REGION_INDEX
);
2461 if (!(reg_info
->flags
& VFIO_REGION_INFO_FLAG_READ
) ||
2462 !(reg_info
->flags
& VFIO_REGION_INFO_FLAG_WRITE
) ||
2463 reg_info
->size
< 0xbffff + 1) {
2464 error_setg(errp
, "unexpected VGA info, flags 0x%lx, size 0x%lx",
2465 (unsigned long)reg_info
->flags
,
2466 (unsigned long)reg_info
->size
);
2471 vdev
->vga
= g_new0(VFIOVGA
, 1);
2473 vdev
->vga
->fd_offset
= reg_info
->offset
;
2474 vdev
->vga
->fd
= vdev
->vbasedev
.fd
;
2478 vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].offset
= QEMU_PCI_VGA_MEM_BASE
;
2479 vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].nr
= QEMU_PCI_VGA_MEM
;
2480 QLIST_INIT(&vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].quirks
);
2482 memory_region_init_io(&vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].mem
,
2483 OBJECT(vdev
), &vfio_vga_ops
,
2484 &vdev
->vga
->region
[QEMU_PCI_VGA_MEM
],
2485 "vfio-vga-mmio@0xa0000",
2486 QEMU_PCI_VGA_MEM_SIZE
);
2488 vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].offset
= QEMU_PCI_VGA_IO_LO_BASE
;
2489 vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].nr
= QEMU_PCI_VGA_IO_LO
;
2490 QLIST_INIT(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].quirks
);
2492 memory_region_init_io(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].mem
,
2493 OBJECT(vdev
), &vfio_vga_ops
,
2494 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
],
2495 "vfio-vga-io@0x3b0",
2496 QEMU_PCI_VGA_IO_LO_SIZE
);
2498 vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].offset
= QEMU_PCI_VGA_IO_HI_BASE
;
2499 vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].nr
= QEMU_PCI_VGA_IO_HI
;
2500 QLIST_INIT(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].quirks
);
2502 memory_region_init_io(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].mem
,
2503 OBJECT(vdev
), &vfio_vga_ops
,
2504 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
],
2505 "vfio-vga-io@0x3c0",
2506 QEMU_PCI_VGA_IO_HI_SIZE
);
2508 pci_register_vga(&vdev
->pdev
, &vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].mem
,
2509 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].mem
,
2510 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].mem
);
2515 static void vfio_populate_device(VFIOPCIDevice
*vdev
, Error
**errp
)
2517 VFIODevice
*vbasedev
= &vdev
->vbasedev
;
2518 struct vfio_region_info
*reg_info
;
2519 struct vfio_irq_info irq_info
= { .argsz
= sizeof(irq_info
) };
2522 /* Sanity check device */
2523 if (!(vbasedev
->flags
& VFIO_DEVICE_FLAGS_PCI
)) {
2524 error_setg(errp
, "this isn't a PCI device");
2528 if (vbasedev
->num_regions
< VFIO_PCI_CONFIG_REGION_INDEX
+ 1) {
2529 error_setg(errp
, "unexpected number of io regions %u",
2530 vbasedev
->num_regions
);
2534 if (vbasedev
->num_irqs
< VFIO_PCI_MSIX_IRQ_INDEX
+ 1) {
2535 error_setg(errp
, "unexpected number of irqs %u", vbasedev
->num_irqs
);
2539 for (i
= VFIO_PCI_BAR0_REGION_INDEX
; i
< VFIO_PCI_ROM_REGION_INDEX
; i
++) {
2540 char *name
= g_strdup_printf("%s BAR %d", vbasedev
->name
, i
);
2542 ret
= vfio_region_setup(OBJECT(vdev
), vbasedev
,
2543 &vdev
->bars
[i
].region
, i
, name
);
2547 error_setg_errno(errp
, -ret
, "failed to get region %d info", i
);
2551 QLIST_INIT(&vdev
->bars
[i
].quirks
);
2554 ret
= vfio_get_region_info(vbasedev
,
2555 VFIO_PCI_CONFIG_REGION_INDEX
, ®_info
);
2557 error_setg_errno(errp
, -ret
, "failed to get config info");
2561 trace_vfio_populate_device_config(vdev
->vbasedev
.name
,
2562 (unsigned long)reg_info
->size
,
2563 (unsigned long)reg_info
->offset
,
2564 (unsigned long)reg_info
->flags
);
2566 vdev
->config_size
= reg_info
->size
;
2567 if (vdev
->config_size
== PCI_CONFIG_SPACE_SIZE
) {
2568 vdev
->pdev
.cap_present
&= ~QEMU_PCI_CAP_EXPRESS
;
2570 vdev
->config_offset
= reg_info
->offset
;
2574 if (vdev
->features
& VFIO_FEATURE_ENABLE_VGA
) {
2575 ret
= vfio_populate_vga(vdev
, errp
);
2577 error_append_hint(errp
, "device does not support "
2578 "requested feature x-vga\n");
2583 irq_info
.index
= VFIO_PCI_ERR_IRQ_INDEX
;
2585 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_GET_IRQ_INFO
, &irq_info
);
2587 /* This can fail for an old kernel or legacy PCI dev */
2588 trace_vfio_populate_device_get_irq_info_failure();
2589 } else if (irq_info
.count
== 1) {
2590 vdev
->pci_aer
= true;
2592 error_report(WARN_PREFIX
2593 "Could not enable error recovery for the device",
2598 static void vfio_put_device(VFIOPCIDevice
*vdev
)
2600 g_free(vdev
->vbasedev
.name
);
2603 vfio_put_base_device(&vdev
->vbasedev
);
2606 static void vfio_err_notifier_handler(void *opaque
)
2608 VFIOPCIDevice
*vdev
= opaque
;
2610 if (!event_notifier_test_and_clear(&vdev
->err_notifier
)) {
2615 * TBD. Retrieve the error details and decide what action
2616 * needs to be taken. One of the actions could be to pass
2617 * the error to the guest and have the guest driver recover
2618 * from the error. This requires that PCIe capabilities be
2619 * exposed to the guest. For now, we just terminate the
2620 * guest to contain the error.
2623 error_report("%s(%s) Unrecoverable error detected. Please collect any data possible and then kill the guest", __func__
, vdev
->vbasedev
.name
);
2625 vm_stop(RUN_STATE_INTERNAL_ERROR
);
2629 * Registers error notifier for devices supporting error recovery.
2630 * If we encounter a failure in this function, we report an error
2631 * and continue after disabling error recovery support for the
2634 static void vfio_register_err_notifier(VFIOPCIDevice
*vdev
)
2638 struct vfio_irq_set
*irq_set
;
2641 if (!vdev
->pci_aer
) {
2645 if (event_notifier_init(&vdev
->err_notifier
, 0)) {
2646 error_report("vfio: Unable to init event notifier for error detection");
2647 vdev
->pci_aer
= false;
2651 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
2653 irq_set
= g_malloc0(argsz
);
2654 irq_set
->argsz
= argsz
;
2655 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
2656 VFIO_IRQ_SET_ACTION_TRIGGER
;
2657 irq_set
->index
= VFIO_PCI_ERR_IRQ_INDEX
;
2660 pfd
= (int32_t *)&irq_set
->data
;
2662 *pfd
= event_notifier_get_fd(&vdev
->err_notifier
);
2663 qemu_set_fd_handler(*pfd
, vfio_err_notifier_handler
, NULL
, vdev
);
2665 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
2667 error_report("vfio: Failed to set up error notification");
2668 qemu_set_fd_handler(*pfd
, NULL
, NULL
, vdev
);
2669 event_notifier_cleanup(&vdev
->err_notifier
);
2670 vdev
->pci_aer
= false;
2675 static void vfio_unregister_err_notifier(VFIOPCIDevice
*vdev
)
2678 struct vfio_irq_set
*irq_set
;
2682 if (!vdev
->pci_aer
) {
2686 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
2688 irq_set
= g_malloc0(argsz
);
2689 irq_set
->argsz
= argsz
;
2690 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
2691 VFIO_IRQ_SET_ACTION_TRIGGER
;
2692 irq_set
->index
= VFIO_PCI_ERR_IRQ_INDEX
;
2695 pfd
= (int32_t *)&irq_set
->data
;
2698 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
2700 error_report("vfio: Failed to de-assign error fd: %m");
2703 qemu_set_fd_handler(event_notifier_get_fd(&vdev
->err_notifier
),
2705 event_notifier_cleanup(&vdev
->err_notifier
);
2708 static void vfio_req_notifier_handler(void *opaque
)
2710 VFIOPCIDevice
*vdev
= opaque
;
2713 if (!event_notifier_test_and_clear(&vdev
->req_notifier
)) {
2717 qdev_unplug(&vdev
->pdev
.qdev
, &err
);
2719 error_reportf_err(err
, WARN_PREFIX
, vdev
->vbasedev
.name
);
2723 static void vfio_register_req_notifier(VFIOPCIDevice
*vdev
)
2725 struct vfio_irq_info irq_info
= { .argsz
= sizeof(irq_info
),
2726 .index
= VFIO_PCI_REQ_IRQ_INDEX
};
2728 struct vfio_irq_set
*irq_set
;
2731 if (!(vdev
->features
& VFIO_FEATURE_ENABLE_REQ
)) {
2735 if (ioctl(vdev
->vbasedev
.fd
,
2736 VFIO_DEVICE_GET_IRQ_INFO
, &irq_info
) < 0 || irq_info
.count
< 1) {
2740 if (event_notifier_init(&vdev
->req_notifier
, 0)) {
2741 error_report("vfio: Unable to init event notifier for device request");
2745 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
2747 irq_set
= g_malloc0(argsz
);
2748 irq_set
->argsz
= argsz
;
2749 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
2750 VFIO_IRQ_SET_ACTION_TRIGGER
;
2751 irq_set
->index
= VFIO_PCI_REQ_IRQ_INDEX
;
2754 pfd
= (int32_t *)&irq_set
->data
;
2756 *pfd
= event_notifier_get_fd(&vdev
->req_notifier
);
2757 qemu_set_fd_handler(*pfd
, vfio_req_notifier_handler
, NULL
, vdev
);
2759 if (ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
)) {
2760 error_report("vfio: Failed to set up device request notification");
2761 qemu_set_fd_handler(*pfd
, NULL
, NULL
, vdev
);
2762 event_notifier_cleanup(&vdev
->req_notifier
);
2764 vdev
->req_enabled
= true;
2770 static void vfio_unregister_req_notifier(VFIOPCIDevice
*vdev
)
2773 struct vfio_irq_set
*irq_set
;
2776 if (!vdev
->req_enabled
) {
2780 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
2782 irq_set
= g_malloc0(argsz
);
2783 irq_set
->argsz
= argsz
;
2784 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
2785 VFIO_IRQ_SET_ACTION_TRIGGER
;
2786 irq_set
->index
= VFIO_PCI_REQ_IRQ_INDEX
;
2789 pfd
= (int32_t *)&irq_set
->data
;
2792 if (ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
)) {
2793 error_report("vfio: Failed to de-assign device request fd: %m");
2796 qemu_set_fd_handler(event_notifier_get_fd(&vdev
->req_notifier
),
2798 event_notifier_cleanup(&vdev
->req_notifier
);
2800 vdev
->req_enabled
= false;
2803 static void vfio_realize(PCIDevice
*pdev
, Error
**errp
)
2805 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
2806 VFIODevice
*vbasedev_iter
;
2808 char *tmp
, group_path
[PATH_MAX
], *group_name
;
2815 if (!vdev
->vbasedev
.sysfsdev
) {
2816 if (!(~vdev
->host
.domain
|| ~vdev
->host
.bus
||
2817 ~vdev
->host
.slot
|| ~vdev
->host
.function
)) {
2818 error_setg(errp
, "No provided host device");
2819 error_append_hint(errp
, "Use -device vfio-pci,host=DDDD:BB:DD.F "
2820 "or -device vfio-pci,sysfsdev=PATH_TO_DEVICE\n");
2823 vdev
->vbasedev
.sysfsdev
=
2824 g_strdup_printf("/sys/bus/pci/devices/%04x:%02x:%02x.%01x",
2825 vdev
->host
.domain
, vdev
->host
.bus
,
2826 vdev
->host
.slot
, vdev
->host
.function
);
2829 if (stat(vdev
->vbasedev
.sysfsdev
, &st
) < 0) {
2830 error_setg_errno(errp
, errno
, "no such host device");
2831 error_prepend(errp
, ERR_PREFIX
, vdev
->vbasedev
.sysfsdev
);
2835 vdev
->vbasedev
.name
= g_path_get_basename(vdev
->vbasedev
.sysfsdev
);
2836 vdev
->vbasedev
.ops
= &vfio_pci_ops
;
2837 vdev
->vbasedev
.type
= VFIO_DEVICE_TYPE_PCI
;
2838 vdev
->vbasedev
.dev
= &vdev
->pdev
.qdev
;
2840 tmp
= g_strdup_printf("%s/iommu_group", vdev
->vbasedev
.sysfsdev
);
2841 len
= readlink(tmp
, group_path
, sizeof(group_path
));
2844 if (len
<= 0 || len
>= sizeof(group_path
)) {
2845 error_setg_errno(errp
, len
< 0 ? errno
: ENAMETOOLONG
,
2846 "no iommu_group found");
2850 group_path
[len
] = 0;
2852 group_name
= basename(group_path
);
2853 if (sscanf(group_name
, "%d", &groupid
) != 1) {
2854 error_setg_errno(errp
, errno
, "failed to read %s", group_path
);
2858 trace_vfio_realize(vdev
->vbasedev
.name
, groupid
);
2860 group
= vfio_get_group(groupid
, pci_device_iommu_address_space(pdev
), errp
);
2865 QLIST_FOREACH(vbasedev_iter
, &group
->device_list
, next
) {
2866 if (strcmp(vbasedev_iter
->name
, vdev
->vbasedev
.name
) == 0) {
2867 error_setg(errp
, "device is already attached");
2868 vfio_put_group(group
);
2873 ret
= vfio_get_device(group
, vdev
->vbasedev
.name
, &vdev
->vbasedev
, errp
);
2875 vfio_put_group(group
);
2879 vfio_populate_device(vdev
, &err
);
2881 error_propagate(errp
, err
);
2885 /* Get a copy of config space */
2886 ret
= pread(vdev
->vbasedev
.fd
, vdev
->pdev
.config
,
2887 MIN(pci_config_size(&vdev
->pdev
), vdev
->config_size
),
2888 vdev
->config_offset
);
2889 if (ret
< (int)MIN(pci_config_size(&vdev
->pdev
), vdev
->config_size
)) {
2890 ret
= ret
< 0 ? -errno
: -EFAULT
;
2891 error_setg_errno(errp
, -ret
, "failed to read device config space");
2895 /* vfio emulates a lot for us, but some bits need extra love */
2896 vdev
->emulated_config_bits
= g_malloc0(vdev
->config_size
);
2898 /* QEMU can choose to expose the ROM or not */
2899 memset(vdev
->emulated_config_bits
+ PCI_ROM_ADDRESS
, 0xff, 4);
2900 /* QEMU can also add or extend BARs */
2901 memset(vdev
->emulated_config_bits
+ PCI_BASE_ADDRESS_0
, 0xff, 6 * 4);
2904 * The PCI spec reserves vendor ID 0xffff as an invalid value. The
2905 * device ID is managed by the vendor and need only be a 16-bit value.
2906 * Allow any 16-bit value for subsystem so they can be hidden or changed.
2908 if (vdev
->vendor_id
!= PCI_ANY_ID
) {
2909 if (vdev
->vendor_id
>= 0xffff) {
2910 error_setg(errp
, "invalid PCI vendor ID provided");
2913 vfio_add_emulated_word(vdev
, PCI_VENDOR_ID
, vdev
->vendor_id
, ~0);
2914 trace_vfio_pci_emulated_vendor_id(vdev
->vbasedev
.name
, vdev
->vendor_id
);
2916 vdev
->vendor_id
= pci_get_word(pdev
->config
+ PCI_VENDOR_ID
);
2919 if (vdev
->device_id
!= PCI_ANY_ID
) {
2920 if (vdev
->device_id
> 0xffff) {
2921 error_setg(errp
, "invalid PCI device ID provided");
2924 vfio_add_emulated_word(vdev
, PCI_DEVICE_ID
, vdev
->device_id
, ~0);
2925 trace_vfio_pci_emulated_device_id(vdev
->vbasedev
.name
, vdev
->device_id
);
2927 vdev
->device_id
= pci_get_word(pdev
->config
+ PCI_DEVICE_ID
);
2930 if (vdev
->sub_vendor_id
!= PCI_ANY_ID
) {
2931 if (vdev
->sub_vendor_id
> 0xffff) {
2932 error_setg(errp
, "invalid PCI subsystem vendor ID provided");
2935 vfio_add_emulated_word(vdev
, PCI_SUBSYSTEM_VENDOR_ID
,
2936 vdev
->sub_vendor_id
, ~0);
2937 trace_vfio_pci_emulated_sub_vendor_id(vdev
->vbasedev
.name
,
2938 vdev
->sub_vendor_id
);
2941 if (vdev
->sub_device_id
!= PCI_ANY_ID
) {
2942 if (vdev
->sub_device_id
> 0xffff) {
2943 error_setg(errp
, "invalid PCI subsystem device ID provided");
2946 vfio_add_emulated_word(vdev
, PCI_SUBSYSTEM_ID
, vdev
->sub_device_id
, ~0);
2947 trace_vfio_pci_emulated_sub_device_id(vdev
->vbasedev
.name
,
2948 vdev
->sub_device_id
);
2951 /* QEMU can change multi-function devices to single function, or reverse */
2952 vdev
->emulated_config_bits
[PCI_HEADER_TYPE
] =
2953 PCI_HEADER_TYPE_MULTI_FUNCTION
;
2955 /* Restore or clear multifunction, this is always controlled by QEMU */
2956 if (vdev
->pdev
.cap_present
& QEMU_PCI_CAP_MULTIFUNCTION
) {
2957 vdev
->pdev
.config
[PCI_HEADER_TYPE
] |= PCI_HEADER_TYPE_MULTI_FUNCTION
;
2959 vdev
->pdev
.config
[PCI_HEADER_TYPE
] &= ~PCI_HEADER_TYPE_MULTI_FUNCTION
;
2963 * Clear host resource mapping info. If we choose not to register a
2964 * BAR, such as might be the case with the option ROM, we can get
2965 * confusing, unwritable, residual addresses from the host here.
2967 memset(&vdev
->pdev
.config
[PCI_BASE_ADDRESS_0
], 0, 24);
2968 memset(&vdev
->pdev
.config
[PCI_ROM_ADDRESS
], 0, 4);
2970 vfio_pci_size_rom(vdev
);
2972 vfio_bars_prepare(vdev
);
2974 vfio_msix_early_setup(vdev
, &err
);
2976 error_propagate(errp
, err
);
2980 vfio_bars_register(vdev
);
2982 ret
= vfio_add_capabilities(vdev
, errp
);
2988 vfio_vga_quirk_setup(vdev
);
2991 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
2992 vfio_bar_quirk_setup(vdev
, i
);
2995 if (!vdev
->igd_opregion
&&
2996 vdev
->features
& VFIO_FEATURE_ENABLE_IGD_OPREGION
) {
2997 struct vfio_region_info
*opregion
;
2999 if (vdev
->pdev
.qdev
.hotplugged
) {
3001 "cannot support IGD OpRegion feature on hotplugged "
3006 ret
= vfio_get_dev_region_info(&vdev
->vbasedev
,
3007 VFIO_REGION_TYPE_PCI_VENDOR_TYPE
| PCI_VENDOR_ID_INTEL
,
3008 VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION
, &opregion
);
3010 error_setg_errno(errp
, -ret
,
3011 "does not support requested IGD OpRegion feature");
3015 ret
= vfio_pci_igd_opregion_init(vdev
, opregion
, errp
);
3022 /* QEMU emulates all of MSI & MSIX */
3023 if (pdev
->cap_present
& QEMU_PCI_CAP_MSIX
) {
3024 memset(vdev
->emulated_config_bits
+ pdev
->msix_cap
, 0xff,
3028 if (pdev
->cap_present
& QEMU_PCI_CAP_MSI
) {
3029 memset(vdev
->emulated_config_bits
+ pdev
->msi_cap
, 0xff,
3030 vdev
->msi_cap_size
);
3033 if (vfio_pci_read_config(&vdev
->pdev
, PCI_INTERRUPT_PIN
, 1)) {
3034 vdev
->intx
.mmap_timer
= timer_new_ms(QEMU_CLOCK_VIRTUAL
,
3035 vfio_intx_mmap_enable
, vdev
);
3036 pci_device_set_intx_routing_notifier(&vdev
->pdev
, vfio_intx_update
);
3037 ret
= vfio_intx_enable(vdev
, errp
);
3043 if (vdev
->display
!= ON_OFF_AUTO_OFF
) {
3044 ret
= vfio_display_probe(vdev
, errp
);
3050 vfio_register_err_notifier(vdev
);
3051 vfio_register_req_notifier(vdev
);
3052 vfio_setup_resetfn_quirk(vdev
);
3057 pci_device_set_intx_routing_notifier(&vdev
->pdev
, NULL
);
3058 vfio_teardown_msi(vdev
);
3059 vfio_bars_exit(vdev
);
3061 error_prepend(errp
, ERR_PREFIX
, vdev
->vbasedev
.name
);
3064 static void vfio_instance_finalize(Object
*obj
)
3066 PCIDevice
*pci_dev
= PCI_DEVICE(obj
);
3067 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pci_dev
);
3068 VFIOGroup
*group
= vdev
->vbasedev
.group
;
3070 vfio_display_finalize(vdev
);
3071 vfio_bars_finalize(vdev
);
3072 g_free(vdev
->emulated_config_bits
);
3075 * XXX Leaking igd_opregion is not an oversight, we can't remove the
3076 * fw_cfg entry therefore leaking this allocation seems like the safest
3079 * g_free(vdev->igd_opregion);
3081 vfio_put_device(vdev
);
3082 vfio_put_group(group
);
3085 static void vfio_exitfn(PCIDevice
*pdev
)
3087 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
3089 vfio_unregister_req_notifier(vdev
);
3090 vfio_unregister_err_notifier(vdev
);
3091 pci_device_set_intx_routing_notifier(&vdev
->pdev
, NULL
);
3092 vfio_disable_interrupts(vdev
);
3093 if (vdev
->intx
.mmap_timer
) {
3094 timer_free(vdev
->intx
.mmap_timer
);
3096 vfio_teardown_msi(vdev
);
3097 vfio_bars_exit(vdev
);
3100 static void vfio_pci_reset(DeviceState
*dev
)
3102 PCIDevice
*pdev
= DO_UPCAST(PCIDevice
, qdev
, dev
);
3103 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
3105 trace_vfio_pci_reset(vdev
->vbasedev
.name
);
3107 vfio_pci_pre_reset(vdev
);
3109 if (vdev
->display
!= ON_OFF_AUTO_OFF
) {
3110 vfio_display_reset(vdev
);
3113 if (vdev
->resetfn
&& !vdev
->resetfn(vdev
)) {
3117 if (vdev
->vbasedev
.reset_works
&&
3118 (vdev
->has_flr
|| !vdev
->has_pm_reset
) &&
3119 !ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_RESET
)) {
3120 trace_vfio_pci_reset_flr(vdev
->vbasedev
.name
);
3124 /* See if we can do our own bus reset */
3125 if (!vfio_pci_hot_reset_one(vdev
)) {
3129 /* If nothing else works and the device supports PM reset, use it */
3130 if (vdev
->vbasedev
.reset_works
&& vdev
->has_pm_reset
&&
3131 !ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_RESET
)) {
3132 trace_vfio_pci_reset_pm(vdev
->vbasedev
.name
);
3137 vfio_pci_post_reset(vdev
);
3140 static void vfio_instance_init(Object
*obj
)
3142 PCIDevice
*pci_dev
= PCI_DEVICE(obj
);
3143 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, PCI_DEVICE(obj
));
3145 device_add_bootindex_property(obj
, &vdev
->bootindex
,
3147 &pci_dev
->qdev
, NULL
);
3148 vdev
->host
.domain
= ~0U;
3149 vdev
->host
.bus
= ~0U;
3150 vdev
->host
.slot
= ~0U;
3151 vdev
->host
.function
= ~0U;
3153 vdev
->nv_gpudirect_clique
= 0xFF;
3155 /* QEMU_PCI_CAP_EXPRESS initialization does not depend on QEMU command
3156 * line, therefore, no need to wait to realize like other devices */
3157 pci_dev
->cap_present
|= QEMU_PCI_CAP_EXPRESS
;
3160 static Property vfio_pci_dev_properties
[] = {
3161 DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice
, host
),
3162 DEFINE_PROP_STRING("sysfsdev", VFIOPCIDevice
, vbasedev
.sysfsdev
),
3163 DEFINE_PROP_ON_OFF_AUTO("display", VFIOPCIDevice
,
3164 display
, ON_OFF_AUTO_OFF
),
3165 DEFINE_PROP_UINT32("x-intx-mmap-timeout-ms", VFIOPCIDevice
,
3166 intx
.mmap_timeout
, 1100),
3167 DEFINE_PROP_BIT("x-vga", VFIOPCIDevice
, features
,
3168 VFIO_FEATURE_ENABLE_VGA_BIT
, false),
3169 DEFINE_PROP_BIT("x-req", VFIOPCIDevice
, features
,
3170 VFIO_FEATURE_ENABLE_REQ_BIT
, true),
3171 DEFINE_PROP_BIT("x-igd-opregion", VFIOPCIDevice
, features
,
3172 VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT
, false),
3173 DEFINE_PROP_BOOL("x-no-mmap", VFIOPCIDevice
, vbasedev
.no_mmap
, false),
3174 DEFINE_PROP_BOOL("x-no-kvm-intx", VFIOPCIDevice
, no_kvm_intx
, false),
3175 DEFINE_PROP_BOOL("x-no-kvm-msi", VFIOPCIDevice
, no_kvm_msi
, false),
3176 DEFINE_PROP_BOOL("x-no-kvm-msix", VFIOPCIDevice
, no_kvm_msix
, false),
3177 DEFINE_PROP_BOOL("x-no-geforce-quirks", VFIOPCIDevice
,
3178 no_geforce_quirks
, false),
3179 DEFINE_PROP_BOOL("x-no-kvm-ioeventfd", VFIOPCIDevice
, no_kvm_ioeventfd
,
3181 DEFINE_PROP_BOOL("x-no-vfio-ioeventfd", VFIOPCIDevice
, no_vfio_ioeventfd
,
3183 DEFINE_PROP_UINT32("x-pci-vendor-id", VFIOPCIDevice
, vendor_id
, PCI_ANY_ID
),
3184 DEFINE_PROP_UINT32("x-pci-device-id", VFIOPCIDevice
, device_id
, PCI_ANY_ID
),
3185 DEFINE_PROP_UINT32("x-pci-sub-vendor-id", VFIOPCIDevice
,
3186 sub_vendor_id
, PCI_ANY_ID
),
3187 DEFINE_PROP_UINT32("x-pci-sub-device-id", VFIOPCIDevice
,
3188 sub_device_id
, PCI_ANY_ID
),
3189 DEFINE_PROP_UINT32("x-igd-gms", VFIOPCIDevice
, igd_gms
, 0),
3190 DEFINE_PROP_UNSIGNED_NODEFAULT("x-nv-gpudirect-clique", VFIOPCIDevice
,
3191 nv_gpudirect_clique
,
3192 qdev_prop_nv_gpudirect_clique
, uint8_t),
3193 DEFINE_PROP_OFF_AUTO_PCIBAR("x-msix-relocation", VFIOPCIDevice
, msix_relo
,
3194 OFF_AUTOPCIBAR_OFF
),
3196 * TODO - support passed fds... is this necessary?
3197 * DEFINE_PROP_STRING("vfiofd", VFIOPCIDevice, vfiofd_name),
3198 * DEFINE_PROP_STRING("vfiogroupfd, VFIOPCIDevice, vfiogroupfd_name),
3200 DEFINE_PROP_END_OF_LIST(),
3203 static const VMStateDescription vfio_pci_vmstate
= {
3208 static void vfio_pci_dev_class_init(ObjectClass
*klass
, void *data
)
3210 DeviceClass
*dc
= DEVICE_CLASS(klass
);
3211 PCIDeviceClass
*pdc
= PCI_DEVICE_CLASS(klass
);
3213 dc
->reset
= vfio_pci_reset
;
3214 dc
->props
= vfio_pci_dev_properties
;
3215 dc
->vmsd
= &vfio_pci_vmstate
;
3216 dc
->desc
= "VFIO-based PCI device assignment";
3217 set_bit(DEVICE_CATEGORY_MISC
, dc
->categories
);
3218 pdc
->realize
= vfio_realize
;
3219 pdc
->exit
= vfio_exitfn
;
3220 pdc
->config_read
= vfio_pci_read_config
;
3221 pdc
->config_write
= vfio_pci_write_config
;
3224 static const TypeInfo vfio_pci_dev_info
= {
3226 .parent
= TYPE_PCI_DEVICE
,
3227 .instance_size
= sizeof(VFIOPCIDevice
),
3228 .class_init
= vfio_pci_dev_class_init
,
3229 .instance_init
= vfio_instance_init
,
3230 .instance_finalize
= vfio_instance_finalize
,
3231 .interfaces
= (InterfaceInfo
[]) {
3232 { INTERFACE_PCIE_DEVICE
},
3233 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
3238 static void register_vfio_pci_dev_type(void)
3240 type_register_static(&vfio_pci_dev_info
);
3243 type_init(register_vfio_pci_dev_type
)