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Rename target_phys_addr_t to hwaddr
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1 /*
2 * vfio based device assignment support
3 *
4 * Copyright Red Hat, Inc. 2012
5 *
6 * Authors:
7 * Alex Williamson <alex.williamson@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Based on qemu-kvm device-assignment:
13 * Adapted for KVM by Qumranet.
14 * Copyright (c) 2007, Neocleus, Alex Novik (alex@neocleus.com)
15 * Copyright (c) 2007, Neocleus, Guy Zana (guy@neocleus.com)
16 * Copyright (C) 2008, Qumranet, Amit Shah (amit.shah@qumranet.com)
17 * Copyright (C) 2008, Red Hat, Amit Shah (amit.shah@redhat.com)
18 * Copyright (C) 2008, IBM, Muli Ben-Yehuda (muli@il.ibm.com)
19 */
20
21 #include <dirent.h>
22 #include <unistd.h>
23 #include <sys/ioctl.h>
24 #include <sys/mman.h>
25 #include <sys/stat.h>
26 #include <sys/types.h>
27 #include <linux/vfio.h>
28
29 #include "config.h"
30 #include "event_notifier.h"
31 #include "exec-memory.h"
32 #include "kvm.h"
33 #include "memory.h"
34 #include "msi.h"
35 #include "msix.h"
36 #include "pci.h"
37 #include "qemu-common.h"
38 #include "qemu-error.h"
39 #include "qemu-queue.h"
40 #include "range.h"
41
42 /* #define DEBUG_VFIO */
43 #ifdef DEBUG_VFIO
44 #define DPRINTF(fmt, ...) \
45 do { fprintf(stderr, "vfio: " fmt, ## __VA_ARGS__); } while (0)
46 #else
47 #define DPRINTF(fmt, ...) \
48 do { } while (0)
49 #endif
50
51 typedef struct VFIOBAR {
52 off_t fd_offset; /* offset of BAR within device fd */
53 int fd; /* device fd, allows us to pass VFIOBAR as opaque data */
54 MemoryRegion mem; /* slow, read/write access */
55 MemoryRegion mmap_mem; /* direct mapped access */
56 void *mmap;
57 size_t size;
58 uint32_t flags; /* VFIO region flags (rd/wr/mmap) */
59 uint8_t nr; /* cache the BAR number for debug */
60 } VFIOBAR;
61
62 typedef struct VFIOINTx {
63 bool pending; /* interrupt pending */
64 bool kvm_accel; /* set when QEMU bypass through KVM enabled */
65 uint8_t pin; /* which pin to pull for qemu_set_irq */
66 EventNotifier interrupt; /* eventfd triggered on interrupt */
67 EventNotifier unmask; /* eventfd for unmask on QEMU bypass */
68 PCIINTxRoute route; /* routing info for QEMU bypass */
69 uint32_t mmap_timeout; /* delay to re-enable mmaps after interrupt */
70 QEMUTimer *mmap_timer; /* enable mmaps after periods w/o interrupts */
71 } VFIOINTx;
72
73 struct VFIODevice;
74
75 typedef struct VFIOMSIVector {
76 EventNotifier interrupt; /* eventfd triggered on interrupt */
77 struct VFIODevice *vdev; /* back pointer to device */
78 int virq; /* KVM irqchip route for QEMU bypass */
79 bool use;
80 } VFIOMSIVector;
81
82 enum {
83 VFIO_INT_NONE = 0,
84 VFIO_INT_INTx = 1,
85 VFIO_INT_MSI = 2,
86 VFIO_INT_MSIX = 3,
87 };
88
89 struct VFIOGroup;
90
91 typedef struct VFIOContainer {
92 int fd; /* /dev/vfio/vfio, empowered by the attached groups */
93 struct {
94 /* enable abstraction to support various iommu backends */
95 union {
96 MemoryListener listener; /* Used by type1 iommu */
97 };
98 void (*release)(struct VFIOContainer *);
99 } iommu_data;
100 QLIST_HEAD(, VFIOGroup) group_list;
101 QLIST_ENTRY(VFIOContainer) next;
102 } VFIOContainer;
103
104 /* Cache of MSI-X setup plus extra mmap and memory region for split BAR map */
105 typedef struct VFIOMSIXInfo {
106 uint8_t table_bar;
107 uint8_t pba_bar;
108 uint16_t entries;
109 uint32_t table_offset;
110 uint32_t pba_offset;
111 MemoryRegion mmap_mem;
112 void *mmap;
113 } VFIOMSIXInfo;
114
115 typedef struct VFIODevice {
116 PCIDevice pdev;
117 int fd;
118 VFIOINTx intx;
119 unsigned int config_size;
120 off_t config_offset; /* Offset of config space region within device fd */
121 unsigned int rom_size;
122 off_t rom_offset; /* Offset of ROM region within device fd */
123 int msi_cap_size;
124 VFIOMSIVector *msi_vectors;
125 VFIOMSIXInfo *msix;
126 int nr_vectors; /* Number of MSI/MSIX vectors currently in use */
127 int interrupt; /* Current interrupt type */
128 VFIOBAR bars[PCI_NUM_REGIONS - 1]; /* No ROM */
129 PCIHostDeviceAddress host;
130 QLIST_ENTRY(VFIODevice) next;
131 struct VFIOGroup *group;
132 bool reset_works;
133 } VFIODevice;
134
135 typedef struct VFIOGroup {
136 int fd;
137 int groupid;
138 VFIOContainer *container;
139 QLIST_HEAD(, VFIODevice) device_list;
140 QLIST_ENTRY(VFIOGroup) next;
141 QLIST_ENTRY(VFIOGroup) container_next;
142 } VFIOGroup;
143
144 #define MSIX_CAP_LENGTH 12
145
146 static QLIST_HEAD(, VFIOContainer)
147 container_list = QLIST_HEAD_INITIALIZER(container_list);
148
149 static QLIST_HEAD(, VFIOGroup)
150 group_list = QLIST_HEAD_INITIALIZER(group_list);
151
152 static void vfio_disable_interrupts(VFIODevice *vdev);
153 static uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len);
154 static void vfio_mmap_set_enabled(VFIODevice *vdev, bool enabled);
155
156 /*
157 * Common VFIO interrupt disable
158 */
159 static void vfio_disable_irqindex(VFIODevice *vdev, int index)
160 {
161 struct vfio_irq_set irq_set = {
162 .argsz = sizeof(irq_set),
163 .flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_TRIGGER,
164 .index = index,
165 .start = 0,
166 .count = 0,
167 };
168
169 ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, &irq_set);
170 }
171
172 /*
173 * INTx
174 */
175 static void vfio_unmask_intx(VFIODevice *vdev)
176 {
177 struct vfio_irq_set irq_set = {
178 .argsz = sizeof(irq_set),
179 .flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_UNMASK,
180 .index = VFIO_PCI_INTX_IRQ_INDEX,
181 .start = 0,
182 .count = 1,
183 };
184
185 ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, &irq_set);
186 }
187
188 /*
189 * Disabling BAR mmaping can be slow, but toggling it around INTx can
190 * also be a huge overhead. We try to get the best of both worlds by
191 * waiting until an interrupt to disable mmaps (subsequent transitions
192 * to the same state are effectively no overhead). If the interrupt has
193 * been serviced and the time gap is long enough, we re-enable mmaps for
194 * performance. This works well for things like graphics cards, which
195 * may not use their interrupt at all and are penalized to an unusable
196 * level by read/write BAR traps. Other devices, like NICs, have more
197 * regular interrupts and see much better latency by staying in non-mmap
198 * mode. We therefore set the default mmap_timeout such that a ping
199 * is just enough to keep the mmap disabled. Users can experiment with
200 * other options with the x-intx-mmap-timeout-ms parameter (a value of
201 * zero disables the timer).
202 */
203 static void vfio_intx_mmap_enable(void *opaque)
204 {
205 VFIODevice *vdev = opaque;
206
207 if (vdev->intx.pending) {
208 qemu_mod_timer(vdev->intx.mmap_timer,
209 qemu_get_clock_ms(vm_clock) + vdev->intx.mmap_timeout);
210 return;
211 }
212
213 vfio_mmap_set_enabled(vdev, true);
214 }
215
216 static void vfio_intx_interrupt(void *opaque)
217 {
218 VFIODevice *vdev = opaque;
219
220 if (!event_notifier_test_and_clear(&vdev->intx.interrupt)) {
221 return;
222 }
223
224 DPRINTF("%s(%04x:%02x:%02x.%x) Pin %c\n", __func__, vdev->host.domain,
225 vdev->host.bus, vdev->host.slot, vdev->host.function,
226 'A' + vdev->intx.pin);
227
228 vdev->intx.pending = true;
229 qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 1);
230 vfio_mmap_set_enabled(vdev, false);
231 if (vdev->intx.mmap_timeout) {
232 qemu_mod_timer(vdev->intx.mmap_timer,
233 qemu_get_clock_ms(vm_clock) + vdev->intx.mmap_timeout);
234 }
235 }
236
237 static void vfio_eoi(VFIODevice *vdev)
238 {
239 if (!vdev->intx.pending) {
240 return;
241 }
242
243 DPRINTF("%s(%04x:%02x:%02x.%x) EOI\n", __func__, vdev->host.domain,
244 vdev->host.bus, vdev->host.slot, vdev->host.function);
245
246 vdev->intx.pending = false;
247 qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);
248 vfio_unmask_intx(vdev);
249 }
250
251 static int vfio_enable_intx(VFIODevice *vdev)
252 {
253 uint8_t pin = vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1);
254 int ret, argsz;
255 struct vfio_irq_set *irq_set;
256 int32_t *pfd;
257
258 if (!pin) {
259 return 0;
260 }
261
262 vfio_disable_interrupts(vdev);
263
264 vdev->intx.pin = pin - 1; /* Pin A (1) -> irq[0] */
265 ret = event_notifier_init(&vdev->intx.interrupt, 0);
266 if (ret) {
267 error_report("vfio: Error: event_notifier_init failed\n");
268 return ret;
269 }
270
271 argsz = sizeof(*irq_set) + sizeof(*pfd);
272
273 irq_set = g_malloc0(argsz);
274 irq_set->argsz = argsz;
275 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
276 irq_set->index = VFIO_PCI_INTX_IRQ_INDEX;
277 irq_set->start = 0;
278 irq_set->count = 1;
279 pfd = (int32_t *)&irq_set->data;
280
281 *pfd = event_notifier_get_fd(&vdev->intx.interrupt);
282 qemu_set_fd_handler(*pfd, vfio_intx_interrupt, NULL, vdev);
283
284 ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
285 g_free(irq_set);
286 if (ret) {
287 error_report("vfio: Error: Failed to setup INTx fd: %m\n");
288 qemu_set_fd_handler(*pfd, NULL, NULL, vdev);
289 event_notifier_cleanup(&vdev->intx.interrupt);
290 return -errno;
291 }
292
293 vdev->interrupt = VFIO_INT_INTx;
294
295 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
296 vdev->host.bus, vdev->host.slot, vdev->host.function);
297
298 return 0;
299 }
300
301 static void vfio_disable_intx(VFIODevice *vdev)
302 {
303 int fd;
304
305 qemu_del_timer(vdev->intx.mmap_timer);
306 vfio_disable_irqindex(vdev, VFIO_PCI_INTX_IRQ_INDEX);
307 vdev->intx.pending = false;
308 qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);
309 vfio_mmap_set_enabled(vdev, true);
310
311 fd = event_notifier_get_fd(&vdev->intx.interrupt);
312 qemu_set_fd_handler(fd, NULL, NULL, vdev);
313 event_notifier_cleanup(&vdev->intx.interrupt);
314
315 vdev->interrupt = VFIO_INT_NONE;
316
317 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
318 vdev->host.bus, vdev->host.slot, vdev->host.function);
319 }
320
321 /*
322 * MSI/X
323 */
324 static void vfio_msi_interrupt(void *opaque)
325 {
326 VFIOMSIVector *vector = opaque;
327 VFIODevice *vdev = vector->vdev;
328 int nr = vector - vdev->msi_vectors;
329
330 if (!event_notifier_test_and_clear(&vector->interrupt)) {
331 return;
332 }
333
334 DPRINTF("%s(%04x:%02x:%02x.%x) vector %d\n", __func__,
335 vdev->host.domain, vdev->host.bus, vdev->host.slot,
336 vdev->host.function, nr);
337
338 if (vdev->interrupt == VFIO_INT_MSIX) {
339 msix_notify(&vdev->pdev, nr);
340 } else if (vdev->interrupt == VFIO_INT_MSI) {
341 msi_notify(&vdev->pdev, nr);
342 } else {
343 error_report("vfio: MSI interrupt receieved, but not enabled?\n");
344 }
345 }
346
347 static int vfio_enable_vectors(VFIODevice *vdev, bool msix)
348 {
349 struct vfio_irq_set *irq_set;
350 int ret = 0, i, argsz;
351 int32_t *fds;
352
353 argsz = sizeof(*irq_set) + (vdev->nr_vectors * sizeof(*fds));
354
355 irq_set = g_malloc0(argsz);
356 irq_set->argsz = argsz;
357 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
358 irq_set->index = msix ? VFIO_PCI_MSIX_IRQ_INDEX : VFIO_PCI_MSI_IRQ_INDEX;
359 irq_set->start = 0;
360 irq_set->count = vdev->nr_vectors;
361 fds = (int32_t *)&irq_set->data;
362
363 for (i = 0; i < vdev->nr_vectors; i++) {
364 if (!vdev->msi_vectors[i].use) {
365 fds[i] = -1;
366 continue;
367 }
368
369 fds[i] = event_notifier_get_fd(&vdev->msi_vectors[i].interrupt);
370 }
371
372 ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
373
374 g_free(irq_set);
375
376 return ret;
377 }
378
379 static int vfio_msix_vector_use(PCIDevice *pdev,
380 unsigned int nr, MSIMessage msg)
381 {
382 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
383 VFIOMSIVector *vector;
384 int ret;
385
386 DPRINTF("%s(%04x:%02x:%02x.%x) vector %d used\n", __func__,
387 vdev->host.domain, vdev->host.bus, vdev->host.slot,
388 vdev->host.function, nr);
389
390 vector = &vdev->msi_vectors[nr];
391 vector->vdev = vdev;
392 vector->use = true;
393
394 msix_vector_use(pdev, nr);
395
396 if (event_notifier_init(&vector->interrupt, 0)) {
397 error_report("vfio: Error: event_notifier_init failed\n");
398 }
399
400 /*
401 * Attempt to enable route through KVM irqchip,
402 * default to userspace handling if unavailable.
403 */
404 vector->virq = kvm_irqchip_add_msi_route(kvm_state, msg);
405 if (vector->virq < 0 ||
406 kvm_irqchip_add_irqfd_notifier(kvm_state, &vector->interrupt,
407 vector->virq) < 0) {
408 if (vector->virq >= 0) {
409 kvm_irqchip_release_virq(kvm_state, vector->virq);
410 vector->virq = -1;
411 }
412 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
413 vfio_msi_interrupt, NULL, vector);
414 }
415
416 /*
417 * We don't want to have the host allocate all possible MSI vectors
418 * for a device if they're not in use, so we shutdown and incrementally
419 * increase them as needed.
420 */
421 if (vdev->nr_vectors < nr + 1) {
422 vfio_disable_irqindex(vdev, VFIO_PCI_MSIX_IRQ_INDEX);
423 vdev->nr_vectors = nr + 1;
424 ret = vfio_enable_vectors(vdev, true);
425 if (ret) {
426 error_report("vfio: failed to enable vectors, %d\n", ret);
427 }
428 } else {
429 int argsz;
430 struct vfio_irq_set *irq_set;
431 int32_t *pfd;
432
433 argsz = sizeof(*irq_set) + sizeof(*pfd);
434
435 irq_set = g_malloc0(argsz);
436 irq_set->argsz = argsz;
437 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
438 VFIO_IRQ_SET_ACTION_TRIGGER;
439 irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;
440 irq_set->start = nr;
441 irq_set->count = 1;
442 pfd = (int32_t *)&irq_set->data;
443
444 *pfd = event_notifier_get_fd(&vector->interrupt);
445
446 ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
447 g_free(irq_set);
448 if (ret) {
449 error_report("vfio: failed to modify vector, %d\n", ret);
450 }
451 }
452
453 return 0;
454 }
455
456 static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr)
457 {
458 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
459 VFIOMSIVector *vector = &vdev->msi_vectors[nr];
460 int argsz;
461 struct vfio_irq_set *irq_set;
462 int32_t *pfd;
463
464 DPRINTF("%s(%04x:%02x:%02x.%x) vector %d released\n", __func__,
465 vdev->host.domain, vdev->host.bus, vdev->host.slot,
466 vdev->host.function, nr);
467
468 /*
469 * XXX What's the right thing to do here? This turns off the interrupt
470 * completely, but do we really just want to switch the interrupt to
471 * bouncing through userspace and let msix.c drop it? Not sure.
472 */
473 msix_vector_unuse(pdev, nr);
474
475 argsz = sizeof(*irq_set) + sizeof(*pfd);
476
477 irq_set = g_malloc0(argsz);
478 irq_set->argsz = argsz;
479 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
480 VFIO_IRQ_SET_ACTION_TRIGGER;
481 irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;
482 irq_set->start = nr;
483 irq_set->count = 1;
484 pfd = (int32_t *)&irq_set->data;
485
486 *pfd = -1;
487
488 ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
489
490 g_free(irq_set);
491
492 if (vector->virq < 0) {
493 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
494 NULL, NULL, NULL);
495 } else {
496 kvm_irqchip_remove_irqfd_notifier(kvm_state, &vector->interrupt,
497 vector->virq);
498 kvm_irqchip_release_virq(kvm_state, vector->virq);
499 vector->virq = -1;
500 }
501
502 event_notifier_cleanup(&vector->interrupt);
503 vector->use = false;
504 }
505
506 /* TODO This should move to msi.c */
507 static MSIMessage msi_get_msg(PCIDevice *pdev, unsigned int vector)
508 {
509 uint16_t flags = pci_get_word(pdev->config + pdev->msi_cap + PCI_MSI_FLAGS);
510 bool msi64bit = flags & PCI_MSI_FLAGS_64BIT;
511 MSIMessage msg;
512
513 if (msi64bit) {
514 msg.address = pci_get_quad(pdev->config +
515 pdev->msi_cap + PCI_MSI_ADDRESS_LO);
516 } else {
517 msg.address = pci_get_long(pdev->config +
518 pdev->msi_cap + PCI_MSI_ADDRESS_LO);
519 }
520
521 msg.data = pci_get_word(pdev->config + pdev->msi_cap +
522 (msi64bit ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32));
523 msg.data += vector;
524
525 return msg;
526 }
527
528 static void vfio_enable_msix(VFIODevice *vdev)
529 {
530 vfio_disable_interrupts(vdev);
531
532 vdev->msi_vectors = g_malloc0(vdev->msix->entries * sizeof(VFIOMSIVector));
533
534 vdev->interrupt = VFIO_INT_MSIX;
535
536 if (msix_set_vector_notifiers(&vdev->pdev, vfio_msix_vector_use,
537 vfio_msix_vector_release)) {
538 error_report("vfio: msix_set_vector_notifiers failed\n");
539 }
540
541 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
542 vdev->host.bus, vdev->host.slot, vdev->host.function);
543 }
544
545 static void vfio_enable_msi(VFIODevice *vdev)
546 {
547 int ret, i;
548
549 vfio_disable_interrupts(vdev);
550
551 vdev->nr_vectors = msi_nr_vectors_allocated(&vdev->pdev);
552 retry:
553 vdev->msi_vectors = g_malloc0(vdev->nr_vectors * sizeof(VFIOMSIVector));
554
555 for (i = 0; i < vdev->nr_vectors; i++) {
556 MSIMessage msg;
557 VFIOMSIVector *vector = &vdev->msi_vectors[i];
558
559 vector->vdev = vdev;
560 vector->use = true;
561
562 if (event_notifier_init(&vector->interrupt, 0)) {
563 error_report("vfio: Error: event_notifier_init failed\n");
564 }
565
566 msg = msi_get_msg(&vdev->pdev, i);
567
568 /*
569 * Attempt to enable route through KVM irqchip,
570 * default to userspace handling if unavailable.
571 */
572 vector->virq = kvm_irqchip_add_msi_route(kvm_state, msg);
573 if (vector->virq < 0 ||
574 kvm_irqchip_add_irqfd_notifier(kvm_state, &vector->interrupt,
575 vector->virq) < 0) {
576 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
577 vfio_msi_interrupt, NULL, vector);
578 }
579 }
580
581 ret = vfio_enable_vectors(vdev, false);
582 if (ret) {
583 if (ret < 0) {
584 error_report("vfio: Error: Failed to setup MSI fds: %m\n");
585 } else if (ret != vdev->nr_vectors) {
586 error_report("vfio: Error: Failed to enable %d "
587 "MSI vectors, retry with %d\n", vdev->nr_vectors, ret);
588 }
589
590 for (i = 0; i < vdev->nr_vectors; i++) {
591 VFIOMSIVector *vector = &vdev->msi_vectors[i];
592 if (vector->virq >= 0) {
593 kvm_irqchip_remove_irqfd_notifier(kvm_state, &vector->interrupt,
594 vector->virq);
595 kvm_irqchip_release_virq(kvm_state, vector->virq);
596 vector->virq = -1;
597 } else {
598 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
599 NULL, NULL, NULL);
600 }
601 event_notifier_cleanup(&vector->interrupt);
602 }
603
604 g_free(vdev->msi_vectors);
605
606 if (ret > 0 && ret != vdev->nr_vectors) {
607 vdev->nr_vectors = ret;
608 goto retry;
609 }
610 vdev->nr_vectors = 0;
611
612 return;
613 }
614
615 vdev->interrupt = VFIO_INT_MSI;
616
617 DPRINTF("%s(%04x:%02x:%02x.%x) Enabled %d MSI vectors\n", __func__,
618 vdev->host.domain, vdev->host.bus, vdev->host.slot,
619 vdev->host.function, vdev->nr_vectors);
620 }
621
622 static void vfio_disable_msi_common(VFIODevice *vdev)
623 {
624 g_free(vdev->msi_vectors);
625 vdev->msi_vectors = NULL;
626 vdev->nr_vectors = 0;
627 vdev->interrupt = VFIO_INT_NONE;
628
629 vfio_enable_intx(vdev);
630 }
631
632 static void vfio_disable_msix(VFIODevice *vdev)
633 {
634 msix_unset_vector_notifiers(&vdev->pdev);
635
636 if (vdev->nr_vectors) {
637 vfio_disable_irqindex(vdev, VFIO_PCI_MSIX_IRQ_INDEX);
638 }
639
640 vfio_disable_msi_common(vdev);
641
642 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
643 vdev->host.bus, vdev->host.slot, vdev->host.function);
644 }
645
646 static void vfio_disable_msi(VFIODevice *vdev)
647 {
648 int i;
649
650 vfio_disable_irqindex(vdev, VFIO_PCI_MSI_IRQ_INDEX);
651
652 for (i = 0; i < vdev->nr_vectors; i++) {
653 VFIOMSIVector *vector = &vdev->msi_vectors[i];
654
655 if (!vector->use) {
656 continue;
657 }
658
659 if (vector->virq >= 0) {
660 kvm_irqchip_remove_irqfd_notifier(kvm_state,
661 &vector->interrupt, vector->virq);
662 kvm_irqchip_release_virq(kvm_state, vector->virq);
663 vector->virq = -1;
664 } else {
665 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
666 NULL, NULL, NULL);
667 }
668
669 event_notifier_cleanup(&vector->interrupt);
670 }
671
672 vfio_disable_msi_common(vdev);
673
674 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
675 vdev->host.bus, vdev->host.slot, vdev->host.function);
676 }
677
678 /*
679 * IO Port/MMIO - Beware of the endians, VFIO is always little endian
680 */
681 static void vfio_bar_write(void *opaque, hwaddr addr,
682 uint64_t data, unsigned size)
683 {
684 VFIOBAR *bar = opaque;
685 union {
686 uint8_t byte;
687 uint16_t word;
688 uint32_t dword;
689 uint64_t qword;
690 } buf;
691
692 switch (size) {
693 case 1:
694 buf.byte = data;
695 break;
696 case 2:
697 buf.word = cpu_to_le16(data);
698 break;
699 case 4:
700 buf.dword = cpu_to_le32(data);
701 break;
702 default:
703 hw_error("vfio: unsupported write size, %d bytes\n", size);
704 break;
705 }
706
707 if (pwrite(bar->fd, &buf, size, bar->fd_offset + addr) != size) {
708 error_report("%s(,0x%"HWADDR_PRIx", 0x%"PRIx64", %d) failed: %m\n",
709 __func__, addr, data, size);
710 }
711
712 DPRINTF("%s(BAR%d+0x%"HWADDR_PRIx", 0x%"PRIx64", %d)\n",
713 __func__, bar->nr, addr, data, size);
714
715 /*
716 * A read or write to a BAR always signals an INTx EOI. This will
717 * do nothing if not pending (including not in INTx mode). We assume
718 * that a BAR access is in response to an interrupt and that BAR
719 * accesses will service the interrupt. Unfortunately, we don't know
720 * which access will service the interrupt, so we're potentially
721 * getting quite a few host interrupts per guest interrupt.
722 */
723 vfio_eoi(container_of(bar, VFIODevice, bars[bar->nr]));
724 }
725
726 static uint64_t vfio_bar_read(void *opaque,
727 hwaddr addr, unsigned size)
728 {
729 VFIOBAR *bar = opaque;
730 union {
731 uint8_t byte;
732 uint16_t word;
733 uint32_t dword;
734 uint64_t qword;
735 } buf;
736 uint64_t data = 0;
737
738 if (pread(bar->fd, &buf, size, bar->fd_offset + addr) != size) {
739 error_report("%s(,0x%"HWADDR_PRIx", %d) failed: %m\n",
740 __func__, addr, size);
741 return (uint64_t)-1;
742 }
743
744 switch (size) {
745 case 1:
746 data = buf.byte;
747 break;
748 case 2:
749 data = le16_to_cpu(buf.word);
750 break;
751 case 4:
752 data = le32_to_cpu(buf.dword);
753 break;
754 default:
755 hw_error("vfio: unsupported read size, %d bytes\n", size);
756 break;
757 }
758
759 DPRINTF("%s(BAR%d+0x%"HWADDR_PRIx", %d) = 0x%"PRIx64"\n",
760 __func__, bar->nr, addr, size, data);
761
762 /* Same as write above */
763 vfio_eoi(container_of(bar, VFIODevice, bars[bar->nr]));
764
765 return data;
766 }
767
768 static const MemoryRegionOps vfio_bar_ops = {
769 .read = vfio_bar_read,
770 .write = vfio_bar_write,
771 .endianness = DEVICE_LITTLE_ENDIAN,
772 };
773
774 /*
775 * PCI config space
776 */
777 static uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len)
778 {
779 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
780 uint32_t val = 0;
781
782 /*
783 * We only need QEMU PCI config support for the ROM BAR, the MSI and MSIX
784 * capabilities, and the multifunction bit below. We let VFIO handle
785 * virtualizing everything else. Performance is not a concern here.
786 */
787 if (ranges_overlap(addr, len, PCI_ROM_ADDRESS, 4) ||
788 (pdev->cap_present & QEMU_PCI_CAP_MSIX &&
789 ranges_overlap(addr, len, pdev->msix_cap, MSIX_CAP_LENGTH)) ||
790 (pdev->cap_present & QEMU_PCI_CAP_MSI &&
791 ranges_overlap(addr, len, pdev->msi_cap, vdev->msi_cap_size))) {
792
793 val = pci_default_read_config(pdev, addr, len);
794 } else {
795 if (pread(vdev->fd, &val, len, vdev->config_offset + addr) != len) {
796 error_report("%s(%04x:%02x:%02x.%x, 0x%x, 0x%x) failed: %m\n",
797 __func__, vdev->host.domain, vdev->host.bus,
798 vdev->host.slot, vdev->host.function, addr, len);
799 return -errno;
800 }
801 val = le32_to_cpu(val);
802 }
803
804 /* Multifunction bit is virualized in QEMU */
805 if (unlikely(ranges_overlap(addr, len, PCI_HEADER_TYPE, 1))) {
806 uint32_t mask = PCI_HEADER_TYPE_MULTI_FUNCTION;
807
808 if (len == 4) {
809 mask <<= 16;
810 }
811
812 if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION) {
813 val |= mask;
814 } else {
815 val &= ~mask;
816 }
817 }
818
819 DPRINTF("%s(%04x:%02x:%02x.%x, @0x%x, len=0x%x) %x\n", __func__,
820 vdev->host.domain, vdev->host.bus, vdev->host.slot,
821 vdev->host.function, addr, len, val);
822
823 return val;
824 }
825
826 static void vfio_pci_write_config(PCIDevice *pdev, uint32_t addr,
827 uint32_t val, int len)
828 {
829 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
830 uint32_t val_le = cpu_to_le32(val);
831
832 DPRINTF("%s(%04x:%02x:%02x.%x, @0x%x, 0x%x, len=0x%x)\n", __func__,
833 vdev->host.domain, vdev->host.bus, vdev->host.slot,
834 vdev->host.function, addr, val, len);
835
836 /* Write everything to VFIO, let it filter out what we can't write */
837 if (pwrite(vdev->fd, &val_le, len, vdev->config_offset + addr) != len) {
838 error_report("%s(%04x:%02x:%02x.%x, 0x%x, 0x%x, 0x%x) failed: %m\n",
839 __func__, vdev->host.domain, vdev->host.bus,
840 vdev->host.slot, vdev->host.function, addr, val, len);
841 }
842
843 /* Write standard header bits to emulation */
844 if (addr < PCI_CONFIG_HEADER_SIZE) {
845 pci_default_write_config(pdev, addr, val, len);
846 return;
847 }
848
849 /* MSI/MSI-X Enabling/Disabling */
850 if (pdev->cap_present & QEMU_PCI_CAP_MSI &&
851 ranges_overlap(addr, len, pdev->msi_cap, vdev->msi_cap_size)) {
852 int is_enabled, was_enabled = msi_enabled(pdev);
853
854 pci_default_write_config(pdev, addr, val, len);
855
856 is_enabled = msi_enabled(pdev);
857
858 if (!was_enabled && is_enabled) {
859 vfio_enable_msi(vdev);
860 } else if (was_enabled && !is_enabled) {
861 vfio_disable_msi(vdev);
862 }
863 }
864
865 if (pdev->cap_present & QEMU_PCI_CAP_MSIX &&
866 ranges_overlap(addr, len, pdev->msix_cap, MSIX_CAP_LENGTH)) {
867 int is_enabled, was_enabled = msix_enabled(pdev);
868
869 pci_default_write_config(pdev, addr, val, len);
870
871 is_enabled = msix_enabled(pdev);
872
873 if (!was_enabled && is_enabled) {
874 vfio_enable_msix(vdev);
875 } else if (was_enabled && !is_enabled) {
876 vfio_disable_msix(vdev);
877 }
878 }
879 }
880
881 /*
882 * DMA - Mapping and unmapping for the "type1" IOMMU interface used on x86
883 */
884 static int vfio_dma_unmap(VFIOContainer *container,
885 hwaddr iova, ram_addr_t size)
886 {
887 struct vfio_iommu_type1_dma_unmap unmap = {
888 .argsz = sizeof(unmap),
889 .flags = 0,
890 .iova = iova,
891 .size = size,
892 };
893
894 if (ioctl(container->fd, VFIO_IOMMU_UNMAP_DMA, &unmap)) {
895 DPRINTF("VFIO_UNMAP_DMA: %d\n", -errno);
896 return -errno;
897 }
898
899 return 0;
900 }
901
902 static int vfio_dma_map(VFIOContainer *container, hwaddr iova,
903 ram_addr_t size, void *vaddr, bool readonly)
904 {
905 struct vfio_iommu_type1_dma_map map = {
906 .argsz = sizeof(map),
907 .flags = VFIO_DMA_MAP_FLAG_READ,
908 .vaddr = (__u64)(uintptr_t)vaddr,
909 .iova = iova,
910 .size = size,
911 };
912
913 if (!readonly) {
914 map.flags |= VFIO_DMA_MAP_FLAG_WRITE;
915 }
916
917 /*
918 * Try the mapping, if it fails with EBUSY, unmap the region and try
919 * again. This shouldn't be necessary, but we sometimes see it in
920 * the the VGA ROM space.
921 */
922 if (ioctl(container->fd, VFIO_IOMMU_MAP_DMA, &map) == 0 ||
923 (errno == EBUSY && vfio_dma_unmap(container, iova, size) == 0 &&
924 ioctl(container->fd, VFIO_IOMMU_MAP_DMA, &map) == 0)) {
925 return 0;
926 }
927
928 DPRINTF("VFIO_MAP_DMA: %d\n", -errno);
929 return -errno;
930 }
931
932 static bool vfio_listener_skipped_section(MemoryRegionSection *section)
933 {
934 return !memory_region_is_ram(section->mr);
935 }
936
937 static void vfio_listener_region_add(MemoryListener *listener,
938 MemoryRegionSection *section)
939 {
940 VFIOContainer *container = container_of(listener, VFIOContainer,
941 iommu_data.listener);
942 hwaddr iova, end;
943 void *vaddr;
944 int ret;
945
946 if (vfio_listener_skipped_section(section)) {
947 DPRINTF("vfio: SKIPPING region_add %"HWADDR_PRIx" - %"PRIx64"\n",
948 section->offset_within_address_space,
949 section->offset_within_address_space + section->size - 1);
950 return;
951 }
952
953 if (unlikely((section->offset_within_address_space & ~TARGET_PAGE_MASK) !=
954 (section->offset_within_region & ~TARGET_PAGE_MASK))) {
955 error_report("%s received unaligned region\n", __func__);
956 return;
957 }
958
959 iova = TARGET_PAGE_ALIGN(section->offset_within_address_space);
960 end = (section->offset_within_address_space + section->size) &
961 TARGET_PAGE_MASK;
962
963 if (iova >= end) {
964 return;
965 }
966
967 vaddr = memory_region_get_ram_ptr(section->mr) +
968 section->offset_within_region +
969 (iova - section->offset_within_address_space);
970
971 DPRINTF("vfio: region_add %"HWADDR_PRIx" - %"HWADDR_PRIx" [%p]\n",
972 iova, end - 1, vaddr);
973
974 ret = vfio_dma_map(container, iova, end - iova, vaddr, section->readonly);
975 if (ret) {
976 error_report("vfio_dma_map(%p, 0x%"HWADDR_PRIx", "
977 "0x%"HWADDR_PRIx", %p) = %d (%m)\n",
978 container, iova, end - iova, vaddr, ret);
979 }
980 }
981
982 static void vfio_listener_region_del(MemoryListener *listener,
983 MemoryRegionSection *section)
984 {
985 VFIOContainer *container = container_of(listener, VFIOContainer,
986 iommu_data.listener);
987 hwaddr iova, end;
988 int ret;
989
990 if (vfio_listener_skipped_section(section)) {
991 DPRINTF("vfio: SKIPPING region_del %"HWADDR_PRIx" - %"PRIx64"\n",
992 section->offset_within_address_space,
993 section->offset_within_address_space + section->size - 1);
994 return;
995 }
996
997 if (unlikely((section->offset_within_address_space & ~TARGET_PAGE_MASK) !=
998 (section->offset_within_region & ~TARGET_PAGE_MASK))) {
999 error_report("%s received unaligned region\n", __func__);
1000 return;
1001 }
1002
1003 iova = TARGET_PAGE_ALIGN(section->offset_within_address_space);
1004 end = (section->offset_within_address_space + section->size) &
1005 TARGET_PAGE_MASK;
1006
1007 if (iova >= end) {
1008 return;
1009 }
1010
1011 DPRINTF("vfio: region_del %"HWADDR_PRIx" - %"HWADDR_PRIx"\n",
1012 iova, end - 1);
1013
1014 ret = vfio_dma_unmap(container, iova, end - iova);
1015 if (ret) {
1016 error_report("vfio_dma_unmap(%p, 0x%"HWADDR_PRIx", "
1017 "0x%"HWADDR_PRIx") = %d (%m)\n",
1018 container, iova, end - iova, ret);
1019 }
1020 }
1021
1022 static MemoryListener vfio_memory_listener = {
1023 .region_add = vfio_listener_region_add,
1024 .region_del = vfio_listener_region_del,
1025 };
1026
1027 static void vfio_listener_release(VFIOContainer *container)
1028 {
1029 memory_listener_unregister(&container->iommu_data.listener);
1030 }
1031
1032 /*
1033 * Interrupt setup
1034 */
1035 static void vfio_disable_interrupts(VFIODevice *vdev)
1036 {
1037 switch (vdev->interrupt) {
1038 case VFIO_INT_INTx:
1039 vfio_disable_intx(vdev);
1040 break;
1041 case VFIO_INT_MSI:
1042 vfio_disable_msi(vdev);
1043 break;
1044 case VFIO_INT_MSIX:
1045 vfio_disable_msix(vdev);
1046 break;
1047 }
1048 }
1049
1050 static int vfio_setup_msi(VFIODevice *vdev, int pos)
1051 {
1052 uint16_t ctrl;
1053 bool msi_64bit, msi_maskbit;
1054 int ret, entries;
1055
1056 if (pread(vdev->fd, &ctrl, sizeof(ctrl),
1057 vdev->config_offset + pos + PCI_CAP_FLAGS) != sizeof(ctrl)) {
1058 return -errno;
1059 }
1060 ctrl = le16_to_cpu(ctrl);
1061
1062 msi_64bit = !!(ctrl & PCI_MSI_FLAGS_64BIT);
1063 msi_maskbit = !!(ctrl & PCI_MSI_FLAGS_MASKBIT);
1064 entries = 1 << ((ctrl & PCI_MSI_FLAGS_QMASK) >> 1);
1065
1066 DPRINTF("%04x:%02x:%02x.%x PCI MSI CAP @0x%x\n", vdev->host.domain,
1067 vdev->host.bus, vdev->host.slot, vdev->host.function, pos);
1068
1069 ret = msi_init(&vdev->pdev, pos, entries, msi_64bit, msi_maskbit);
1070 if (ret < 0) {
1071 if (ret == -ENOTSUP) {
1072 return 0;
1073 }
1074 error_report("vfio: msi_init failed\n");
1075 return ret;
1076 }
1077 vdev->msi_cap_size = 0xa + (msi_maskbit ? 0xa : 0) + (msi_64bit ? 0x4 : 0);
1078
1079 return 0;
1080 }
1081
1082 /*
1083 * We don't have any control over how pci_add_capability() inserts
1084 * capabilities into the chain. In order to setup MSI-X we need a
1085 * MemoryRegion for the BAR. In order to setup the BAR and not
1086 * attempt to mmap the MSI-X table area, which VFIO won't allow, we
1087 * need to first look for where the MSI-X table lives. So we
1088 * unfortunately split MSI-X setup across two functions.
1089 */
1090 static int vfio_early_setup_msix(VFIODevice *vdev)
1091 {
1092 uint8_t pos;
1093 uint16_t ctrl;
1094 uint32_t table, pba;
1095
1096 pos = pci_find_capability(&vdev->pdev, PCI_CAP_ID_MSIX);
1097 if (!pos) {
1098 return 0;
1099 }
1100
1101 if (pread(vdev->fd, &ctrl, sizeof(ctrl),
1102 vdev->config_offset + pos + PCI_CAP_FLAGS) != sizeof(ctrl)) {
1103 return -errno;
1104 }
1105
1106 if (pread(vdev->fd, &table, sizeof(table),
1107 vdev->config_offset + pos + PCI_MSIX_TABLE) != sizeof(table)) {
1108 return -errno;
1109 }
1110
1111 if (pread(vdev->fd, &pba, sizeof(pba),
1112 vdev->config_offset + pos + PCI_MSIX_PBA) != sizeof(pba)) {
1113 return -errno;
1114 }
1115
1116 ctrl = le16_to_cpu(ctrl);
1117 table = le32_to_cpu(table);
1118 pba = le32_to_cpu(pba);
1119
1120 vdev->msix = g_malloc0(sizeof(*(vdev->msix)));
1121 vdev->msix->table_bar = table & PCI_MSIX_FLAGS_BIRMASK;
1122 vdev->msix->table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK;
1123 vdev->msix->pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK;
1124 vdev->msix->pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
1125 vdev->msix->entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
1126
1127 DPRINTF("%04x:%02x:%02x.%x "
1128 "PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, entries %d\n",
1129 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1130 vdev->host.function, pos, vdev->msix->table_bar,
1131 vdev->msix->table_offset, vdev->msix->entries);
1132
1133 return 0;
1134 }
1135
1136 static int vfio_setup_msix(VFIODevice *vdev, int pos)
1137 {
1138 int ret;
1139
1140 ret = msix_init(&vdev->pdev, vdev->msix->entries,
1141 &vdev->bars[vdev->msix->table_bar].mem,
1142 vdev->msix->table_bar, vdev->msix->table_offset,
1143 &vdev->bars[vdev->msix->pba_bar].mem,
1144 vdev->msix->pba_bar, vdev->msix->pba_offset, pos);
1145 if (ret < 0) {
1146 if (ret == -ENOTSUP) {
1147 return 0;
1148 }
1149 error_report("vfio: msix_init failed\n");
1150 return ret;
1151 }
1152
1153 return 0;
1154 }
1155
1156 static void vfio_teardown_msi(VFIODevice *vdev)
1157 {
1158 msi_uninit(&vdev->pdev);
1159
1160 if (vdev->msix) {
1161 msix_uninit(&vdev->pdev, &vdev->bars[vdev->msix->table_bar].mem,
1162 &vdev->bars[vdev->msix->pba_bar].mem);
1163 }
1164 }
1165
1166 /*
1167 * Resource setup
1168 */
1169 static void vfio_mmap_set_enabled(VFIODevice *vdev, bool enabled)
1170 {
1171 int i;
1172
1173 for (i = 0; i < PCI_ROM_SLOT; i++) {
1174 VFIOBAR *bar = &vdev->bars[i];
1175
1176 if (!bar->size) {
1177 continue;
1178 }
1179
1180 memory_region_set_enabled(&bar->mmap_mem, enabled);
1181 if (vdev->msix && vdev->msix->table_bar == i) {
1182 memory_region_set_enabled(&vdev->msix->mmap_mem, enabled);
1183 }
1184 }
1185 }
1186
1187 static void vfio_unmap_bar(VFIODevice *vdev, int nr)
1188 {
1189 VFIOBAR *bar = &vdev->bars[nr];
1190
1191 if (!bar->size) {
1192 return;
1193 }
1194
1195 memory_region_del_subregion(&bar->mem, &bar->mmap_mem);
1196 munmap(bar->mmap, memory_region_size(&bar->mmap_mem));
1197
1198 if (vdev->msix && vdev->msix->table_bar == nr) {
1199 memory_region_del_subregion(&bar->mem, &vdev->msix->mmap_mem);
1200 munmap(vdev->msix->mmap, memory_region_size(&vdev->msix->mmap_mem));
1201 }
1202
1203 memory_region_destroy(&bar->mem);
1204 }
1205
1206 static int vfio_mmap_bar(VFIOBAR *bar, MemoryRegion *mem, MemoryRegion *submem,
1207 void **map, size_t size, off_t offset,
1208 const char *name)
1209 {
1210 int ret = 0;
1211
1212 if (size && bar->flags & VFIO_REGION_INFO_FLAG_MMAP) {
1213 int prot = 0;
1214
1215 if (bar->flags & VFIO_REGION_INFO_FLAG_READ) {
1216 prot |= PROT_READ;
1217 }
1218
1219 if (bar->flags & VFIO_REGION_INFO_FLAG_WRITE) {
1220 prot |= PROT_WRITE;
1221 }
1222
1223 *map = mmap(NULL, size, prot, MAP_SHARED,
1224 bar->fd, bar->fd_offset + offset);
1225 if (*map == MAP_FAILED) {
1226 *map = NULL;
1227 ret = -errno;
1228 goto empty_region;
1229 }
1230
1231 memory_region_init_ram_ptr(submem, name, size, *map);
1232 } else {
1233 empty_region:
1234 /* Create a zero sized sub-region to make cleanup easy. */
1235 memory_region_init(submem, name, 0);
1236 }
1237
1238 memory_region_add_subregion(mem, offset, submem);
1239
1240 return ret;
1241 }
1242
1243 static void vfio_map_bar(VFIODevice *vdev, int nr)
1244 {
1245 VFIOBAR *bar = &vdev->bars[nr];
1246 unsigned size = bar->size;
1247 char name[64];
1248 uint32_t pci_bar;
1249 uint8_t type;
1250 int ret;
1251
1252 /* Skip both unimplemented BARs and the upper half of 64bit BARS. */
1253 if (!size) {
1254 return;
1255 }
1256
1257 snprintf(name, sizeof(name), "VFIO %04x:%02x:%02x.%x BAR %d",
1258 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1259 vdev->host.function, nr);
1260
1261 /* Determine what type of BAR this is for registration */
1262 ret = pread(vdev->fd, &pci_bar, sizeof(pci_bar),
1263 vdev->config_offset + PCI_BASE_ADDRESS_0 + (4 * nr));
1264 if (ret != sizeof(pci_bar)) {
1265 error_report("vfio: Failed to read BAR %d (%m)\n", nr);
1266 return;
1267 }
1268
1269 pci_bar = le32_to_cpu(pci_bar);
1270 type = pci_bar & (pci_bar & PCI_BASE_ADDRESS_SPACE_IO ?
1271 ~PCI_BASE_ADDRESS_IO_MASK : ~PCI_BASE_ADDRESS_MEM_MASK);
1272
1273 /* A "slow" read/write mapping underlies all BARs */
1274 memory_region_init_io(&bar->mem, &vfio_bar_ops, bar, name, size);
1275 pci_register_bar(&vdev->pdev, nr, type, &bar->mem);
1276
1277 /*
1278 * We can't mmap areas overlapping the MSIX vector table, so we
1279 * potentially insert a direct-mapped subregion before and after it.
1280 */
1281 if (vdev->msix && vdev->msix->table_bar == nr) {
1282 size = vdev->msix->table_offset & TARGET_PAGE_MASK;
1283 }
1284
1285 strncat(name, " mmap", sizeof(name) - strlen(name) - 1);
1286 if (vfio_mmap_bar(bar, &bar->mem,
1287 &bar->mmap_mem, &bar->mmap, size, 0, name)) {
1288 error_report("%s unsupported. Performance may be slow\n", name);
1289 }
1290
1291 if (vdev->msix && vdev->msix->table_bar == nr) {
1292 unsigned start;
1293
1294 start = TARGET_PAGE_ALIGN(vdev->msix->table_offset +
1295 (vdev->msix->entries * PCI_MSIX_ENTRY_SIZE));
1296
1297 size = start < bar->size ? bar->size - start : 0;
1298 strncat(name, " msix-hi", sizeof(name) - strlen(name) - 1);
1299 /* VFIOMSIXInfo contains another MemoryRegion for this mapping */
1300 if (vfio_mmap_bar(bar, &bar->mem, &vdev->msix->mmap_mem,
1301 &vdev->msix->mmap, size, start, name)) {
1302 error_report("%s unsupported. Performance may be slow\n", name);
1303 }
1304 }
1305 }
1306
1307 static void vfio_map_bars(VFIODevice *vdev)
1308 {
1309 int i;
1310
1311 for (i = 0; i < PCI_ROM_SLOT; i++) {
1312 vfio_map_bar(vdev, i);
1313 }
1314 }
1315
1316 static void vfio_unmap_bars(VFIODevice *vdev)
1317 {
1318 int i;
1319
1320 for (i = 0; i < PCI_ROM_SLOT; i++) {
1321 vfio_unmap_bar(vdev, i);
1322 }
1323 }
1324
1325 /*
1326 * General setup
1327 */
1328 static uint8_t vfio_std_cap_max_size(PCIDevice *pdev, uint8_t pos)
1329 {
1330 uint8_t tmp, next = 0xff;
1331
1332 for (tmp = pdev->config[PCI_CAPABILITY_LIST]; tmp;
1333 tmp = pdev->config[tmp + 1]) {
1334 if (tmp > pos && tmp < next) {
1335 next = tmp;
1336 }
1337 }
1338
1339 return next - pos;
1340 }
1341
1342 static int vfio_add_std_cap(VFIODevice *vdev, uint8_t pos)
1343 {
1344 PCIDevice *pdev = &vdev->pdev;
1345 uint8_t cap_id, next, size;
1346 int ret;
1347
1348 cap_id = pdev->config[pos];
1349 next = pdev->config[pos + 1];
1350
1351 /*
1352 * If it becomes important to configure capabilities to their actual
1353 * size, use this as the default when it's something we don't recognize.
1354 * Since QEMU doesn't actually handle many of the config accesses,
1355 * exact size doesn't seem worthwhile.
1356 */
1357 size = vfio_std_cap_max_size(pdev, pos);
1358
1359 /*
1360 * pci_add_capability always inserts the new capability at the head
1361 * of the chain. Therefore to end up with a chain that matches the
1362 * physical device, we insert from the end by making this recursive.
1363 * This is also why we pre-caclulate size above as cached config space
1364 * will be changed as we unwind the stack.
1365 */
1366 if (next) {
1367 ret = vfio_add_std_cap(vdev, next);
1368 if (ret) {
1369 return ret;
1370 }
1371 } else {
1372 pdev->config[PCI_CAPABILITY_LIST] = 0; /* Begin the rebuild */
1373 }
1374
1375 switch (cap_id) {
1376 case PCI_CAP_ID_MSI:
1377 ret = vfio_setup_msi(vdev, pos);
1378 break;
1379 case PCI_CAP_ID_MSIX:
1380 ret = vfio_setup_msix(vdev, pos);
1381 break;
1382 default:
1383 ret = pci_add_capability(pdev, cap_id, pos, size);
1384 break;
1385 }
1386
1387 if (ret < 0) {
1388 error_report("vfio: %04x:%02x:%02x.%x Error adding PCI capability "
1389 "0x%x[0x%x]@0x%x: %d\n", vdev->host.domain,
1390 vdev->host.bus, vdev->host.slot, vdev->host.function,
1391 cap_id, size, pos, ret);
1392 return ret;
1393 }
1394
1395 return 0;
1396 }
1397
1398 static int vfio_add_capabilities(VFIODevice *vdev)
1399 {
1400 PCIDevice *pdev = &vdev->pdev;
1401
1402 if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST) ||
1403 !pdev->config[PCI_CAPABILITY_LIST]) {
1404 return 0; /* Nothing to add */
1405 }
1406
1407 return vfio_add_std_cap(vdev, pdev->config[PCI_CAPABILITY_LIST]);
1408 }
1409
1410 static int vfio_load_rom(VFIODevice *vdev)
1411 {
1412 uint64_t size = vdev->rom_size;
1413 char name[32];
1414 off_t off = 0, voff = vdev->rom_offset;
1415 ssize_t bytes;
1416 void *ptr;
1417
1418 /* If loading ROM from file, pci handles it */
1419 if (vdev->pdev.romfile || !vdev->pdev.rom_bar || !size) {
1420 return 0;
1421 }
1422
1423 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
1424 vdev->host.bus, vdev->host.slot, vdev->host.function);
1425
1426 snprintf(name, sizeof(name), "vfio[%04x:%02x:%02x.%x].rom",
1427 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1428 vdev->host.function);
1429 memory_region_init_ram(&vdev->pdev.rom, name, size);
1430 ptr = memory_region_get_ram_ptr(&vdev->pdev.rom);
1431 memset(ptr, 0xff, size);
1432
1433 while (size) {
1434 bytes = pread(vdev->fd, ptr + off, size, voff + off);
1435 if (bytes == 0) {
1436 break; /* expect that we could get back less than the ROM BAR */
1437 } else if (bytes > 0) {
1438 off += bytes;
1439 size -= bytes;
1440 } else {
1441 if (errno == EINTR || errno == EAGAIN) {
1442 continue;
1443 }
1444 error_report("vfio: Error reading device ROM: %m\n");
1445 memory_region_destroy(&vdev->pdev.rom);
1446 return -errno;
1447 }
1448 }
1449
1450 pci_register_bar(&vdev->pdev, PCI_ROM_SLOT, 0, &vdev->pdev.rom);
1451 vdev->pdev.has_rom = true;
1452 return 0;
1453 }
1454
1455 static int vfio_connect_container(VFIOGroup *group)
1456 {
1457 VFIOContainer *container;
1458 int ret, fd;
1459
1460 if (group->container) {
1461 return 0;
1462 }
1463
1464 QLIST_FOREACH(container, &container_list, next) {
1465 if (!ioctl(group->fd, VFIO_GROUP_SET_CONTAINER, &container->fd)) {
1466 group->container = container;
1467 QLIST_INSERT_HEAD(&container->group_list, group, container_next);
1468 return 0;
1469 }
1470 }
1471
1472 fd = qemu_open("/dev/vfio/vfio", O_RDWR);
1473 if (fd < 0) {
1474 error_report("vfio: failed to open /dev/vfio/vfio: %m\n");
1475 return -errno;
1476 }
1477
1478 ret = ioctl(fd, VFIO_GET_API_VERSION);
1479 if (ret != VFIO_API_VERSION) {
1480 error_report("vfio: supported vfio version: %d, "
1481 "reported version: %d\n", VFIO_API_VERSION, ret);
1482 close(fd);
1483 return -EINVAL;
1484 }
1485
1486 container = g_malloc0(sizeof(*container));
1487 container->fd = fd;
1488
1489 if (ioctl(fd, VFIO_CHECK_EXTENSION, VFIO_TYPE1_IOMMU)) {
1490 ret = ioctl(group->fd, VFIO_GROUP_SET_CONTAINER, &fd);
1491 if (ret) {
1492 error_report("vfio: failed to set group container: %m\n");
1493 g_free(container);
1494 close(fd);
1495 return -errno;
1496 }
1497
1498 ret = ioctl(fd, VFIO_SET_IOMMU, VFIO_TYPE1_IOMMU);
1499 if (ret) {
1500 error_report("vfio: failed to set iommu for container: %m\n");
1501 g_free(container);
1502 close(fd);
1503 return -errno;
1504 }
1505
1506 container->iommu_data.listener = vfio_memory_listener;
1507 container->iommu_data.release = vfio_listener_release;
1508
1509 memory_listener_register(&container->iommu_data.listener, &address_space_memory);
1510 } else {
1511 error_report("vfio: No available IOMMU models\n");
1512 g_free(container);
1513 close(fd);
1514 return -EINVAL;
1515 }
1516
1517 QLIST_INIT(&container->group_list);
1518 QLIST_INSERT_HEAD(&container_list, container, next);
1519
1520 group->container = container;
1521 QLIST_INSERT_HEAD(&container->group_list, group, container_next);
1522
1523 return 0;
1524 }
1525
1526 static void vfio_disconnect_container(VFIOGroup *group)
1527 {
1528 VFIOContainer *container = group->container;
1529
1530 if (ioctl(group->fd, VFIO_GROUP_UNSET_CONTAINER, &container->fd)) {
1531 error_report("vfio: error disconnecting group %d from container\n",
1532 group->groupid);
1533 }
1534
1535 QLIST_REMOVE(group, container_next);
1536 group->container = NULL;
1537
1538 if (QLIST_EMPTY(&container->group_list)) {
1539 if (container->iommu_data.release) {
1540 container->iommu_data.release(container);
1541 }
1542 QLIST_REMOVE(container, next);
1543 DPRINTF("vfio_disconnect_container: close container->fd\n");
1544 close(container->fd);
1545 g_free(container);
1546 }
1547 }
1548
1549 static VFIOGroup *vfio_get_group(int groupid)
1550 {
1551 VFIOGroup *group;
1552 char path[32];
1553 struct vfio_group_status status = { .argsz = sizeof(status) };
1554
1555 QLIST_FOREACH(group, &group_list, next) {
1556 if (group->groupid == groupid) {
1557 return group;
1558 }
1559 }
1560
1561 group = g_malloc0(sizeof(*group));
1562
1563 snprintf(path, sizeof(path), "/dev/vfio/%d", groupid);
1564 group->fd = qemu_open(path, O_RDWR);
1565 if (group->fd < 0) {
1566 error_report("vfio: error opening %s: %m\n", path);
1567 g_free(group);
1568 return NULL;
1569 }
1570
1571 if (ioctl(group->fd, VFIO_GROUP_GET_STATUS, &status)) {
1572 error_report("vfio: error getting group status: %m\n");
1573 close(group->fd);
1574 g_free(group);
1575 return NULL;
1576 }
1577
1578 if (!(status.flags & VFIO_GROUP_FLAGS_VIABLE)) {
1579 error_report("vfio: error, group %d is not viable, please ensure "
1580 "all devices within the iommu_group are bound to their "
1581 "vfio bus driver.\n", groupid);
1582 close(group->fd);
1583 g_free(group);
1584 return NULL;
1585 }
1586
1587 group->groupid = groupid;
1588 QLIST_INIT(&group->device_list);
1589
1590 if (vfio_connect_container(group)) {
1591 error_report("vfio: failed to setup container for group %d\n", groupid);
1592 close(group->fd);
1593 g_free(group);
1594 return NULL;
1595 }
1596
1597 QLIST_INSERT_HEAD(&group_list, group, next);
1598
1599 return group;
1600 }
1601
1602 static void vfio_put_group(VFIOGroup *group)
1603 {
1604 if (!QLIST_EMPTY(&group->device_list)) {
1605 return;
1606 }
1607
1608 vfio_disconnect_container(group);
1609 QLIST_REMOVE(group, next);
1610 DPRINTF("vfio_put_group: close group->fd\n");
1611 close(group->fd);
1612 g_free(group);
1613 }
1614
1615 static int vfio_get_device(VFIOGroup *group, const char *name, VFIODevice *vdev)
1616 {
1617 struct vfio_device_info dev_info = { .argsz = sizeof(dev_info) };
1618 struct vfio_region_info reg_info = { .argsz = sizeof(reg_info) };
1619 int ret, i;
1620
1621 ret = ioctl(group->fd, VFIO_GROUP_GET_DEVICE_FD, name);
1622 if (ret < 0) {
1623 error_report("vfio: error getting device %s from group %d: %m\n",
1624 name, group->groupid);
1625 error_report("Verify all devices in group %d are bound to vfio-pci "
1626 "or pci-stub and not already in use\n", group->groupid);
1627 return ret;
1628 }
1629
1630 vdev->fd = ret;
1631 vdev->group = group;
1632 QLIST_INSERT_HEAD(&group->device_list, vdev, next);
1633
1634 /* Sanity check device */
1635 ret = ioctl(vdev->fd, VFIO_DEVICE_GET_INFO, &dev_info);
1636 if (ret) {
1637 error_report("vfio: error getting device info: %m\n");
1638 goto error;
1639 }
1640
1641 DPRINTF("Device %s flags: %u, regions: %u, irgs: %u\n", name,
1642 dev_info.flags, dev_info.num_regions, dev_info.num_irqs);
1643
1644 if (!(dev_info.flags & VFIO_DEVICE_FLAGS_PCI)) {
1645 error_report("vfio: Um, this isn't a PCI device\n");
1646 goto error;
1647 }
1648
1649 vdev->reset_works = !!(dev_info.flags & VFIO_DEVICE_FLAGS_RESET);
1650 if (!vdev->reset_works) {
1651 error_report("Warning, device %s does not support reset\n", name);
1652 }
1653
1654 if (dev_info.num_regions != VFIO_PCI_NUM_REGIONS) {
1655 error_report("vfio: unexpected number of io regions %u\n",
1656 dev_info.num_regions);
1657 goto error;
1658 }
1659
1660 if (dev_info.num_irqs != VFIO_PCI_NUM_IRQS) {
1661 error_report("vfio: unexpected number of irqs %u\n", dev_info.num_irqs);
1662 goto error;
1663 }
1664
1665 for (i = VFIO_PCI_BAR0_REGION_INDEX; i < VFIO_PCI_ROM_REGION_INDEX; i++) {
1666 reg_info.index = i;
1667
1668 ret = ioctl(vdev->fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info);
1669 if (ret) {
1670 error_report("vfio: Error getting region %d info: %m\n", i);
1671 goto error;
1672 }
1673
1674 DPRINTF("Device %s region %d:\n", name, i);
1675 DPRINTF(" size: 0x%lx, offset: 0x%lx, flags: 0x%lx\n",
1676 (unsigned long)reg_info.size, (unsigned long)reg_info.offset,
1677 (unsigned long)reg_info.flags);
1678
1679 vdev->bars[i].flags = reg_info.flags;
1680 vdev->bars[i].size = reg_info.size;
1681 vdev->bars[i].fd_offset = reg_info.offset;
1682 vdev->bars[i].fd = vdev->fd;
1683 vdev->bars[i].nr = i;
1684 }
1685
1686 reg_info.index = VFIO_PCI_ROM_REGION_INDEX;
1687
1688 ret = ioctl(vdev->fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info);
1689 if (ret) {
1690 error_report("vfio: Error getting ROM info: %m\n");
1691 goto error;
1692 }
1693
1694 DPRINTF("Device %s ROM:\n", name);
1695 DPRINTF(" size: 0x%lx, offset: 0x%lx, flags: 0x%lx\n",
1696 (unsigned long)reg_info.size, (unsigned long)reg_info.offset,
1697 (unsigned long)reg_info.flags);
1698
1699 vdev->rom_size = reg_info.size;
1700 vdev->rom_offset = reg_info.offset;
1701
1702 reg_info.index = VFIO_PCI_CONFIG_REGION_INDEX;
1703
1704 ret = ioctl(vdev->fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info);
1705 if (ret) {
1706 error_report("vfio: Error getting config info: %m\n");
1707 goto error;
1708 }
1709
1710 DPRINTF("Device %s config:\n", name);
1711 DPRINTF(" size: 0x%lx, offset: 0x%lx, flags: 0x%lx\n",
1712 (unsigned long)reg_info.size, (unsigned long)reg_info.offset,
1713 (unsigned long)reg_info.flags);
1714
1715 vdev->config_size = reg_info.size;
1716 vdev->config_offset = reg_info.offset;
1717
1718 error:
1719 if (ret) {
1720 QLIST_REMOVE(vdev, next);
1721 vdev->group = NULL;
1722 close(vdev->fd);
1723 }
1724 return ret;
1725 }
1726
1727 static void vfio_put_device(VFIODevice *vdev)
1728 {
1729 QLIST_REMOVE(vdev, next);
1730 vdev->group = NULL;
1731 DPRINTF("vfio_put_device: close vdev->fd\n");
1732 close(vdev->fd);
1733 if (vdev->msix) {
1734 g_free(vdev->msix);
1735 vdev->msix = NULL;
1736 }
1737 }
1738
1739 static int vfio_initfn(PCIDevice *pdev)
1740 {
1741 VFIODevice *pvdev, *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
1742 VFIOGroup *group;
1743 char path[PATH_MAX], iommu_group_path[PATH_MAX], *group_name;
1744 ssize_t len;
1745 struct stat st;
1746 int groupid;
1747 int ret;
1748
1749 /* Check that the host device exists */
1750 snprintf(path, sizeof(path),
1751 "/sys/bus/pci/devices/%04x:%02x:%02x.%01x/",
1752 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1753 vdev->host.function);
1754 if (stat(path, &st) < 0) {
1755 error_report("vfio: error: no such host device: %s\n", path);
1756 return -errno;
1757 }
1758
1759 strncat(path, "iommu_group", sizeof(path) - strlen(path) - 1);
1760
1761 len = readlink(path, iommu_group_path, PATH_MAX);
1762 if (len <= 0) {
1763 error_report("vfio: error no iommu_group for device\n");
1764 return -errno;
1765 }
1766
1767 iommu_group_path[len] = 0;
1768 group_name = basename(iommu_group_path);
1769
1770 if (sscanf(group_name, "%d", &groupid) != 1) {
1771 error_report("vfio: error reading %s: %m\n", path);
1772 return -errno;
1773 }
1774
1775 DPRINTF("%s(%04x:%02x:%02x.%x) group %d\n", __func__, vdev->host.domain,
1776 vdev->host.bus, vdev->host.slot, vdev->host.function, groupid);
1777
1778 group = vfio_get_group(groupid);
1779 if (!group) {
1780 error_report("vfio: failed to get group %d\n", groupid);
1781 return -ENOENT;
1782 }
1783
1784 snprintf(path, sizeof(path), "%04x:%02x:%02x.%01x",
1785 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1786 vdev->host.function);
1787
1788 QLIST_FOREACH(pvdev, &group->device_list, next) {
1789 if (pvdev->host.domain == vdev->host.domain &&
1790 pvdev->host.bus == vdev->host.bus &&
1791 pvdev->host.slot == vdev->host.slot &&
1792 pvdev->host.function == vdev->host.function) {
1793
1794 error_report("vfio: error: device %s is already attached\n", path);
1795 vfio_put_group(group);
1796 return -EBUSY;
1797 }
1798 }
1799
1800 ret = vfio_get_device(group, path, vdev);
1801 if (ret) {
1802 error_report("vfio: failed to get device %s\n", path);
1803 vfio_put_group(group);
1804 return ret;
1805 }
1806
1807 /* Get a copy of config space */
1808 ret = pread(vdev->fd, vdev->pdev.config,
1809 MIN(pci_config_size(&vdev->pdev), vdev->config_size),
1810 vdev->config_offset);
1811 if (ret < (int)MIN(pci_config_size(&vdev->pdev), vdev->config_size)) {
1812 ret = ret < 0 ? -errno : -EFAULT;
1813 error_report("vfio: Failed to read device config space\n");
1814 goto out_put;
1815 }
1816
1817 /*
1818 * Clear host resource mapping info. If we choose not to register a
1819 * BAR, such as might be the case with the option ROM, we can get
1820 * confusing, unwritable, residual addresses from the host here.
1821 */
1822 memset(&vdev->pdev.config[PCI_BASE_ADDRESS_0], 0, 24);
1823 memset(&vdev->pdev.config[PCI_ROM_ADDRESS], 0, 4);
1824
1825 vfio_load_rom(vdev);
1826
1827 ret = vfio_early_setup_msix(vdev);
1828 if (ret) {
1829 goto out_put;
1830 }
1831
1832 vfio_map_bars(vdev);
1833
1834 ret = vfio_add_capabilities(vdev);
1835 if (ret) {
1836 goto out_teardown;
1837 }
1838
1839 if (vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1)) {
1840 vdev->intx.mmap_timer = qemu_new_timer_ms(vm_clock,
1841 vfio_intx_mmap_enable, vdev);
1842 ret = vfio_enable_intx(vdev);
1843 if (ret) {
1844 goto out_teardown;
1845 }
1846 }
1847
1848 return 0;
1849
1850 out_teardown:
1851 pci_device_set_intx_routing_notifier(&vdev->pdev, NULL);
1852 vfio_teardown_msi(vdev);
1853 vfio_unmap_bars(vdev);
1854 out_put:
1855 vfio_put_device(vdev);
1856 vfio_put_group(group);
1857 return ret;
1858 }
1859
1860 static void vfio_exitfn(PCIDevice *pdev)
1861 {
1862 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
1863 VFIOGroup *group = vdev->group;
1864
1865 pci_device_set_intx_routing_notifier(&vdev->pdev, NULL);
1866 vfio_disable_interrupts(vdev);
1867 if (vdev->intx.mmap_timer) {
1868 qemu_free_timer(vdev->intx.mmap_timer);
1869 }
1870 vfio_teardown_msi(vdev);
1871 vfio_unmap_bars(vdev);
1872 vfio_put_device(vdev);
1873 vfio_put_group(group);
1874 }
1875
1876 static void vfio_pci_reset(DeviceState *dev)
1877 {
1878 PCIDevice *pdev = DO_UPCAST(PCIDevice, qdev, dev);
1879 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
1880 uint16_t cmd;
1881
1882 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
1883 vdev->host.bus, vdev->host.slot, vdev->host.function);
1884
1885 vfio_disable_interrupts(vdev);
1886
1887 /*
1888 * Stop any ongoing DMA by disconecting I/O, MMIO, and bus master.
1889 * Also put INTx Disable in known state.
1890 */
1891 cmd = vfio_pci_read_config(pdev, PCI_COMMAND, 2);
1892 cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
1893 PCI_COMMAND_INTX_DISABLE);
1894 vfio_pci_write_config(pdev, PCI_COMMAND, cmd, 2);
1895
1896 if (vdev->reset_works) {
1897 if (ioctl(vdev->fd, VFIO_DEVICE_RESET)) {
1898 error_report("vfio: Error unable to reset physical device "
1899 "(%04x:%02x:%02x.%x): %m\n", vdev->host.domain,
1900 vdev->host.bus, vdev->host.slot, vdev->host.function);
1901 }
1902 }
1903
1904 vfio_enable_intx(vdev);
1905 }
1906
1907 static Property vfio_pci_dev_properties[] = {
1908 DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIODevice, host),
1909 DEFINE_PROP_UINT32("x-intx-mmap-timeout-ms", VFIODevice,
1910 intx.mmap_timeout, 1100),
1911 /*
1912 * TODO - support passed fds... is this necessary?
1913 * DEFINE_PROP_STRING("vfiofd", VFIODevice, vfiofd_name),
1914 * DEFINE_PROP_STRING("vfiogroupfd, VFIODevice, vfiogroupfd_name),
1915 */
1916 DEFINE_PROP_END_OF_LIST(),
1917 };
1918
1919 static const VMStateDescription vfio_pci_vmstate = {
1920 .name = "vfio-pci",
1921 .unmigratable = 1,
1922 };
1923
1924 static void vfio_pci_dev_class_init(ObjectClass *klass, void *data)
1925 {
1926 DeviceClass *dc = DEVICE_CLASS(klass);
1927 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass);
1928
1929 dc->reset = vfio_pci_reset;
1930 dc->props = vfio_pci_dev_properties;
1931 dc->vmsd = &vfio_pci_vmstate;
1932 dc->desc = "VFIO-based PCI device assignment";
1933 pdc->init = vfio_initfn;
1934 pdc->exit = vfio_exitfn;
1935 pdc->config_read = vfio_pci_read_config;
1936 pdc->config_write = vfio_pci_write_config;
1937 }
1938
1939 static const TypeInfo vfio_pci_dev_info = {
1940 .name = "vfio-pci",
1941 .parent = TYPE_PCI_DEVICE,
1942 .instance_size = sizeof(VFIODevice),
1943 .class_init = vfio_pci_dev_class_init,
1944 };
1945
1946 static void register_vfio_pci_dev_type(void)
1947 {
1948 type_register_static(&vfio_pci_dev_info);
1949 }
1950
1951 type_init(register_vfio_pci_dev_type)