4 * Copyright (c) 2003 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
29 #include "pixel_ops.h"
30 #include "qemu-timer.h"
33 //#define DEBUG_VGA_MEM
34 //#define DEBUG_VGA_REG
36 //#define DEBUG_BOCHS_VBE
38 /* force some bits to zero */
39 const uint8_t sr_mask
[8] = {
50 const uint8_t gr_mask
[16] = {
69 #define cbswap_32(__x) \
71 (((uint32_t)(__x) & (uint32_t)0x000000ffUL) << 24) | \
72 (((uint32_t)(__x) & (uint32_t)0x0000ff00UL) << 8) | \
73 (((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >> 8) | \
74 (((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24) ))
76 #ifdef HOST_WORDS_BIGENDIAN
77 #define PAT(x) cbswap_32(x)
82 #ifdef HOST_WORDS_BIGENDIAN
88 #ifdef HOST_WORDS_BIGENDIAN
89 #define GET_PLANE(data, p) (((data) >> (24 - (p) * 8)) & 0xff)
91 #define GET_PLANE(data, p) (((data) >> ((p) * 8)) & 0xff)
94 static const uint32_t mask16
[16] = {
115 #ifdef HOST_WORDS_BIGENDIAN
118 #define PAT(x) cbswap_32(x)
121 static const uint32_t dmask16
[16] = {
140 static const uint32_t dmask4
[4] = {
147 static uint32_t expand4
[256];
148 static uint16_t expand2
[256];
149 static uint8_t expand4to8
[16];
151 typedef VGACommonState VGAState
;
153 static void vga_screen_dump(void *opaque
, const char *filename
);
154 static char *screen_dump_filename
;
155 static DisplayChangeListener
*screen_dump_dcl
;
157 static void vga_dumb_update_retrace_info(VGAState
*s
)
162 static void vga_precise_update_retrace_info(VGAState
*s
)
165 int hretr_start_char
;
166 int hretr_skew_chars
;
170 int vretr_start_line
;
173 int div2
, sldiv2
, dots
;
176 const int clk_hz
[] = {25175000, 28322000, 25175000, 25175000};
177 int64_t chars_per_sec
;
178 struct vga_precise_retrace
*r
= &s
->retrace_info
.precise
;
180 htotal_chars
= s
->cr
[0x00] + 5;
181 hretr_start_char
= s
->cr
[0x04];
182 hretr_skew_chars
= (s
->cr
[0x05] >> 5) & 3;
183 hretr_end_char
= s
->cr
[0x05] & 0x1f;
185 vtotal_lines
= (s
->cr
[0x06]
186 | (((s
->cr
[0x07] & 1) | ((s
->cr
[0x07] >> 4) & 2)) << 8)) + 2
188 vretr_start_line
= s
->cr
[0x10]
189 | ((((s
->cr
[0x07] >> 2) & 1) | ((s
->cr
[0x07] >> 6) & 2)) << 8)
191 vretr_end_line
= s
->cr
[0x11] & 0xf;
194 div2
= (s
->cr
[0x17] >> 2) & 1;
195 sldiv2
= (s
->cr
[0x17] >> 3) & 1;
197 clocking_mode
= (s
->sr
[0x01] >> 3) & 1;
198 clock_sel
= (s
->msr
>> 2) & 3;
199 dots
= (s
->msr
& 1) ? 8 : 9;
201 chars_per_sec
= clk_hz
[clock_sel
] / dots
;
203 htotal_chars
<<= clocking_mode
;
205 r
->total_chars
= vtotal_lines
* htotal_chars
;
207 r
->ticks_per_char
= ticks_per_sec
/ (r
->total_chars
* r
->freq
);
209 r
->ticks_per_char
= ticks_per_sec
/ chars_per_sec
;
212 r
->vstart
= vretr_start_line
;
213 r
->vend
= r
->vstart
+ vretr_end_line
+ 1;
215 r
->hstart
= hretr_start_char
+ hretr_skew_chars
;
216 r
->hend
= r
->hstart
+ hretr_end_char
+ 1;
217 r
->htotal
= htotal_chars
;
229 "div2 = %d sldiv2 = %d\n"
230 "clocking_mode = %d\n"
231 "clock_sel = %d %d\n"
233 "ticks/char = %lld\n"
235 (double) ticks_per_sec
/ (r
->ticks_per_char
* r
->total_chars
),
253 static uint8_t vga_precise_retrace(VGAState
*s
)
255 struct vga_precise_retrace
*r
= &s
->retrace_info
.precise
;
256 uint8_t val
= s
->st01
& ~(ST01_V_RETRACE
| ST01_DISP_ENABLE
);
258 if (r
->total_chars
) {
259 int cur_line
, cur_line_char
, cur_char
;
262 cur_tick
= qemu_get_clock(vm_clock
);
264 cur_char
= (cur_tick
/ r
->ticks_per_char
) % r
->total_chars
;
265 cur_line
= cur_char
/ r
->htotal
;
267 if (cur_line
>= r
->vstart
&& cur_line
<= r
->vend
) {
268 val
|= ST01_V_RETRACE
| ST01_DISP_ENABLE
;
270 cur_line_char
= cur_char
% r
->htotal
;
271 if (cur_line_char
>= r
->hstart
&& cur_line_char
<= r
->hend
) {
272 val
|= ST01_DISP_ENABLE
;
278 return s
->st01
^ (ST01_V_RETRACE
| ST01_DISP_ENABLE
);
282 static uint8_t vga_dumb_retrace(VGAState
*s
)
284 return s
->st01
^ (ST01_V_RETRACE
| ST01_DISP_ENABLE
);
287 uint32_t vga_ioport_read(void *opaque
, uint32_t addr
)
289 VGACommonState
*s
= opaque
;
292 /* check port range access depending on color/monochrome mode */
293 if ((addr
>= 0x3b0 && addr
<= 0x3bf && (s
->msr
& MSR_COLOR_EMULATION
)) ||
294 (addr
>= 0x3d0 && addr
<= 0x3df && !(s
->msr
& MSR_COLOR_EMULATION
))) {
299 if (s
->ar_flip_flop
== 0) {
306 index
= s
->ar_index
& 0x1f;
319 val
= s
->sr
[s
->sr_index
];
321 printf("vga: read SR%x = 0x%02x\n", s
->sr_index
, val
);
328 val
= s
->dac_write_index
;
331 val
= s
->palette
[s
->dac_read_index
* 3 + s
->dac_sub_index
];
332 if (++s
->dac_sub_index
== 3) {
333 s
->dac_sub_index
= 0;
347 val
= s
->gr
[s
->gr_index
];
349 printf("vga: read GR%x = 0x%02x\n", s
->gr_index
, val
);
358 val
= s
->cr
[s
->cr_index
];
360 printf("vga: read CR%x = 0x%02x\n", s
->cr_index
, val
);
365 /* just toggle to fool polling */
366 val
= s
->st01
= s
->retrace(s
);
374 #if defined(DEBUG_VGA)
375 printf("VGA: read addr=0x%04x data=0x%02x\n", addr
, val
);
380 void vga_ioport_write(void *opaque
, uint32_t addr
, uint32_t val
)
382 VGACommonState
*s
= opaque
;
385 /* check port range access depending on color/monochrome mode */
386 if ((addr
>= 0x3b0 && addr
<= 0x3bf && (s
->msr
& MSR_COLOR_EMULATION
)) ||
387 (addr
>= 0x3d0 && addr
<= 0x3df && !(s
->msr
& MSR_COLOR_EMULATION
)))
391 printf("VGA: write addr=0x%04x data=0x%02x\n", addr
, val
);
396 if (s
->ar_flip_flop
== 0) {
400 index
= s
->ar_index
& 0x1f;
403 s
->ar
[index
] = val
& 0x3f;
406 s
->ar
[index
] = val
& ~0x10;
412 s
->ar
[index
] = val
& ~0xc0;
415 s
->ar
[index
] = val
& ~0xf0;
418 s
->ar
[index
] = val
& ~0xf0;
424 s
->ar_flip_flop
^= 1;
427 s
->msr
= val
& ~0x10;
428 s
->update_retrace_info(s
);
431 s
->sr_index
= val
& 7;
435 printf("vga: write SR%x = 0x%02x\n", s
->sr_index
, val
);
437 s
->sr
[s
->sr_index
] = val
& sr_mask
[s
->sr_index
];
438 if (s
->sr_index
== 1) s
->update_retrace_info(s
);
441 s
->dac_read_index
= val
;
442 s
->dac_sub_index
= 0;
446 s
->dac_write_index
= val
;
447 s
->dac_sub_index
= 0;
451 s
->dac_cache
[s
->dac_sub_index
] = val
;
452 if (++s
->dac_sub_index
== 3) {
453 memcpy(&s
->palette
[s
->dac_write_index
* 3], s
->dac_cache
, 3);
454 s
->dac_sub_index
= 0;
455 s
->dac_write_index
++;
459 s
->gr_index
= val
& 0x0f;
463 printf("vga: write GR%x = 0x%02x\n", s
->gr_index
, val
);
465 s
->gr
[s
->gr_index
] = val
& gr_mask
[s
->gr_index
];
474 printf("vga: write CR%x = 0x%02x\n", s
->cr_index
, val
);
476 /* handle CR0-7 protection */
477 if ((s
->cr
[0x11] & 0x80) && s
->cr_index
<= 7) {
478 /* can always write bit 4 of CR7 */
479 if (s
->cr_index
== 7)
480 s
->cr
[7] = (s
->cr
[7] & ~0x10) | (val
& 0x10);
483 switch(s
->cr_index
) {
484 case 0x01: /* horizontal display end */
489 case 0x12: /* vertical display end */
490 s
->cr
[s
->cr_index
] = val
;
493 s
->cr
[s
->cr_index
] = val
;
497 switch(s
->cr_index
) {
505 s
->update_retrace_info(s
);
516 #ifdef CONFIG_BOCHS_VBE
517 static uint32_t vbe_ioport_read_index(void *opaque
, uint32_t addr
)
519 VGAState
*s
= opaque
;
525 static uint32_t vbe_ioport_read_data(void *opaque
, uint32_t addr
)
527 VGAState
*s
= opaque
;
530 if (s
->vbe_index
<= VBE_DISPI_INDEX_NB
) {
531 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_GETCAPS
) {
532 switch(s
->vbe_index
) {
533 /* XXX: do not hardcode ? */
534 case VBE_DISPI_INDEX_XRES
:
535 val
= VBE_DISPI_MAX_XRES
;
537 case VBE_DISPI_INDEX_YRES
:
538 val
= VBE_DISPI_MAX_YRES
;
540 case VBE_DISPI_INDEX_BPP
:
541 val
= VBE_DISPI_MAX_BPP
;
544 val
= s
->vbe_regs
[s
->vbe_index
];
548 val
= s
->vbe_regs
[s
->vbe_index
];
553 #ifdef DEBUG_BOCHS_VBE
554 printf("VBE: read index=0x%x val=0x%x\n", s
->vbe_index
, val
);
559 static void vbe_ioport_write_index(void *opaque
, uint32_t addr
, uint32_t val
)
561 VGAState
*s
= opaque
;
565 static void vbe_ioport_write_data(void *opaque
, uint32_t addr
, uint32_t val
)
567 VGAState
*s
= opaque
;
569 if (s
->vbe_index
<= VBE_DISPI_INDEX_NB
) {
570 #ifdef DEBUG_BOCHS_VBE
571 printf("VBE: write index=0x%x val=0x%x\n", s
->vbe_index
, val
);
573 switch(s
->vbe_index
) {
574 case VBE_DISPI_INDEX_ID
:
575 if (val
== VBE_DISPI_ID0
||
576 val
== VBE_DISPI_ID1
||
577 val
== VBE_DISPI_ID2
||
578 val
== VBE_DISPI_ID3
||
579 val
== VBE_DISPI_ID4
) {
580 s
->vbe_regs
[s
->vbe_index
] = val
;
583 case VBE_DISPI_INDEX_XRES
:
584 if ((val
<= VBE_DISPI_MAX_XRES
) && ((val
& 7) == 0)) {
585 s
->vbe_regs
[s
->vbe_index
] = val
;
588 case VBE_DISPI_INDEX_YRES
:
589 if (val
<= VBE_DISPI_MAX_YRES
) {
590 s
->vbe_regs
[s
->vbe_index
] = val
;
593 case VBE_DISPI_INDEX_BPP
:
596 if (val
== 4 || val
== 8 || val
== 15 ||
597 val
== 16 || val
== 24 || val
== 32) {
598 s
->vbe_regs
[s
->vbe_index
] = val
;
601 case VBE_DISPI_INDEX_BANK
:
602 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4) {
603 val
&= (s
->vbe_bank_mask
>> 2);
605 val
&= s
->vbe_bank_mask
;
607 s
->vbe_regs
[s
->vbe_index
] = val
;
608 s
->bank_offset
= (val
<< 16);
610 case VBE_DISPI_INDEX_ENABLE
:
611 if ((val
& VBE_DISPI_ENABLED
) &&
612 !(s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
)) {
613 int h
, shift_control
;
615 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_WIDTH
] =
616 s
->vbe_regs
[VBE_DISPI_INDEX_XRES
];
617 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_HEIGHT
] =
618 s
->vbe_regs
[VBE_DISPI_INDEX_YRES
];
619 s
->vbe_regs
[VBE_DISPI_INDEX_X_OFFSET
] = 0;
620 s
->vbe_regs
[VBE_DISPI_INDEX_Y_OFFSET
] = 0;
622 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
623 s
->vbe_line_offset
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] >> 1;
625 s
->vbe_line_offset
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] *
626 ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
627 s
->vbe_start_addr
= 0;
629 /* clear the screen (should be done in BIOS) */
630 if (!(val
& VBE_DISPI_NOCLEARMEM
)) {
631 memset(s
->vram_ptr
, 0,
632 s
->vbe_regs
[VBE_DISPI_INDEX_YRES
] * s
->vbe_line_offset
);
635 /* we initialize the VGA graphic mode (should be done
637 s
->gr
[0x06] = (s
->gr
[0x06] & ~0x0c) | 0x05; /* graphic mode + memory map 1 */
638 s
->cr
[0x17] |= 3; /* no CGA modes */
639 s
->cr
[0x13] = s
->vbe_line_offset
>> 3;
641 s
->cr
[0x01] = (s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] >> 3) - 1;
642 /* height (only meaningful if < 1024) */
643 h
= s
->vbe_regs
[VBE_DISPI_INDEX_YRES
] - 1;
645 s
->cr
[0x07] = (s
->cr
[0x07] & ~0x42) |
646 ((h
>> 7) & 0x02) | ((h
>> 3) & 0x40);
647 /* line compare to 1023 */
652 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4) {
654 s
->sr
[0x01] &= ~8; /* no double line */
657 s
->sr
[4] |= 0x08; /* set chain 4 mode */
658 s
->sr
[2] |= 0x0f; /* activate all planes */
660 s
->gr
[0x05] = (s
->gr
[0x05] & ~0x60) | (shift_control
<< 5);
661 s
->cr
[0x09] &= ~0x9f; /* no double scan */
663 /* XXX: the bios should do that */
666 s
->dac_8bit
= (val
& VBE_DISPI_8BIT_DAC
) > 0;
667 s
->vbe_regs
[s
->vbe_index
] = val
;
669 case VBE_DISPI_INDEX_VIRT_WIDTH
:
671 int w
, h
, line_offset
;
673 if (val
< s
->vbe_regs
[VBE_DISPI_INDEX_XRES
])
676 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
677 line_offset
= w
>> 1;
679 line_offset
= w
* ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
680 h
= s
->vram_size
/ line_offset
;
681 /* XXX: support weird bochs semantics ? */
682 if (h
< s
->vbe_regs
[VBE_DISPI_INDEX_YRES
])
684 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_WIDTH
] = w
;
685 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_HEIGHT
] = h
;
686 s
->vbe_line_offset
= line_offset
;
689 case VBE_DISPI_INDEX_X_OFFSET
:
690 case VBE_DISPI_INDEX_Y_OFFSET
:
693 s
->vbe_regs
[s
->vbe_index
] = val
;
694 s
->vbe_start_addr
= s
->vbe_line_offset
* s
->vbe_regs
[VBE_DISPI_INDEX_Y_OFFSET
];
695 x
= s
->vbe_regs
[VBE_DISPI_INDEX_X_OFFSET
];
696 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
697 s
->vbe_start_addr
+= x
>> 1;
699 s
->vbe_start_addr
+= x
* ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
700 s
->vbe_start_addr
>>= 2;
710 /* called for accesses between 0xa0000 and 0xc0000 */
711 uint32_t vga_mem_readb(void *opaque
, target_phys_addr_t addr
)
713 VGAState
*s
= opaque
;
714 int memory_map_mode
, plane
;
717 /* convert to VGA memory offset */
718 memory_map_mode
= (s
->gr
[6] >> 2) & 3;
720 switch(memory_map_mode
) {
726 addr
+= s
->bank_offset
;
741 if (s
->sr
[4] & 0x08) {
742 /* chain 4 mode : simplest access */
743 ret
= s
->vram_ptr
[addr
];
744 } else if (s
->gr
[5] & 0x10) {
745 /* odd/even mode (aka text mode mapping) */
746 plane
= (s
->gr
[4] & 2) | (addr
& 1);
747 ret
= s
->vram_ptr
[((addr
& ~1) << 1) | plane
];
749 /* standard VGA latched access */
750 s
->latch
= ((uint32_t *)s
->vram_ptr
)[addr
];
752 if (!(s
->gr
[5] & 0x08)) {
755 ret
= GET_PLANE(s
->latch
, plane
);
758 ret
= (s
->latch
^ mask16
[s
->gr
[2]]) & mask16
[s
->gr
[7]];
767 static uint32_t vga_mem_readw(void *opaque
, target_phys_addr_t addr
)
770 #ifdef TARGET_WORDS_BIGENDIAN
771 v
= vga_mem_readb(opaque
, addr
) << 8;
772 v
|= vga_mem_readb(opaque
, addr
+ 1);
774 v
= vga_mem_readb(opaque
, addr
);
775 v
|= vga_mem_readb(opaque
, addr
+ 1) << 8;
780 static uint32_t vga_mem_readl(void *opaque
, target_phys_addr_t addr
)
783 #ifdef TARGET_WORDS_BIGENDIAN
784 v
= vga_mem_readb(opaque
, addr
) << 24;
785 v
|= vga_mem_readb(opaque
, addr
+ 1) << 16;
786 v
|= vga_mem_readb(opaque
, addr
+ 2) << 8;
787 v
|= vga_mem_readb(opaque
, addr
+ 3);
789 v
= vga_mem_readb(opaque
, addr
);
790 v
|= vga_mem_readb(opaque
, addr
+ 1) << 8;
791 v
|= vga_mem_readb(opaque
, addr
+ 2) << 16;
792 v
|= vga_mem_readb(opaque
, addr
+ 3) << 24;
797 /* called for accesses between 0xa0000 and 0xc0000 */
798 void vga_mem_writeb(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
800 VGAState
*s
= opaque
;
801 int memory_map_mode
, plane
, write_mode
, b
, func_select
, mask
;
802 uint32_t write_mask
, bit_mask
, set_mask
;
805 printf("vga: [0x" TARGET_FMT_plx
"] = 0x%02x\n", addr
, val
);
807 /* convert to VGA memory offset */
808 memory_map_mode
= (s
->gr
[6] >> 2) & 3;
810 switch(memory_map_mode
) {
816 addr
+= s
->bank_offset
;
831 if (s
->sr
[4] & 0x08) {
832 /* chain 4 mode : simplest access */
835 if (s
->sr
[2] & mask
) {
836 s
->vram_ptr
[addr
] = val
;
838 printf("vga: chain4: [0x" TARGET_FMT_plx
"]\n", addr
);
840 s
->plane_updated
|= mask
; /* only used to detect font change */
841 cpu_physical_memory_set_dirty(s
->vram_offset
+ addr
);
843 } else if (s
->gr
[5] & 0x10) {
844 /* odd/even mode (aka text mode mapping) */
845 plane
= (s
->gr
[4] & 2) | (addr
& 1);
847 if (s
->sr
[2] & mask
) {
848 addr
= ((addr
& ~1) << 1) | plane
;
849 s
->vram_ptr
[addr
] = val
;
851 printf("vga: odd/even: [0x" TARGET_FMT_plx
"]\n", addr
);
853 s
->plane_updated
|= mask
; /* only used to detect font change */
854 cpu_physical_memory_set_dirty(s
->vram_offset
+ addr
);
857 /* standard VGA latched access */
858 write_mode
= s
->gr
[5] & 3;
864 val
= ((val
>> b
) | (val
<< (8 - b
))) & 0xff;
868 /* apply set/reset mask */
869 set_mask
= mask16
[s
->gr
[1]];
870 val
= (val
& ~set_mask
) | (mask16
[s
->gr
[0]] & set_mask
);
877 val
= mask16
[val
& 0x0f];
883 val
= (val
>> b
) | (val
<< (8 - b
));
885 bit_mask
= s
->gr
[8] & val
;
886 val
= mask16
[s
->gr
[0]];
890 /* apply logical operation */
891 func_select
= s
->gr
[3] >> 3;
892 switch(func_select
) {
912 bit_mask
|= bit_mask
<< 8;
913 bit_mask
|= bit_mask
<< 16;
914 val
= (val
& bit_mask
) | (s
->latch
& ~bit_mask
);
917 /* mask data according to sr[2] */
919 s
->plane_updated
|= mask
; /* only used to detect font change */
920 write_mask
= mask16
[mask
];
921 ((uint32_t *)s
->vram_ptr
)[addr
] =
922 (((uint32_t *)s
->vram_ptr
)[addr
] & ~write_mask
) |
925 printf("vga: latch: [0x" TARGET_FMT_plx
"] mask=0x%08x val=0x%08x\n",
926 addr
* 4, write_mask
, val
);
928 cpu_physical_memory_set_dirty(s
->vram_offset
+ (addr
<< 2));
932 static void vga_mem_writew(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
934 #ifdef TARGET_WORDS_BIGENDIAN
935 vga_mem_writeb(opaque
, addr
, (val
>> 8) & 0xff);
936 vga_mem_writeb(opaque
, addr
+ 1, val
& 0xff);
938 vga_mem_writeb(opaque
, addr
, val
& 0xff);
939 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 8) & 0xff);
943 static void vga_mem_writel(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
945 #ifdef TARGET_WORDS_BIGENDIAN
946 vga_mem_writeb(opaque
, addr
, (val
>> 24) & 0xff);
947 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 16) & 0xff);
948 vga_mem_writeb(opaque
, addr
+ 2, (val
>> 8) & 0xff);
949 vga_mem_writeb(opaque
, addr
+ 3, val
& 0xff);
951 vga_mem_writeb(opaque
, addr
, val
& 0xff);
952 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 8) & 0xff);
953 vga_mem_writeb(opaque
, addr
+ 2, (val
>> 16) & 0xff);
954 vga_mem_writeb(opaque
, addr
+ 3, (val
>> 24) & 0xff);
958 typedef void vga_draw_glyph8_func(uint8_t *d
, int linesize
,
959 const uint8_t *font_ptr
, int h
,
960 uint32_t fgcol
, uint32_t bgcol
);
961 typedef void vga_draw_glyph9_func(uint8_t *d
, int linesize
,
962 const uint8_t *font_ptr
, int h
,
963 uint32_t fgcol
, uint32_t bgcol
, int dup9
);
964 typedef void vga_draw_line_func(VGAState
*s1
, uint8_t *d
,
965 const uint8_t *s
, int width
);
968 #include "vga_template.h"
971 #include "vga_template.h"
975 #include "vga_template.h"
978 #include "vga_template.h"
982 #include "vga_template.h"
985 #include "vga_template.h"
989 #include "vga_template.h"
991 static unsigned int rgb_to_pixel8_dup(unsigned int r
, unsigned int g
, unsigned b
)
994 col
= rgb_to_pixel8(r
, g
, b
);
1000 static unsigned int rgb_to_pixel15_dup(unsigned int r
, unsigned int g
, unsigned b
)
1003 col
= rgb_to_pixel15(r
, g
, b
);
1008 static unsigned int rgb_to_pixel15bgr_dup(unsigned int r
, unsigned int g
,
1012 col
= rgb_to_pixel15bgr(r
, g
, b
);
1017 static unsigned int rgb_to_pixel16_dup(unsigned int r
, unsigned int g
, unsigned b
)
1020 col
= rgb_to_pixel16(r
, g
, b
);
1025 static unsigned int rgb_to_pixel16bgr_dup(unsigned int r
, unsigned int g
,
1029 col
= rgb_to_pixel16bgr(r
, g
, b
);
1034 static unsigned int rgb_to_pixel32_dup(unsigned int r
, unsigned int g
, unsigned b
)
1037 col
= rgb_to_pixel32(r
, g
, b
);
1041 static unsigned int rgb_to_pixel32bgr_dup(unsigned int r
, unsigned int g
, unsigned b
)
1044 col
= rgb_to_pixel32bgr(r
, g
, b
);
1048 /* return true if the palette was modified */
1049 static int update_palette16(VGAState
*s
)
1052 uint32_t v
, col
, *palette
;
1055 palette
= s
->last_palette
;
1056 for(i
= 0; i
< 16; i
++) {
1058 if (s
->ar
[0x10] & 0x80)
1059 v
= ((s
->ar
[0x14] & 0xf) << 4) | (v
& 0xf);
1061 v
= ((s
->ar
[0x14] & 0xc) << 4) | (v
& 0x3f);
1063 col
= s
->rgb_to_pixel(c6_to_8(s
->palette
[v
]),
1064 c6_to_8(s
->palette
[v
+ 1]),
1065 c6_to_8(s
->palette
[v
+ 2]));
1066 if (col
!= palette
[i
]) {
1074 /* return true if the palette was modified */
1075 static int update_palette256(VGAState
*s
)
1078 uint32_t v
, col
, *palette
;
1081 palette
= s
->last_palette
;
1083 for(i
= 0; i
< 256; i
++) {
1085 col
= s
->rgb_to_pixel(s
->palette
[v
],
1089 col
= s
->rgb_to_pixel(c6_to_8(s
->palette
[v
]),
1090 c6_to_8(s
->palette
[v
+ 1]),
1091 c6_to_8(s
->palette
[v
+ 2]));
1093 if (col
!= palette
[i
]) {
1102 static void vga_get_offsets(VGAState
*s
,
1103 uint32_t *pline_offset
,
1104 uint32_t *pstart_addr
,
1105 uint32_t *pline_compare
)
1107 uint32_t start_addr
, line_offset
, line_compare
;
1108 #ifdef CONFIG_BOCHS_VBE
1109 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1110 line_offset
= s
->vbe_line_offset
;
1111 start_addr
= s
->vbe_start_addr
;
1112 line_compare
= 65535;
1116 /* compute line_offset in bytes */
1117 line_offset
= s
->cr
[0x13];
1120 /* starting address */
1121 start_addr
= s
->cr
[0x0d] | (s
->cr
[0x0c] << 8);
1124 line_compare
= s
->cr
[0x18] |
1125 ((s
->cr
[0x07] & 0x10) << 4) |
1126 ((s
->cr
[0x09] & 0x40) << 3);
1128 *pline_offset
= line_offset
;
1129 *pstart_addr
= start_addr
;
1130 *pline_compare
= line_compare
;
1133 /* update start_addr and line_offset. Return TRUE if modified */
1134 static int update_basic_params(VGAState
*s
)
1137 uint32_t start_addr
, line_offset
, line_compare
;
1141 s
->get_offsets(s
, &line_offset
, &start_addr
, &line_compare
);
1143 if (line_offset
!= s
->line_offset
||
1144 start_addr
!= s
->start_addr
||
1145 line_compare
!= s
->line_compare
) {
1146 s
->line_offset
= line_offset
;
1147 s
->start_addr
= start_addr
;
1148 s
->line_compare
= line_compare
;
1156 static inline int get_depth_index(DisplayState
*s
)
1158 switch(ds_get_bits_per_pixel(s
)) {
1167 if (is_surface_bgr(s
->surface
))
1174 static vga_draw_glyph8_func
*vga_draw_glyph8_table
[NB_DEPTHS
] = {
1184 static vga_draw_glyph8_func
*vga_draw_glyph16_table
[NB_DEPTHS
] = {
1186 vga_draw_glyph16_16
,
1187 vga_draw_glyph16_16
,
1188 vga_draw_glyph16_32
,
1189 vga_draw_glyph16_32
,
1190 vga_draw_glyph16_16
,
1191 vga_draw_glyph16_16
,
1194 static vga_draw_glyph9_func
*vga_draw_glyph9_table
[NB_DEPTHS
] = {
1204 static const uint8_t cursor_glyph
[32 * 4] = {
1205 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1206 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1207 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1208 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1209 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1210 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1211 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1212 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1213 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1214 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1215 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1216 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1217 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1218 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1219 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1220 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1223 static void vga_get_text_resolution(VGAState
*s
, int *pwidth
, int *pheight
,
1224 int *pcwidth
, int *pcheight
)
1226 int width
, cwidth
, height
, cheight
;
1228 /* total width & height */
1229 cheight
= (s
->cr
[9] & 0x1f) + 1;
1231 if (!(s
->sr
[1] & 0x01))
1233 if (s
->sr
[1] & 0x08)
1234 cwidth
= 16; /* NOTE: no 18 pixel wide */
1235 width
= (s
->cr
[0x01] + 1);
1236 if (s
->cr
[0x06] == 100) {
1237 /* ugly hack for CGA 160x100x16 - explain me the logic */
1240 height
= s
->cr
[0x12] |
1241 ((s
->cr
[0x07] & 0x02) << 7) |
1242 ((s
->cr
[0x07] & 0x40) << 3);
1243 height
= (height
+ 1) / cheight
;
1249 *pcheight
= cheight
;
1252 typedef unsigned int rgb_to_pixel_dup_func(unsigned int r
, unsigned int g
, unsigned b
);
1254 static rgb_to_pixel_dup_func
*rgb_to_pixel_dup_table
[NB_DEPTHS
] = {
1259 rgb_to_pixel32bgr_dup
,
1260 rgb_to_pixel15bgr_dup
,
1261 rgb_to_pixel16bgr_dup
,
1272 static void vga_draw_text(VGAState
*s
, int full_update
)
1274 int cx
, cy
, cheight
, cw
, ch
, cattr
, height
, width
, ch_attr
;
1275 int cx_min
, cx_max
, linesize
, x_incr
;
1276 uint32_t offset
, fgcol
, bgcol
, v
, cursor_offset
;
1277 uint8_t *d1
, *d
, *src
, *s1
, *dest
, *cursor_ptr
;
1278 const uint8_t *font_ptr
, *font_base
[2];
1279 int dup9
, line_offset
, depth_index
;
1281 uint32_t *ch_attr_ptr
;
1282 vga_draw_glyph8_func
*vga_draw_glyph8
;
1283 vga_draw_glyph9_func
*vga_draw_glyph9
;
1285 /* compute font data address (in plane 2) */
1287 offset
= (((v
>> 4) & 1) | ((v
<< 1) & 6)) * 8192 * 4 + 2;
1288 if (offset
!= s
->font_offsets
[0]) {
1289 s
->font_offsets
[0] = offset
;
1292 font_base
[0] = s
->vram_ptr
+ offset
;
1294 offset
= (((v
>> 5) & 1) | ((v
>> 1) & 6)) * 8192 * 4 + 2;
1295 font_base
[1] = s
->vram_ptr
+ offset
;
1296 if (offset
!= s
->font_offsets
[1]) {
1297 s
->font_offsets
[1] = offset
;
1300 if (s
->plane_updated
& (1 << 2)) {
1301 /* if the plane 2 was modified since the last display, it
1302 indicates the font may have been modified */
1303 s
->plane_updated
= 0;
1306 full_update
|= update_basic_params(s
);
1308 line_offset
= s
->line_offset
;
1309 s1
= s
->vram_ptr
+ (s
->start_addr
* 4);
1311 vga_get_text_resolution(s
, &width
, &height
, &cw
, &cheight
);
1312 x_incr
= cw
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1313 if ((height
* width
) > CH_ATTR_SIZE
) {
1314 /* better than nothing: exit if transient size is too big */
1318 if (width
!= s
->last_width
|| height
!= s
->last_height
||
1319 cw
!= s
->last_cw
|| cheight
!= s
->last_ch
|| s
->last_depth
) {
1320 s
->last_scr_width
= width
* cw
;
1321 s
->last_scr_height
= height
* cheight
;
1322 qemu_console_resize(s
->ds
, s
->last_scr_width
, s
->last_scr_height
);
1324 s
->last_width
= width
;
1325 s
->last_height
= height
;
1326 s
->last_ch
= cheight
;
1331 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1332 full_update
|= update_palette16(s
);
1333 palette
= s
->last_palette
;
1334 x_incr
= cw
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1336 cursor_offset
= ((s
->cr
[0x0e] << 8) | s
->cr
[0x0f]) - s
->start_addr
;
1337 if (cursor_offset
!= s
->cursor_offset
||
1338 s
->cr
[0xa] != s
->cursor_start
||
1339 s
->cr
[0xb] != s
->cursor_end
) {
1340 /* if the cursor position changed, we update the old and new
1342 if (s
->cursor_offset
< CH_ATTR_SIZE
)
1343 s
->last_ch_attr
[s
->cursor_offset
] = -1;
1344 if (cursor_offset
< CH_ATTR_SIZE
)
1345 s
->last_ch_attr
[cursor_offset
] = -1;
1346 s
->cursor_offset
= cursor_offset
;
1347 s
->cursor_start
= s
->cr
[0xa];
1348 s
->cursor_end
= s
->cr
[0xb];
1350 cursor_ptr
= s
->vram_ptr
+ (s
->start_addr
+ cursor_offset
) * 4;
1352 depth_index
= get_depth_index(s
->ds
);
1354 vga_draw_glyph8
= vga_draw_glyph16_table
[depth_index
];
1356 vga_draw_glyph8
= vga_draw_glyph8_table
[depth_index
];
1357 vga_draw_glyph9
= vga_draw_glyph9_table
[depth_index
];
1359 dest
= ds_get_data(s
->ds
);
1360 linesize
= ds_get_linesize(s
->ds
);
1361 ch_attr_ptr
= s
->last_ch_attr
;
1362 for(cy
= 0; cy
< height
; cy
++) {
1367 for(cx
= 0; cx
< width
; cx
++) {
1368 ch_attr
= *(uint16_t *)src
;
1369 if (full_update
|| ch_attr
!= *ch_attr_ptr
) {
1374 *ch_attr_ptr
= ch_attr
;
1375 #ifdef HOST_WORDS_BIGENDIAN
1377 cattr
= ch_attr
& 0xff;
1379 ch
= ch_attr
& 0xff;
1380 cattr
= ch_attr
>> 8;
1382 font_ptr
= font_base
[(cattr
>> 3) & 1];
1383 font_ptr
+= 32 * 4 * ch
;
1384 bgcol
= palette
[cattr
>> 4];
1385 fgcol
= palette
[cattr
& 0x0f];
1387 vga_draw_glyph8(d1
, linesize
,
1388 font_ptr
, cheight
, fgcol
, bgcol
);
1391 if (ch
>= 0xb0 && ch
<= 0xdf && (s
->ar
[0x10] & 0x04))
1393 vga_draw_glyph9(d1
, linesize
,
1394 font_ptr
, cheight
, fgcol
, bgcol
, dup9
);
1396 if (src
== cursor_ptr
&&
1397 !(s
->cr
[0x0a] & 0x20)) {
1398 int line_start
, line_last
, h
;
1399 /* draw the cursor */
1400 line_start
= s
->cr
[0x0a] & 0x1f;
1401 line_last
= s
->cr
[0x0b] & 0x1f;
1402 /* XXX: check that */
1403 if (line_last
> cheight
- 1)
1404 line_last
= cheight
- 1;
1405 if (line_last
>= line_start
&& line_start
< cheight
) {
1406 h
= line_last
- line_start
+ 1;
1407 d
= d1
+ linesize
* line_start
;
1409 vga_draw_glyph8(d
, linesize
,
1410 cursor_glyph
, h
, fgcol
, bgcol
);
1412 vga_draw_glyph9(d
, linesize
,
1413 cursor_glyph
, h
, fgcol
, bgcol
, 1);
1423 dpy_update(s
->ds
, cx_min
* cw
, cy
* cheight
,
1424 (cx_max
- cx_min
+ 1) * cw
, cheight
);
1426 dest
+= linesize
* cheight
;
1445 static vga_draw_line_func
*vga_draw_line_table
[NB_DEPTHS
* VGA_DRAW_LINE_NB
] = {
1455 vga_draw_line2d2_16
,
1456 vga_draw_line2d2_16
,
1457 vga_draw_line2d2_32
,
1458 vga_draw_line2d2_32
,
1459 vga_draw_line2d2_16
,
1460 vga_draw_line2d2_16
,
1471 vga_draw_line4d2_16
,
1472 vga_draw_line4d2_16
,
1473 vga_draw_line4d2_32
,
1474 vga_draw_line4d2_32
,
1475 vga_draw_line4d2_16
,
1476 vga_draw_line4d2_16
,
1479 vga_draw_line8d2_16
,
1480 vga_draw_line8d2_16
,
1481 vga_draw_line8d2_32
,
1482 vga_draw_line8d2_32
,
1483 vga_draw_line8d2_16
,
1484 vga_draw_line8d2_16
,
1498 vga_draw_line15_32bgr
,
1499 vga_draw_line15_15bgr
,
1500 vga_draw_line15_16bgr
,
1506 vga_draw_line16_32bgr
,
1507 vga_draw_line16_15bgr
,
1508 vga_draw_line16_16bgr
,
1514 vga_draw_line24_32bgr
,
1515 vga_draw_line24_15bgr
,
1516 vga_draw_line24_16bgr
,
1522 vga_draw_line32_32bgr
,
1523 vga_draw_line32_15bgr
,
1524 vga_draw_line32_16bgr
,
1527 static int vga_get_bpp(VGAState
*s
)
1530 #ifdef CONFIG_BOCHS_VBE
1531 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1532 ret
= s
->vbe_regs
[VBE_DISPI_INDEX_BPP
];
1541 static void vga_get_resolution(VGAState
*s
, int *pwidth
, int *pheight
)
1545 #ifdef CONFIG_BOCHS_VBE
1546 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1547 width
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
];
1548 height
= s
->vbe_regs
[VBE_DISPI_INDEX_YRES
];
1552 width
= (s
->cr
[0x01] + 1) * 8;
1553 height
= s
->cr
[0x12] |
1554 ((s
->cr
[0x07] & 0x02) << 7) |
1555 ((s
->cr
[0x07] & 0x40) << 3);
1556 height
= (height
+ 1);
1562 void vga_invalidate_scanlines(VGAState
*s
, int y1
, int y2
)
1565 if (y1
>= VGA_MAX_HEIGHT
)
1567 if (y2
>= VGA_MAX_HEIGHT
)
1568 y2
= VGA_MAX_HEIGHT
;
1569 for(y
= y1
; y
< y2
; y
++) {
1570 s
->invalidated_y_table
[y
>> 5] |= 1 << (y
& 0x1f);
1574 static void vga_sync_dirty_bitmap(VGAState
*s
)
1577 cpu_physical_sync_dirty_bitmap(s
->map_addr
, s
->map_end
);
1579 if (s
->lfb_vram_mapped
) {
1580 cpu_physical_sync_dirty_bitmap(isa_mem_base
+ 0xa0000, 0xa8000);
1581 cpu_physical_sync_dirty_bitmap(isa_mem_base
+ 0xa8000, 0xb0000);
1588 static void vga_draw_graphic(VGAState
*s
, int full_update
)
1590 int y1
, y
, update
, linesize
, y_start
, double_scan
, mask
, depth
;
1591 int width
, height
, shift_control
, line_offset
, bwidth
, bits
;
1592 ram_addr_t page0
, page1
, page_min
, page_max
;
1593 int disp_width
, multi_scan
, multi_run
;
1595 uint32_t v
, addr1
, addr
;
1596 vga_draw_line_func
*vga_draw_line
;
1598 full_update
|= update_basic_params(s
);
1601 vga_sync_dirty_bitmap(s
);
1603 s
->get_resolution(s
, &width
, &height
);
1606 shift_control
= (s
->gr
[0x05] >> 5) & 3;
1607 double_scan
= (s
->cr
[0x09] >> 7);
1608 if (shift_control
!= 1) {
1609 multi_scan
= (((s
->cr
[0x09] & 0x1f) + 1) << double_scan
) - 1;
1611 /* in CGA modes, multi_scan is ignored */
1612 /* XXX: is it correct ? */
1613 multi_scan
= double_scan
;
1615 multi_run
= multi_scan
;
1616 if (shift_control
!= s
->shift_control
||
1617 double_scan
!= s
->double_scan
) {
1619 s
->shift_control
= shift_control
;
1620 s
->double_scan
= double_scan
;
1623 if (shift_control
== 0) {
1624 if (s
->sr
[0x01] & 8) {
1627 } else if (shift_control
== 1) {
1628 if (s
->sr
[0x01] & 8) {
1633 depth
= s
->get_bpp(s
);
1634 if (s
->line_offset
!= s
->last_line_offset
||
1635 disp_width
!= s
->last_width
||
1636 height
!= s
->last_height
||
1637 s
->last_depth
!= depth
) {
1638 #if defined(HOST_WORDS_BIGENDIAN) == defined(TARGET_WORDS_BIGENDIAN)
1639 if (depth
== 16 || depth
== 32) {
1643 qemu_free_displaysurface(s
->ds
);
1644 s
->ds
->surface
= qemu_create_displaysurface_from(disp_width
, height
, depth
,
1646 s
->vram_ptr
+ (s
->start_addr
* 4));
1647 #if defined(HOST_WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
1648 s
->ds
->surface
->pf
= qemu_different_endianness_pixelformat(depth
);
1652 qemu_console_resize(s
->ds
, disp_width
, height
);
1654 s
->last_scr_width
= disp_width
;
1655 s
->last_scr_height
= height
;
1656 s
->last_width
= disp_width
;
1657 s
->last_height
= height
;
1658 s
->last_line_offset
= s
->line_offset
;
1659 s
->last_depth
= depth
;
1661 } else if (is_buffer_shared(s
->ds
->surface
) &&
1662 (full_update
|| s
->ds
->surface
->data
!= s
->vram_ptr
+ (s
->start_addr
* 4))) {
1663 s
->ds
->surface
->data
= s
->vram_ptr
+ (s
->start_addr
* 4);
1668 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1670 if (shift_control
== 0) {
1671 full_update
|= update_palette16(s
);
1672 if (s
->sr
[0x01] & 8) {
1673 v
= VGA_DRAW_LINE4D2
;
1678 } else if (shift_control
== 1) {
1679 full_update
|= update_palette16(s
);
1680 if (s
->sr
[0x01] & 8) {
1681 v
= VGA_DRAW_LINE2D2
;
1687 switch(s
->get_bpp(s
)) {
1690 full_update
|= update_palette256(s
);
1691 v
= VGA_DRAW_LINE8D2
;
1695 full_update
|= update_palette256(s
);
1700 v
= VGA_DRAW_LINE15
;
1704 v
= VGA_DRAW_LINE16
;
1708 v
= VGA_DRAW_LINE24
;
1712 v
= VGA_DRAW_LINE32
;
1717 vga_draw_line
= vga_draw_line_table
[v
* NB_DEPTHS
+ get_depth_index(s
->ds
)];
1719 if (!is_buffer_shared(s
->ds
->surface
) && s
->cursor_invalidate
)
1720 s
->cursor_invalidate(s
);
1722 line_offset
= s
->line_offset
;
1724 printf("w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x\n",
1725 width
, height
, v
, line_offset
, s
->cr
[9], s
->cr
[0x17], s
->line_compare
, s
->sr
[0x01]);
1727 addr1
= (s
->start_addr
* 4);
1728 bwidth
= (width
* bits
+ 7) / 8;
1732 d
= ds_get_data(s
->ds
);
1733 linesize
= ds_get_linesize(s
->ds
);
1735 for(y
= 0; y
< height
; y
++) {
1737 if (!(s
->cr
[0x17] & 1)) {
1739 /* CGA compatibility handling */
1740 shift
= 14 + ((s
->cr
[0x17] >> 6) & 1);
1741 addr
= (addr
& ~(1 << shift
)) | ((y1
& 1) << shift
);
1743 if (!(s
->cr
[0x17] & 2)) {
1744 addr
= (addr
& ~0x8000) | ((y1
& 2) << 14);
1746 page0
= s
->vram_offset
+ (addr
& TARGET_PAGE_MASK
);
1747 page1
= s
->vram_offset
+ ((addr
+ bwidth
- 1) & TARGET_PAGE_MASK
);
1748 update
= full_update
|
1749 cpu_physical_memory_get_dirty(page0
, VGA_DIRTY_FLAG
) |
1750 cpu_physical_memory_get_dirty(page1
, VGA_DIRTY_FLAG
);
1751 if ((page1
- page0
) > TARGET_PAGE_SIZE
) {
1752 /* if wide line, can use another page */
1753 update
|= cpu_physical_memory_get_dirty(page0
+ TARGET_PAGE_SIZE
,
1756 /* explicit invalidation for the hardware cursor */
1757 update
|= (s
->invalidated_y_table
[y
>> 5] >> (y
& 0x1f)) & 1;
1761 if (page0
< page_min
)
1763 if (page1
> page_max
)
1765 if (!(is_buffer_shared(s
->ds
->surface
))) {
1766 vga_draw_line(s
, d
, s
->vram_ptr
+ addr
, width
);
1767 if (s
->cursor_draw_line
)
1768 s
->cursor_draw_line(s
, d
, y
);
1772 /* flush to display */
1773 dpy_update(s
->ds
, 0, y_start
,
1774 disp_width
, y
- y_start
);
1779 mask
= (s
->cr
[0x17] & 3) ^ 3;
1780 if ((y1
& mask
) == mask
)
1781 addr1
+= line_offset
;
1783 multi_run
= multi_scan
;
1787 /* line compare acts on the displayed lines */
1788 if (y
== s
->line_compare
)
1793 /* flush to display */
1794 dpy_update(s
->ds
, 0, y_start
,
1795 disp_width
, y
- y_start
);
1797 /* reset modified pages */
1798 if (page_max
>= page_min
) {
1799 cpu_physical_memory_reset_dirty(page_min
, page_max
+ TARGET_PAGE_SIZE
,
1802 memset(s
->invalidated_y_table
, 0, ((height
+ 31) >> 5) * 4);
1805 static void vga_draw_blank(VGAState
*s
, int full_update
)
1812 if (s
->last_scr_width
<= 0 || s
->last_scr_height
<= 0)
1816 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1817 if (ds_get_bits_per_pixel(s
->ds
) == 8)
1818 val
= s
->rgb_to_pixel(0, 0, 0);
1821 w
= s
->last_scr_width
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1822 d
= ds_get_data(s
->ds
);
1823 for(i
= 0; i
< s
->last_scr_height
; i
++) {
1825 d
+= ds_get_linesize(s
->ds
);
1827 dpy_update(s
->ds
, 0, 0,
1828 s
->last_scr_width
, s
->last_scr_height
);
1831 #define GMODE_TEXT 0
1832 #define GMODE_GRAPH 1
1833 #define GMODE_BLANK 2
1835 static void vga_update_display(void *opaque
)
1837 VGAState
*s
= opaque
;
1838 int full_update
, graphic_mode
;
1840 if (ds_get_bits_per_pixel(s
->ds
) == 0) {
1843 full_update
= s
->full_update
;
1845 if (!(s
->ar_index
& 0x20)) {
1846 graphic_mode
= GMODE_BLANK
;
1848 graphic_mode
= s
->gr
[6] & 1;
1850 if (graphic_mode
!= s
->graphic_mode
) {
1851 s
->graphic_mode
= graphic_mode
;
1854 switch(graphic_mode
) {
1856 vga_draw_text(s
, full_update
);
1859 vga_draw_graphic(s
, full_update
);
1863 vga_draw_blank(s
, full_update
);
1869 /* force a full display refresh */
1870 static void vga_invalidate_display(void *opaque
)
1872 VGAState
*s
= opaque
;
1877 void vga_common_reset(VGACommonState
*s
)
1883 s
->lfb_vram_mapped
= 0;
1887 memset(s
->sr
, '\0', sizeof(s
->sr
));
1889 memset(s
->gr
, '\0', sizeof(s
->gr
));
1891 memset(s
->ar
, '\0', sizeof(s
->ar
));
1892 s
->ar_flip_flop
= 0;
1894 memset(s
->cr
, '\0', sizeof(s
->cr
));
1900 s
->dac_sub_index
= 0;
1901 s
->dac_read_index
= 0;
1902 s
->dac_write_index
= 0;
1903 memset(s
->dac_cache
, '\0', sizeof(s
->dac_cache
));
1905 memset(s
->palette
, '\0', sizeof(s
->palette
));
1907 #ifdef CONFIG_BOCHS_VBE
1909 memset(s
->vbe_regs
, '\0', sizeof(s
->vbe_regs
));
1910 s
->vbe_regs
[VBE_DISPI_INDEX_ID
] = VBE_DISPI_ID0
;
1911 s
->vbe_start_addr
= 0;
1912 s
->vbe_line_offset
= 0;
1913 s
->vbe_bank_mask
= (s
->vram_size
>> 16) - 1;
1915 memset(s
->font_offsets
, '\0', sizeof(s
->font_offsets
));
1916 s
->graphic_mode
= -1; /* force full update */
1917 s
->shift_control
= 0;
1920 s
->line_compare
= 0;
1922 s
->plane_updated
= 0;
1927 s
->last_scr_width
= 0;
1928 s
->last_scr_height
= 0;
1929 s
->cursor_start
= 0;
1931 s
->cursor_offset
= 0;
1932 memset(s
->invalidated_y_table
, '\0', sizeof(s
->invalidated_y_table
));
1933 memset(s
->last_palette
, '\0', sizeof(s
->last_palette
));
1934 memset(s
->last_ch_attr
, '\0', sizeof(s
->last_ch_attr
));
1935 switch (vga_retrace_method
) {
1936 case VGA_RETRACE_DUMB
:
1938 case VGA_RETRACE_PRECISE
:
1939 memset(&s
->retrace_info
, 0, sizeof (s
->retrace_info
));
1944 static void vga_reset(void *opaque
)
1946 VGAState
*s
= opaque
;
1947 vga_common_reset(s
);
1950 #define TEXTMODE_X(x) ((x) % width)
1951 #define TEXTMODE_Y(x) ((x) / width)
1952 #define VMEM2CHTYPE(v) ((v & 0xff0007ff) | \
1953 ((v & 0x00000800) << 10) | ((v & 0x00007000) >> 1))
1954 /* relay text rendering to the display driver
1955 * instead of doing a full vga_update_display() */
1956 static void vga_update_text(void *opaque
, console_ch_t
*chardata
)
1958 VGAState
*s
= opaque
;
1959 int graphic_mode
, i
, cursor_offset
, cursor_visible
;
1960 int cw
, cheight
, width
, height
, size
, c_min
, c_max
;
1962 console_ch_t
*dst
, val
;
1963 char msg_buffer
[80];
1964 int full_update
= 0;
1966 if (!(s
->ar_index
& 0x20)) {
1967 graphic_mode
= GMODE_BLANK
;
1969 graphic_mode
= s
->gr
[6] & 1;
1971 if (graphic_mode
!= s
->graphic_mode
) {
1972 s
->graphic_mode
= graphic_mode
;
1975 if (s
->last_width
== -1) {
1980 switch (graphic_mode
) {
1982 /* TODO: update palette */
1983 full_update
|= update_basic_params(s
);
1985 /* total width & height */
1986 cheight
= (s
->cr
[9] & 0x1f) + 1;
1988 if (!(s
->sr
[1] & 0x01))
1990 if (s
->sr
[1] & 0x08)
1991 cw
= 16; /* NOTE: no 18 pixel wide */
1992 width
= (s
->cr
[0x01] + 1);
1993 if (s
->cr
[0x06] == 100) {
1994 /* ugly hack for CGA 160x100x16 - explain me the logic */
1997 height
= s
->cr
[0x12] |
1998 ((s
->cr
[0x07] & 0x02) << 7) |
1999 ((s
->cr
[0x07] & 0x40) << 3);
2000 height
= (height
+ 1) / cheight
;
2003 size
= (height
* width
);
2004 if (size
> CH_ATTR_SIZE
) {
2008 snprintf(msg_buffer
, sizeof(msg_buffer
), "%i x %i Text mode",
2013 if (width
!= s
->last_width
|| height
!= s
->last_height
||
2014 cw
!= s
->last_cw
|| cheight
!= s
->last_ch
) {
2015 s
->last_scr_width
= width
* cw
;
2016 s
->last_scr_height
= height
* cheight
;
2017 s
->ds
->surface
->width
= width
;
2018 s
->ds
->surface
->height
= height
;
2020 s
->last_width
= width
;
2021 s
->last_height
= height
;
2022 s
->last_ch
= cheight
;
2027 /* Update "hardware" cursor */
2028 cursor_offset
= ((s
->cr
[0x0e] << 8) | s
->cr
[0x0f]) - s
->start_addr
;
2029 if (cursor_offset
!= s
->cursor_offset
||
2030 s
->cr
[0xa] != s
->cursor_start
||
2031 s
->cr
[0xb] != s
->cursor_end
|| full_update
) {
2032 cursor_visible
= !(s
->cr
[0xa] & 0x20);
2033 if (cursor_visible
&& cursor_offset
< size
&& cursor_offset
>= 0)
2035 TEXTMODE_X(cursor_offset
),
2036 TEXTMODE_Y(cursor_offset
));
2038 dpy_cursor(s
->ds
, -1, -1);
2039 s
->cursor_offset
= cursor_offset
;
2040 s
->cursor_start
= s
->cr
[0xa];
2041 s
->cursor_end
= s
->cr
[0xb];
2044 src
= (uint32_t *) s
->vram_ptr
+ s
->start_addr
;
2048 for (i
= 0; i
< size
; src
++, dst
++, i
++)
2049 console_write_ch(dst
, VMEM2CHTYPE(*src
));
2051 dpy_update(s
->ds
, 0, 0, width
, height
);
2055 for (i
= 0; i
< size
; src
++, dst
++, i
++) {
2056 console_write_ch(&val
, VMEM2CHTYPE(*src
));
2064 for (; i
< size
; src
++, dst
++, i
++) {
2065 console_write_ch(&val
, VMEM2CHTYPE(*src
));
2072 if (c_min
<= c_max
) {
2073 i
= TEXTMODE_Y(c_min
);
2074 dpy_update(s
->ds
, 0, i
, width
, TEXTMODE_Y(c_max
) - i
+ 1);
2083 s
->get_resolution(s
, &width
, &height
);
2084 snprintf(msg_buffer
, sizeof(msg_buffer
), "%i x %i Graphic mode",
2092 snprintf(msg_buffer
, sizeof(msg_buffer
), "VGA Blank mode");
2096 /* Display a message */
2098 s
->last_height
= height
= 3;
2099 dpy_cursor(s
->ds
, -1, -1);
2100 s
->ds
->surface
->width
= s
->last_width
;
2101 s
->ds
->surface
->height
= height
;
2104 for (dst
= chardata
, i
= 0; i
< s
->last_width
* height
; i
++)
2105 console_write_ch(dst
++, ' ');
2107 size
= strlen(msg_buffer
);
2108 width
= (s
->last_width
- size
) / 2;
2109 dst
= chardata
+ s
->last_width
+ width
;
2110 for (i
= 0; i
< size
; i
++)
2111 console_write_ch(dst
++, 0x00200100 | msg_buffer
[i
]);
2113 dpy_update(s
->ds
, 0, 0, s
->last_width
, height
);
2116 static CPUReadMemoryFunc
* const vga_mem_read
[3] = {
2122 static CPUWriteMemoryFunc
* const vga_mem_write
[3] = {
2128 void vga_common_save(QEMUFile
*f
, void *opaque
)
2130 VGACommonState
*s
= opaque
;
2133 qemu_put_be32s(f
, &s
->latch
);
2134 qemu_put_8s(f
, &s
->sr_index
);
2135 qemu_put_buffer(f
, s
->sr
, 8);
2136 qemu_put_8s(f
, &s
->gr_index
);
2137 qemu_put_buffer(f
, s
->gr
, 16);
2138 qemu_put_8s(f
, &s
->ar_index
);
2139 qemu_put_buffer(f
, s
->ar
, 21);
2140 qemu_put_be32(f
, s
->ar_flip_flop
);
2141 qemu_put_8s(f
, &s
->cr_index
);
2142 qemu_put_buffer(f
, s
->cr
, 256);
2143 qemu_put_8s(f
, &s
->msr
);
2144 qemu_put_8s(f
, &s
->fcr
);
2145 qemu_put_byte(f
, s
->st00
);
2146 qemu_put_8s(f
, &s
->st01
);
2148 qemu_put_8s(f
, &s
->dac_state
);
2149 qemu_put_8s(f
, &s
->dac_sub_index
);
2150 qemu_put_8s(f
, &s
->dac_read_index
);
2151 qemu_put_8s(f
, &s
->dac_write_index
);
2152 qemu_put_buffer(f
, s
->dac_cache
, 3);
2153 qemu_put_buffer(f
, s
->palette
, 768);
2155 qemu_put_be32(f
, s
->bank_offset
);
2156 #ifdef CONFIG_BOCHS_VBE
2157 qemu_put_byte(f
, 1);
2158 qemu_put_be16s(f
, &s
->vbe_index
);
2159 for(i
= 0; i
< VBE_DISPI_INDEX_NB
; i
++)
2160 qemu_put_be16s(f
, &s
->vbe_regs
[i
]);
2161 qemu_put_be32s(f
, &s
->vbe_start_addr
);
2162 qemu_put_be32s(f
, &s
->vbe_line_offset
);
2163 qemu_put_be32s(f
, &s
->vbe_bank_mask
);
2165 qemu_put_byte(f
, 0);
2169 int vga_common_load(QEMUFile
*f
, void *opaque
, int version_id
)
2171 VGACommonState
*s
= opaque
;
2177 qemu_get_be32s(f
, &s
->latch
);
2178 qemu_get_8s(f
, &s
->sr_index
);
2179 qemu_get_buffer(f
, s
->sr
, 8);
2180 qemu_get_8s(f
, &s
->gr_index
);
2181 qemu_get_buffer(f
, s
->gr
, 16);
2182 qemu_get_8s(f
, &s
->ar_index
);
2183 qemu_get_buffer(f
, s
->ar
, 21);
2184 s
->ar_flip_flop
=qemu_get_be32(f
);
2185 qemu_get_8s(f
, &s
->cr_index
);
2186 qemu_get_buffer(f
, s
->cr
, 256);
2187 qemu_get_8s(f
, &s
->msr
);
2188 qemu_get_8s(f
, &s
->fcr
);
2189 qemu_get_8s(f
, &s
->st00
);
2190 qemu_get_8s(f
, &s
->st01
);
2192 qemu_get_8s(f
, &s
->dac_state
);
2193 qemu_get_8s(f
, &s
->dac_sub_index
);
2194 qemu_get_8s(f
, &s
->dac_read_index
);
2195 qemu_get_8s(f
, &s
->dac_write_index
);
2196 qemu_get_buffer(f
, s
->dac_cache
, 3);
2197 qemu_get_buffer(f
, s
->palette
, 768);
2199 s
->bank_offset
=qemu_get_be32(f
);
2200 is_vbe
= qemu_get_byte(f
);
2201 #ifdef CONFIG_BOCHS_VBE
2204 qemu_get_be16s(f
, &s
->vbe_index
);
2205 for(i
= 0; i
< VBE_DISPI_INDEX_NB
; i
++)
2206 qemu_get_be16s(f
, &s
->vbe_regs
[i
]);
2207 qemu_get_be32s(f
, &s
->vbe_start_addr
);
2208 qemu_get_be32s(f
, &s
->vbe_line_offset
);
2209 qemu_get_be32s(f
, &s
->vbe_bank_mask
);
2216 s
->graphic_mode
= -1;
2220 void vga_common_init(VGACommonState
*s
, int vga_ram_size
)
2224 for(i
= 0;i
< 256; i
++) {
2226 for(j
= 0; j
< 8; j
++) {
2227 v
|= ((i
>> j
) & 1) << (j
* 4);
2232 for(j
= 0; j
< 4; j
++) {
2233 v
|= ((i
>> (2 * j
)) & 3) << (j
* 4);
2237 for(i
= 0; i
< 16; i
++) {
2239 for(j
= 0; j
< 4; j
++) {
2242 v
|= b
<< (2 * j
+ 1);
2247 s
->vram_offset
= qemu_ram_alloc(vga_ram_size
);
2248 s
->vram_ptr
= qemu_get_ram_ptr(s
->vram_offset
);
2249 s
->vram_size
= vga_ram_size
;
2250 s
->get_bpp
= vga_get_bpp
;
2251 s
->get_offsets
= vga_get_offsets
;
2252 s
->get_resolution
= vga_get_resolution
;
2253 s
->update
= vga_update_display
;
2254 s
->invalidate
= vga_invalidate_display
;
2255 s
->screen_dump
= vga_screen_dump
;
2256 s
->text_update
= vga_update_text
;
2257 switch (vga_retrace_method
) {
2258 case VGA_RETRACE_DUMB
:
2259 s
->retrace
= vga_dumb_retrace
;
2260 s
->update_retrace_info
= vga_dumb_update_retrace_info
;
2263 case VGA_RETRACE_PRECISE
:
2264 s
->retrace
= vga_precise_retrace
;
2265 s
->update_retrace_info
= vga_precise_update_retrace_info
;
2271 /* used by both ISA and PCI */
2272 void vga_init(VGAState
*s
)
2276 qemu_register_reset(vga_reset
, s
);
2278 register_ioport_write(0x3c0, 16, 1, vga_ioport_write
, s
);
2280 register_ioport_write(0x3b4, 2, 1, vga_ioport_write
, s
);
2281 register_ioport_write(0x3d4, 2, 1, vga_ioport_write
, s
);
2282 register_ioport_write(0x3ba, 1, 1, vga_ioport_write
, s
);
2283 register_ioport_write(0x3da, 1, 1, vga_ioport_write
, s
);
2285 register_ioport_read(0x3c0, 16, 1, vga_ioport_read
, s
);
2287 register_ioport_read(0x3b4, 2, 1, vga_ioport_read
, s
);
2288 register_ioport_read(0x3d4, 2, 1, vga_ioport_read
, s
);
2289 register_ioport_read(0x3ba, 1, 1, vga_ioport_read
, s
);
2290 register_ioport_read(0x3da, 1, 1, vga_ioport_read
, s
);
2293 #ifdef CONFIG_BOCHS_VBE
2294 #if defined (TARGET_I386)
2295 register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index
, s
);
2296 register_ioport_read(0x1cf, 1, 2, vbe_ioport_read_data
, s
);
2298 register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index
, s
);
2299 register_ioport_write(0x1cf, 1, 2, vbe_ioport_write_data
, s
);
2301 /* old Bochs IO ports */
2302 register_ioport_read(0xff80, 1, 2, vbe_ioport_read_index
, s
);
2303 register_ioport_read(0xff81, 1, 2, vbe_ioport_read_data
, s
);
2305 register_ioport_write(0xff80, 1, 2, vbe_ioport_write_index
, s
);
2306 register_ioport_write(0xff81, 1, 2, vbe_ioport_write_data
, s
);
2308 register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index
, s
);
2309 register_ioport_read(0x1d0, 1, 2, vbe_ioport_read_data
, s
);
2311 register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index
, s
);
2312 register_ioport_write(0x1d0, 1, 2, vbe_ioport_write_data
, s
);
2314 #endif /* CONFIG_BOCHS_VBE */
2316 vga_io_memory
= cpu_register_io_memory(vga_mem_read
, vga_mem_write
, s
);
2317 cpu_register_physical_memory(isa_mem_base
+ 0x000a0000, 0x20000,
2319 qemu_register_coalesced_mmio(isa_mem_base
+ 0x000a0000, 0x20000);
2322 /* Memory mapped interface */
2323 static uint32_t vga_mm_readb (void *opaque
, target_phys_addr_t addr
)
2325 VGAState
*s
= opaque
;
2327 return vga_ioport_read(s
, addr
>> s
->it_shift
) & 0xff;
2330 static void vga_mm_writeb (void *opaque
,
2331 target_phys_addr_t addr
, uint32_t value
)
2333 VGAState
*s
= opaque
;
2335 vga_ioport_write(s
, addr
>> s
->it_shift
, value
& 0xff);
2338 static uint32_t vga_mm_readw (void *opaque
, target_phys_addr_t addr
)
2340 VGAState
*s
= opaque
;
2342 return vga_ioport_read(s
, addr
>> s
->it_shift
) & 0xffff;
2345 static void vga_mm_writew (void *opaque
,
2346 target_phys_addr_t addr
, uint32_t value
)
2348 VGAState
*s
= opaque
;
2350 vga_ioport_write(s
, addr
>> s
->it_shift
, value
& 0xffff);
2353 static uint32_t vga_mm_readl (void *opaque
, target_phys_addr_t addr
)
2355 VGAState
*s
= opaque
;
2357 return vga_ioport_read(s
, addr
>> s
->it_shift
);
2360 static void vga_mm_writel (void *opaque
,
2361 target_phys_addr_t addr
, uint32_t value
)
2363 VGAState
*s
= opaque
;
2365 vga_ioport_write(s
, addr
>> s
->it_shift
, value
);
2368 static CPUReadMemoryFunc
* const vga_mm_read_ctrl
[] = {
2374 static CPUWriteMemoryFunc
* const vga_mm_write_ctrl
[] = {
2380 static void vga_mm_init(VGAState
*s
, target_phys_addr_t vram_base
,
2381 target_phys_addr_t ctrl_base
, int it_shift
)
2383 int s_ioport_ctrl
, vga_io_memory
;
2385 s
->it_shift
= it_shift
;
2386 s_ioport_ctrl
= cpu_register_io_memory(vga_mm_read_ctrl
, vga_mm_write_ctrl
, s
);
2387 vga_io_memory
= cpu_register_io_memory(vga_mem_read
, vga_mem_write
, s
);
2389 register_savevm("vga", 0, 2, vga_common_save
, vga_common_load
, s
);
2391 cpu_register_physical_memory(ctrl_base
, 0x100000, s_ioport_ctrl
);
2393 cpu_register_physical_memory(vram_base
+ 0x000a0000, 0x20000, vga_io_memory
);
2394 qemu_register_coalesced_mmio(vram_base
+ 0x000a0000, 0x20000);
2397 int isa_vga_mm_init(target_phys_addr_t vram_base
,
2398 target_phys_addr_t ctrl_base
, int it_shift
)
2402 s
= qemu_mallocz(sizeof(VGAState
));
2404 vga_common_init(s
, VGA_RAM_SIZE
);
2405 vga_mm_init(s
, vram_base
, ctrl_base
, it_shift
);
2407 s
->ds
= graphic_console_init(s
->update
, s
->invalidate
,
2408 s
->screen_dump
, s
->text_update
, s
);
2410 #ifdef CONFIG_BOCHS_VBE
2411 /* XXX: use optimized standard vga accesses */
2412 cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS
,
2413 VGA_RAM_SIZE
, s
->vram_offset
);
2418 /********************************************************/
2419 /* vga screen dump */
2421 static void vga_save_dpy_update(DisplayState
*ds
,
2422 int x
, int y
, int w
, int h
)
2424 if (screen_dump_filename
) {
2425 ppm_save(screen_dump_filename
, ds
->surface
);
2426 screen_dump_filename
= NULL
;
2430 static void vga_save_dpy_resize(DisplayState
*s
)
2434 static void vga_save_dpy_refresh(DisplayState
*s
)
2438 int ppm_save(const char *filename
, struct DisplaySurface
*ds
)
2446 f
= fopen(filename
, "wb");
2449 fprintf(f
, "P6\n%d %d\n%d\n",
2450 ds
->width
, ds
->height
, 255);
2452 for(y
= 0; y
< ds
->height
; y
++) {
2454 for(x
= 0; x
< ds
->width
; x
++) {
2455 if (ds
->pf
.bits_per_pixel
== 32)
2458 v
= (uint32_t) (*(uint16_t *)d
);
2459 r
= ((v
>> ds
->pf
.rshift
) & ds
->pf
.rmax
) * 256 /
2461 g
= ((v
>> ds
->pf
.gshift
) & ds
->pf
.gmax
) * 256 /
2463 b
= ((v
>> ds
->pf
.bshift
) & ds
->pf
.bmax
) * 256 /
2468 d
+= ds
->pf
.bytes_per_pixel
;
2476 static DisplayChangeListener
* vga_screen_dump_init(DisplayState
*ds
)
2478 DisplayChangeListener
*dcl
;
2480 dcl
= qemu_mallocz(sizeof(DisplayChangeListener
));
2481 dcl
->dpy_update
= vga_save_dpy_update
;
2482 dcl
->dpy_resize
= vga_save_dpy_resize
;
2483 dcl
->dpy_refresh
= vga_save_dpy_refresh
;
2484 register_displaychangelistener(ds
, dcl
);
2488 /* save the vga display in a PPM image even if no display is
2490 static void vga_screen_dump(void *opaque
, const char *filename
)
2492 VGAState
*s
= opaque
;
2494 if (!screen_dump_dcl
)
2495 screen_dump_dcl
= vga_screen_dump_init(s
->ds
);
2497 screen_dump_filename
= (char *)filename
;
2498 vga_invalidate_display(s
);