hw/vga_int.h

   1 /*
   2  * QEMU internal VGA defines.
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include <hw/hw.h>
  26 #include "error.h"
  27 #include "memory.h"
  28
  29 #define ST01_V_RETRACE      0x08
  30 #define ST01_DISP_ENABLE    0x01
  31
  32 #define VBE_DISPI_MAX_XRES              16000
  33 #define VBE_DISPI_MAX_YRES              12000
  34 #define VBE_DISPI_MAX_BPP               32
  35
  36 #define VBE_DISPI_INDEX_ID              0x0
  37 #define VBE_DISPI_INDEX_XRES            0x1
  38 #define VBE_DISPI_INDEX_YRES            0x2
  39 #define VBE_DISPI_INDEX_BPP             0x3
  40 #define VBE_DISPI_INDEX_ENABLE          0x4
  41 #define VBE_DISPI_INDEX_BANK            0x5
  42 #define VBE_DISPI_INDEX_VIRT_WIDTH      0x6
  43 #define VBE_DISPI_INDEX_VIRT_HEIGHT     0x7
  44 #define VBE_DISPI_INDEX_X_OFFSET        0x8
  45 #define VBE_DISPI_INDEX_Y_OFFSET        0x9
  46 #define VBE_DISPI_INDEX_NB              0xa /* size of vbe_regs[] */
  47 #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa /* read-only, not in vbe_regs */
  48
  49 #define VBE_DISPI_ID0                   0xB0C0
  50 #define VBE_DISPI_ID1                   0xB0C1
  51 #define VBE_DISPI_ID2                   0xB0C2
  52 #define VBE_DISPI_ID3                   0xB0C3
  53 #define VBE_DISPI_ID4                   0xB0C4
  54 #define VBE_DISPI_ID5                   0xB0C5
  55
  56 #define VBE_DISPI_DISABLED              0x00
  57 #define VBE_DISPI_ENABLED               0x01
  58 #define VBE_DISPI_GETCAPS               0x02
  59 #define VBE_DISPI_8BIT_DAC              0x20
  60 #define VBE_DISPI_LFB_ENABLED           0x40
  61 #define VBE_DISPI_NOCLEARMEM            0x80
  62
  63 #define VBE_DISPI_LFB_PHYSICAL_ADDRESS  0xE0000000
  64
  65 #define CH_ATTR_SIZE (160 * 100)
  66 #define VGA_MAX_HEIGHT 2048
  67
  68 struct vga_precise_retrace {
  69     int64_t ticks_per_char;
  70     int64_t total_chars;
  71     int htotal;
  72     int hstart;
  73     int hend;
  74     int vstart;
  75     int vend;
  76     int freq;
  77 };
  78
  79 union vga_retrace {
  80     struct vga_precise_retrace precise;
  81 };
  82
  83 struct VGACommonState;
  84 typedef uint8_t (* vga_retrace_fn)(struct VGACommonState *s);
  85 typedef void (* vga_update_retrace_info_fn)(struct VGACommonState *s);
  86
  87 typedef struct VGACommonState {
  88     MemoryRegion *legacy_address_space;
  89     uint8_t *vram_ptr;
  90     MemoryRegion vram;
  91     MemoryRegion vram_vbe;
  92     uint32_t vram_size;
  93     uint32_t vram_size_mb; /* property */
  94     uint32_t latch;
  95     MemoryRegion *chain4_alias;
  96     uint8_t sr_index;
  97     uint8_t sr[256];
  98     uint8_t gr_index;
  99     uint8_t gr[256];
 100     uint8_t ar_index;
 101     uint8_t ar[21];
 102     int ar_flip_flop;
 103     uint8_t cr_index;
 104     uint8_t cr[256]; /* CRT registers */
 105     uint8_t msr; /* Misc Output Register */
 106     uint8_t fcr; /* Feature Control Register */
 107     uint8_t st00; /* status 0 */
 108     uint8_t st01; /* status 1 */
 109     uint8_t dac_state;
 110     uint8_t dac_sub_index;
 111     uint8_t dac_read_index;
 112     uint8_t dac_write_index;
 113     uint8_t dac_cache[3]; /* used when writing */
 114     int dac_8bit;
 115     uint8_t palette[768];
 116     int32_t bank_offset;
 117     int (*get_bpp)(struct VGACommonState *s);
 118     void (*get_offsets)(struct VGACommonState *s,
 119                         uint32_t *pline_offset,
 120                         uint32_t *pstart_addr,
 121                         uint32_t *pline_compare);
 122     void (*get_resolution)(struct VGACommonState *s,
 123                         int *pwidth,
 124                         int *pheight);
 125     /* bochs vbe state */
 126     uint16_t vbe_index;
 127     uint16_t vbe_regs[VBE_DISPI_INDEX_NB];
 128     uint32_t vbe_start_addr;
 129     uint32_t vbe_line_offset;
 130     uint32_t vbe_bank_mask;
 131     int vbe_mapped;
 132     /* display refresh support */
 133     DisplayState *ds;
 134     uint32_t font_offsets[2];
 135     int graphic_mode;
 136     uint8_t shift_control;
 137     uint8_t double_scan;
 138     uint32_t line_offset;
 139     uint32_t line_compare;
 140     uint32_t start_addr;
 141     uint32_t plane_updated;
 142     uint32_t last_line_offset;
 143     uint8_t last_cw, last_ch;
 144     uint32_t last_width, last_height; /* in chars or pixels */
 145     uint32_t last_scr_width, last_scr_height; /* in pixels */
 146     uint32_t last_depth; /* in bits */
 147     uint8_t cursor_start, cursor_end;
 148     bool cursor_visible_phase;
 149     int64_t cursor_blink_time;
 150     uint32_t cursor_offset;
 151     unsigned int (*rgb_to_pixel)(unsigned int r,
 152                                  unsigned int g, unsigned b);
 153     vga_hw_update_ptr update;
 154     vga_hw_invalidate_ptr invalidate;
 155     vga_hw_screen_dump_ptr screen_dump;
 156     vga_hw_text_update_ptr text_update;
 157     /* hardware mouse cursor support */
 158     uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
 159     void (*cursor_invalidate)(struct VGACommonState *s);
 160     void (*cursor_draw_line)(struct VGACommonState *s, uint8_t *d, int y);
 161     /* tell for each page if it has been updated since the last time */
 162     uint32_t last_palette[256];
 163     uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
 164     /* retrace */
 165     vga_retrace_fn retrace;
 166     vga_update_retrace_info_fn update_retrace_info;
 167     union vga_retrace retrace_info;
 168     uint8_t is_vbe_vmstate;
 169 } VGACommonState;
 170
 171 static inline int c6_to_8(int v)
 172 {
 173     int b;
 174     v &= 0x3f;
 175     b = v & 1;
 176     return (v << 2) | (b << 1) | b;
 177 }
 178
 179 void vga_common_init(VGACommonState *s);
 180 void vga_init(VGACommonState *s, MemoryRegion *address_space,
 181               MemoryRegion *address_space_io, bool init_vga_ports);
 182 MemoryRegion *vga_init_io(VGACommonState *s,
 183                           const MemoryRegionPortio **vga_ports,
 184                           const MemoryRegionPortio **vbe_ports);
 185 void vga_common_reset(VGACommonState *s);
 186
 187 void vga_dirty_log_start(VGACommonState *s);
 188 void vga_dirty_log_stop(VGACommonState *s);
 189
 190 extern const VMStateDescription vmstate_vga_common;
 191 uint32_t vga_ioport_read(void *opaque, uint32_t addr);
 192 void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val);
 193 uint32_t vga_mem_readb(VGACommonState *s, target_phys_addr_t addr);
 194 void vga_mem_writeb(VGACommonState *s, target_phys_addr_t addr, uint32_t val);
 195 void vga_invalidate_scanlines(VGACommonState *s, int y1, int y2);
 196 void ppm_save(const char *filename, struct DisplaySurface *ds, Error **errp);
 197
 198 int vga_ioport_invalid(VGACommonState *s, uint32_t addr);
 199
 200 void vga_init_vbe(VGACommonState *s, MemoryRegion *address_space);
 201 uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr);
 202 void vbe_ioport_write_index(void *opaque, uint32_t addr, uint32_t val);
 203 void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val);
 204
 205 extern const uint8_t sr_mask[8];
 206 extern const uint8_t gr_mask[16];
 207
 208 #define VGABIOS_FILENAME "vgabios.bin"
 209 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
 210
 211 extern const MemoryRegionOps vga_mem_ops;