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1 /*
2 * Model of Xilinx Virtex5 ML507 PPC-440 refdesign.
3 *
4 * Copyright (c) 2010 Edgar E. Iglesias.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "sysbus.h"
26 #include "hw.h"
27 #include "pc.h"
28 #include "net.h"
29 #include "flash.h"
30 #include "sysemu.h"
31 #include "devices.h"
32 #include "boards.h"
33 #include "device_tree.h"
34 #include "loader.h"
35 #include "elf.h"
36 #include "qemu-log.h"
37
38 #include "ppc.h"
39 #include "ppc4xx.h"
40 #include "ppc440.h"
41 #include "ppc405.h"
42
43 #include "blockdev.h"
44 #include "xilinx.h"
45
46 #define EPAPR_MAGIC (0x45504150)
47 #define FLASH_SIZE (16 * 1024 * 1024)
48
49 static struct boot_info
50 {
51 uint32_t bootstrap_pc;
52 uint32_t cmdline;
53 uint32_t fdt;
54 uint32_t ima_size;
55 void *vfdt;
56 } boot_info;
57
58 /* Create reset TLB entries for BookE, spanning the 32bit addr space. */
59 static void mmubooke_create_initial_mapping(CPUState *env,
60 target_ulong va,
61 target_phys_addr_t pa)
62 {
63 ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];
64
65 tlb->attr = 0;
66 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
67 tlb->size = 1 << 31; /* up to 0x80000000 */
68 tlb->EPN = va & TARGET_PAGE_MASK;
69 tlb->RPN = pa & TARGET_PAGE_MASK;
70 tlb->PID = 0;
71
72 tlb = &env->tlb.tlbe[1];
73 tlb->attr = 0;
74 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
75 tlb->size = 1 << 31; /* up to 0xffffffff */
76 tlb->EPN = 0x80000000 & TARGET_PAGE_MASK;
77 tlb->RPN = 0x80000000 & TARGET_PAGE_MASK;
78 tlb->PID = 0;
79 }
80
81 static CPUState *ppc440_init_xilinx(ram_addr_t *ram_size,
82 int do_init,
83 const char *cpu_model,
84 uint32_t sysclk)
85 {
86 CPUState *env;
87 qemu_irq *irqs;
88
89 env = cpu_init(cpu_model);
90 if (!env) {
91 fprintf(stderr, "Unable to initialize CPU!\n");
92 exit(1);
93 }
94
95 ppc_booke_timers_init(env, sysclk, 0/* no flags */);
96
97 ppc_dcr_init(env, NULL, NULL);
98
99 /* interrupt controller */
100 irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB);
101 irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT];
102 irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT];
103 ppcuic_init(env, irqs, 0x0C0, 0, 1);
104 return env;
105 }
106
107 static void main_cpu_reset(void *opaque)
108 {
109 CPUState *env = opaque;
110 struct boot_info *bi = env->load_info;
111
112 cpu_reset(env);
113 /* Linux Kernel Parameters (passing device tree):
114 * r3: pointer to the fdt
115 * r4: 0
116 * r5: 0
117 * r6: epapr magic
118 * r7: size of IMA in bytes
119 * r8: 0
120 * r9: 0
121 */
122 env->gpr[1] = (16<<20) - 8;
123 /* Provide a device-tree. */
124 env->gpr[3] = bi->fdt;
125 env->nip = bi->bootstrap_pc;
126
127 /* Create a mapping for the kernel. */
128 mmubooke_create_initial_mapping(env, 0, 0);
129 env->gpr[6] = tswap32(EPAPR_MAGIC);
130 env->gpr[7] = bi->ima_size;
131 }
132
133 #define BINARY_DEVICE_TREE_FILE "virtex-ml507.dtb"
134 static int xilinx_load_device_tree(target_phys_addr_t addr,
135 uint32_t ramsize,
136 target_phys_addr_t initrd_base,
137 target_phys_addr_t initrd_size,
138 const char *kernel_cmdline)
139 {
140 char *path;
141 int fdt_size;
142 #ifdef CONFIG_FDT
143 void *fdt;
144 int r;
145
146 /* Try the local "ppc.dtb" override. */
147 fdt = load_device_tree("ppc.dtb", &fdt_size);
148 if (!fdt) {
149 path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
150 if (path) {
151 fdt = load_device_tree(path, &fdt_size);
152 g_free(path);
153 }
154 if (!fdt) {
155 return 0;
156 }
157 }
158
159 r = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline);
160 if (r < 0)
161 fprintf(stderr, "couldn't set /chosen/bootargs\n");
162 cpu_physical_memory_write (addr, (void *)fdt, fdt_size);
163 #else
164 /* We lack libfdt so we cannot manipulate the fdt. Just pass on the blob
165 to the kernel. */
166 fdt_size = load_image_targphys("ppc.dtb", addr, 0x10000);
167 if (fdt_size < 0) {
168 path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
169 if (path) {
170 fdt_size = load_image_targphys(path, addr, 0x10000);
171 g_free(path);
172 }
173 }
174
175 if (kernel_cmdline) {
176 fprintf(stderr,
177 "Warning: missing libfdt, cannot pass cmdline to kernel!\n");
178 }
179 #endif
180 return fdt_size;
181 }
182
183 static void virtex_init(ram_addr_t ram_size,
184 const char *boot_device,
185 const char *kernel_filename,
186 const char *kernel_cmdline,
187 const char *initrd_filename, const char *cpu_model)
188 {
189 DeviceState *dev;
190 CPUState *env;
191 target_phys_addr_t ram_base = 0;
192 DriveInfo *dinfo;
193 ram_addr_t phys_ram;
194 qemu_irq irq[32], *cpu_irq;
195 int kernel_size;
196 int i;
197
198 /* init CPUs */
199 if (cpu_model == NULL) {
200 cpu_model = "440-Xilinx";
201 }
202
203 memset(clk_setup, 0, sizeof(clk_setup));
204 env = ppc440_init_xilinx(&ram_size, 1, cpu_model, 400000000);
205 qemu_register_reset(main_cpu_reset, env);
206
207 phys_ram = qemu_ram_alloc(NULL, "ram", ram_size);
208 cpu_register_physical_memory(ram_base, ram_size, phys_ram | IO_MEM_RAM);
209
210 dinfo = drive_get(IF_PFLASH, 0, 0);
211 pflash_cfi01_register(0xfc000000, NULL, "virtex.flash", FLASH_SIZE,
212 dinfo ? dinfo->bdrv : NULL, (64 * 1024),
213 FLASH_SIZE >> 16,
214 1, 0x89, 0x18, 0x0000, 0x0, 1);
215
216 cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT];
217 dev = xilinx_intc_create(0x81800000, cpu_irq[0], 0);
218 for (i = 0; i < 32; i++) {
219 irq[i] = qdev_get_gpio_in(dev, i);
220 }
221
222 serial_mm_init(0x83e01003ULL, 2, irq[9], 115200, serial_hds[0], 1, 0);
223
224 /* 2 timers at irq 2 @ 62 Mhz. */
225 xilinx_timer_create(0x83c00000, irq[3], 2, 62 * 1000000);
226
227 if (kernel_filename) {
228 uint64_t entry, low, high;
229 target_phys_addr_t boot_offset;
230
231 /* Boots a kernel elf binary. */
232 kernel_size = load_elf(kernel_filename, NULL, NULL,
233 &entry, &low, &high, 1, ELF_MACHINE, 0);
234 boot_info.bootstrap_pc = entry & 0x00ffffff;
235
236 if (kernel_size < 0) {
237 boot_offset = 0x1200000;
238 /* If we failed loading ELF's try a raw image. */
239 kernel_size = load_image_targphys(kernel_filename,
240 boot_offset,
241 ram_size);
242 boot_info.bootstrap_pc = boot_offset;
243 high = boot_info.bootstrap_pc + kernel_size + 8192;
244 }
245
246 boot_info.ima_size = kernel_size;
247
248 /* Provide a device-tree. */
249 boot_info.fdt = high + (8192 * 2);
250 boot_info.fdt &= ~8191;
251 xilinx_load_device_tree(boot_info.fdt, ram_size, 0, 0, kernel_cmdline);
252 }
253 env->load_info = &boot_info;
254 }
255
256 static QEMUMachine virtex_machine = {
257 .name = "virtex-ml507",
258 .desc = "Xilinx Virtex ML507 reference design",
259 .init = virtex_init,
260 };
261
262 static void virtex_machine_init(void)
263 {
264 qemu_register_machine(&virtex_machine);
265 }
266
267 machine_init(virtex_machine_init);