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virtio: disable ioeventfd for record/replay
[mirror_qemu.git] / hw / virtio / virtio-pci.c
1 /*
2 * Virtio PCI Bindings
3 *
4 * Copyright IBM, Corp. 2007
5 * Copyright (c) 2009 CodeSourcery
6 *
7 * Authors:
8 * Anthony Liguori <aliguori@us.ibm.com>
9 * Paul Brook <paul@codesourcery.com>
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2. See
12 * the COPYING file in the top-level directory.
13 *
14 * Contributions after 2012-01-13 are licensed under the terms of the
15 * GNU GPL, version 2 or (at your option) any later version.
16 */
17
18 #include "qemu/osdep.h"
19
20 #include "exec/memop.h"
21 #include "standard-headers/linux/virtio_pci.h"
22 #include "hw/boards.h"
23 #include "hw/virtio/virtio.h"
24 #include "migration/qemu-file-types.h"
25 #include "hw/pci/pci.h"
26 #include "hw/pci/pci_bus.h"
27 #include "hw/qdev-properties.h"
28 #include "qapi/error.h"
29 #include "qemu/error-report.h"
30 #include "qemu/log.h"
31 #include "qemu/module.h"
32 #include "hw/pci/msi.h"
33 #include "hw/pci/msix.h"
34 #include "hw/loader.h"
35 #include "sysemu/kvm.h"
36 #include "virtio-pci.h"
37 #include "qemu/range.h"
38 #include "hw/virtio/virtio-bus.h"
39 #include "qapi/visitor.h"
40 #include "sysemu/replay.h"
41
42 #define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present(dev))
43
44 #undef VIRTIO_PCI_CONFIG
45
46 /* The remaining space is defined by each driver as the per-driver
47 * configuration space */
48 #define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev))
49
50 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
51 VirtIOPCIProxy *dev);
52 static void virtio_pci_reset(DeviceState *qdev);
53
54 /* virtio device */
55 /* DeviceState to VirtIOPCIProxy. For use off data-path. TODO: use QOM. */
56 static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d)
57 {
58 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
59 }
60
61 /* DeviceState to VirtIOPCIProxy. Note: used on datapath,
62 * be careful and test performance if you change this.
63 */
64 static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d)
65 {
66 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
67 }
68
69 static void virtio_pci_notify(DeviceState *d, uint16_t vector)
70 {
71 VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d);
72
73 if (msix_enabled(&proxy->pci_dev))
74 msix_notify(&proxy->pci_dev, vector);
75 else {
76 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
77 pci_set_irq(&proxy->pci_dev, qatomic_read(&vdev->isr) & 1);
78 }
79 }
80
81 static void virtio_pci_save_config(DeviceState *d, QEMUFile *f)
82 {
83 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
84 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
85
86 pci_device_save(&proxy->pci_dev, f);
87 msix_save(&proxy->pci_dev, f);
88 if (msix_present(&proxy->pci_dev))
89 qemu_put_be16(f, vdev->config_vector);
90 }
91
92 static const VMStateDescription vmstate_virtio_pci_modern_queue_state = {
93 .name = "virtio_pci/modern_queue_state",
94 .version_id = 1,
95 .minimum_version_id = 1,
96 .fields = (VMStateField[]) {
97 VMSTATE_UINT16(num, VirtIOPCIQueue),
98 VMSTATE_UNUSED(1), /* enabled was stored as be16 */
99 VMSTATE_BOOL(enabled, VirtIOPCIQueue),
100 VMSTATE_UINT32_ARRAY(desc, VirtIOPCIQueue, 2),
101 VMSTATE_UINT32_ARRAY(avail, VirtIOPCIQueue, 2),
102 VMSTATE_UINT32_ARRAY(used, VirtIOPCIQueue, 2),
103 VMSTATE_END_OF_LIST()
104 }
105 };
106
107 static bool virtio_pci_modern_state_needed(void *opaque)
108 {
109 VirtIOPCIProxy *proxy = opaque;
110
111 return virtio_pci_modern(proxy);
112 }
113
114 static const VMStateDescription vmstate_virtio_pci_modern_state_sub = {
115 .name = "virtio_pci/modern_state",
116 .version_id = 1,
117 .minimum_version_id = 1,
118 .needed = &virtio_pci_modern_state_needed,
119 .fields = (VMStateField[]) {
120 VMSTATE_UINT32(dfselect, VirtIOPCIProxy),
121 VMSTATE_UINT32(gfselect, VirtIOPCIProxy),
122 VMSTATE_UINT32_ARRAY(guest_features, VirtIOPCIProxy, 2),
123 VMSTATE_STRUCT_ARRAY(vqs, VirtIOPCIProxy, VIRTIO_QUEUE_MAX, 0,
124 vmstate_virtio_pci_modern_queue_state,
125 VirtIOPCIQueue),
126 VMSTATE_END_OF_LIST()
127 }
128 };
129
130 static const VMStateDescription vmstate_virtio_pci = {
131 .name = "virtio_pci",
132 .version_id = 1,
133 .minimum_version_id = 1,
134 .minimum_version_id_old = 1,
135 .fields = (VMStateField[]) {
136 VMSTATE_END_OF_LIST()
137 },
138 .subsections = (const VMStateDescription*[]) {
139 &vmstate_virtio_pci_modern_state_sub,
140 NULL
141 }
142 };
143
144 static bool virtio_pci_has_extra_state(DeviceState *d)
145 {
146 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
147
148 return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA;
149 }
150
151 static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f)
152 {
153 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
154
155 vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL);
156 }
157
158 static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f)
159 {
160 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
161
162 return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1);
163 }
164
165 static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f)
166 {
167 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
168 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
169
170 if (msix_present(&proxy->pci_dev))
171 qemu_put_be16(f, virtio_queue_vector(vdev, n));
172 }
173
174 static int virtio_pci_load_config(DeviceState *d, QEMUFile *f)
175 {
176 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
177 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
178
179 int ret;
180 ret = pci_device_load(&proxy->pci_dev, f);
181 if (ret) {
182 return ret;
183 }
184 msix_unuse_all_vectors(&proxy->pci_dev);
185 msix_load(&proxy->pci_dev, f);
186 if (msix_present(&proxy->pci_dev)) {
187 qemu_get_be16s(f, &vdev->config_vector);
188 } else {
189 vdev->config_vector = VIRTIO_NO_VECTOR;
190 }
191 if (vdev->config_vector != VIRTIO_NO_VECTOR) {
192 return msix_vector_use(&proxy->pci_dev, vdev->config_vector);
193 }
194 return 0;
195 }
196
197 static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f)
198 {
199 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
200 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
201
202 uint16_t vector;
203 if (msix_present(&proxy->pci_dev)) {
204 qemu_get_be16s(f, &vector);
205 } else {
206 vector = VIRTIO_NO_VECTOR;
207 }
208 virtio_queue_set_vector(vdev, n, vector);
209 if (vector != VIRTIO_NO_VECTOR) {
210 return msix_vector_use(&proxy->pci_dev, vector);
211 }
212
213 return 0;
214 }
215
216 static bool virtio_pci_ioeventfd_enabled(DeviceState *d)
217 {
218 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
219
220 return (proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD) != 0;
221 }
222
223 #define QEMU_VIRTIO_PCI_QUEUE_MEM_MULT 0x1000
224
225 static inline int virtio_pci_queue_mem_mult(struct VirtIOPCIProxy *proxy)
226 {
227 return (proxy->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ) ?
228 QEMU_VIRTIO_PCI_QUEUE_MEM_MULT : 4;
229 }
230
231 static int virtio_pci_ioeventfd_assign(DeviceState *d, EventNotifier *notifier,
232 int n, bool assign)
233 {
234 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
235 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
236 VirtQueue *vq = virtio_get_queue(vdev, n);
237 bool legacy = virtio_pci_legacy(proxy);
238 bool modern = virtio_pci_modern(proxy);
239 bool fast_mmio = kvm_ioeventfd_any_length_enabled();
240 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
241 MemoryRegion *modern_mr = &proxy->notify.mr;
242 MemoryRegion *modern_notify_mr = &proxy->notify_pio.mr;
243 MemoryRegion *legacy_mr = &proxy->bar;
244 hwaddr modern_addr = virtio_pci_queue_mem_mult(proxy) *
245 virtio_get_queue_index(vq);
246 hwaddr legacy_addr = VIRTIO_PCI_QUEUE_NOTIFY;
247
248 if (assign) {
249 if (modern) {
250 if (fast_mmio) {
251 memory_region_add_eventfd(modern_mr, modern_addr, 0,
252 false, n, notifier);
253 } else {
254 memory_region_add_eventfd(modern_mr, modern_addr, 2,
255 false, n, notifier);
256 }
257 if (modern_pio) {
258 memory_region_add_eventfd(modern_notify_mr, 0, 2,
259 true, n, notifier);
260 }
261 }
262 if (legacy) {
263 memory_region_add_eventfd(legacy_mr, legacy_addr, 2,
264 true, n, notifier);
265 }
266 } else {
267 if (modern) {
268 if (fast_mmio) {
269 memory_region_del_eventfd(modern_mr, modern_addr, 0,
270 false, n, notifier);
271 } else {
272 memory_region_del_eventfd(modern_mr, modern_addr, 2,
273 false, n, notifier);
274 }
275 if (modern_pio) {
276 memory_region_del_eventfd(modern_notify_mr, 0, 2,
277 true, n, notifier);
278 }
279 }
280 if (legacy) {
281 memory_region_del_eventfd(legacy_mr, legacy_addr, 2,
282 true, n, notifier);
283 }
284 }
285 return 0;
286 }
287
288 static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy)
289 {
290 virtio_bus_start_ioeventfd(&proxy->bus);
291 }
292
293 static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy)
294 {
295 virtio_bus_stop_ioeventfd(&proxy->bus);
296 }
297
298 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
299 {
300 VirtIOPCIProxy *proxy = opaque;
301 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
302 hwaddr pa;
303
304 switch (addr) {
305 case VIRTIO_PCI_GUEST_FEATURES:
306 /* Guest does not negotiate properly? We have to assume nothing. */
307 if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
308 val = virtio_bus_get_vdev_bad_features(&proxy->bus);
309 }
310 virtio_set_features(vdev, val);
311 break;
312 case VIRTIO_PCI_QUEUE_PFN:
313 pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
314 if (pa == 0) {
315 virtio_pci_reset(DEVICE(proxy));
316 }
317 else
318 virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
319 break;
320 case VIRTIO_PCI_QUEUE_SEL:
321 if (val < VIRTIO_QUEUE_MAX)
322 vdev->queue_sel = val;
323 break;
324 case VIRTIO_PCI_QUEUE_NOTIFY:
325 if (val < VIRTIO_QUEUE_MAX) {
326 virtio_queue_notify(vdev, val);
327 }
328 break;
329 case VIRTIO_PCI_STATUS:
330 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
331 virtio_pci_stop_ioeventfd(proxy);
332 }
333
334 virtio_set_status(vdev, val & 0xFF);
335
336 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
337 virtio_pci_start_ioeventfd(proxy);
338 }
339
340 if (vdev->status == 0) {
341 virtio_pci_reset(DEVICE(proxy));
342 }
343
344 /* Linux before 2.6.34 drives the device without enabling
345 the PCI device bus master bit. Enable it automatically
346 for the guest. This is a PCI spec violation but so is
347 initiating DMA with bus master bit clear. */
348 if (val == (VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER)) {
349 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
350 proxy->pci_dev.config[PCI_COMMAND] |
351 PCI_COMMAND_MASTER, 1);
352 }
353 break;
354 case VIRTIO_MSI_CONFIG_VECTOR:
355 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
356 /* Make it possible for guest to discover an error took place. */
357 if (msix_vector_use(&proxy->pci_dev, val) < 0)
358 val = VIRTIO_NO_VECTOR;
359 vdev->config_vector = val;
360 break;
361 case VIRTIO_MSI_QUEUE_VECTOR:
362 msix_vector_unuse(&proxy->pci_dev,
363 virtio_queue_vector(vdev, vdev->queue_sel));
364 /* Make it possible for guest to discover an error took place. */
365 if (msix_vector_use(&proxy->pci_dev, val) < 0)
366 val = VIRTIO_NO_VECTOR;
367 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
368 break;
369 default:
370 qemu_log_mask(LOG_GUEST_ERROR,
371 "%s: unexpected address 0x%x value 0x%x\n",
372 __func__, addr, val);
373 break;
374 }
375 }
376
377 static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
378 {
379 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
380 uint32_t ret = 0xFFFFFFFF;
381
382 switch (addr) {
383 case VIRTIO_PCI_HOST_FEATURES:
384 ret = vdev->host_features;
385 break;
386 case VIRTIO_PCI_GUEST_FEATURES:
387 ret = vdev->guest_features;
388 break;
389 case VIRTIO_PCI_QUEUE_PFN:
390 ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
391 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
392 break;
393 case VIRTIO_PCI_QUEUE_NUM:
394 ret = virtio_queue_get_num(vdev, vdev->queue_sel);
395 break;
396 case VIRTIO_PCI_QUEUE_SEL:
397 ret = vdev->queue_sel;
398 break;
399 case VIRTIO_PCI_STATUS:
400 ret = vdev->status;
401 break;
402 case VIRTIO_PCI_ISR:
403 /* reading from the ISR also clears it. */
404 ret = qatomic_xchg(&vdev->isr, 0);
405 pci_irq_deassert(&proxy->pci_dev);
406 break;
407 case VIRTIO_MSI_CONFIG_VECTOR:
408 ret = vdev->config_vector;
409 break;
410 case VIRTIO_MSI_QUEUE_VECTOR:
411 ret = virtio_queue_vector(vdev, vdev->queue_sel);
412 break;
413 default:
414 break;
415 }
416
417 return ret;
418 }
419
420 static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr,
421 unsigned size)
422 {
423 VirtIOPCIProxy *proxy = opaque;
424 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
425 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
426 uint64_t val = 0;
427 if (addr < config) {
428 return virtio_ioport_read(proxy, addr);
429 }
430 addr -= config;
431
432 switch (size) {
433 case 1:
434 val = virtio_config_readb(vdev, addr);
435 break;
436 case 2:
437 val = virtio_config_readw(vdev, addr);
438 if (virtio_is_big_endian(vdev)) {
439 val = bswap16(val);
440 }
441 break;
442 case 4:
443 val = virtio_config_readl(vdev, addr);
444 if (virtio_is_big_endian(vdev)) {
445 val = bswap32(val);
446 }
447 break;
448 }
449 return val;
450 }
451
452 static void virtio_pci_config_write(void *opaque, hwaddr addr,
453 uint64_t val, unsigned size)
454 {
455 VirtIOPCIProxy *proxy = opaque;
456 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
457 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
458 if (addr < config) {
459 virtio_ioport_write(proxy, addr, val);
460 return;
461 }
462 addr -= config;
463 /*
464 * Virtio-PCI is odd. Ioports are LE but config space is target native
465 * endian.
466 */
467 switch (size) {
468 case 1:
469 virtio_config_writeb(vdev, addr, val);
470 break;
471 case 2:
472 if (virtio_is_big_endian(vdev)) {
473 val = bswap16(val);
474 }
475 virtio_config_writew(vdev, addr, val);
476 break;
477 case 4:
478 if (virtio_is_big_endian(vdev)) {
479 val = bswap32(val);
480 }
481 virtio_config_writel(vdev, addr, val);
482 break;
483 }
484 }
485
486 static const MemoryRegionOps virtio_pci_config_ops = {
487 .read = virtio_pci_config_read,
488 .write = virtio_pci_config_write,
489 .impl = {
490 .min_access_size = 1,
491 .max_access_size = 4,
492 },
493 .endianness = DEVICE_LITTLE_ENDIAN,
494 };
495
496 static MemoryRegion *virtio_address_space_lookup(VirtIOPCIProxy *proxy,
497 hwaddr *off, int len)
498 {
499 int i;
500 VirtIOPCIRegion *reg;
501
502 for (i = 0; i < ARRAY_SIZE(proxy->regs); ++i) {
503 reg = &proxy->regs[i];
504 if (*off >= reg->offset &&
505 *off + len <= reg->offset + reg->size) {
506 *off -= reg->offset;
507 return &reg->mr;
508 }
509 }
510
511 return NULL;
512 }
513
514 /* Below are generic functions to do memcpy from/to an address space,
515 * without byteswaps, with input validation.
516 *
517 * As regular address_space_* APIs all do some kind of byteswap at least for
518 * some host/target combinations, we are forced to explicitly convert to a
519 * known-endianness integer value.
520 * It doesn't really matter which endian format to go through, so the code
521 * below selects the endian that causes the least amount of work on the given
522 * host.
523 *
524 * Note: host pointer must be aligned.
525 */
526 static
527 void virtio_address_space_write(VirtIOPCIProxy *proxy, hwaddr addr,
528 const uint8_t *buf, int len)
529 {
530 uint64_t val;
531 MemoryRegion *mr;
532
533 /* address_space_* APIs assume an aligned address.
534 * As address is under guest control, handle illegal values.
535 */
536 addr &= ~(len - 1);
537
538 mr = virtio_address_space_lookup(proxy, &addr, len);
539 if (!mr) {
540 return;
541 }
542
543 /* Make sure caller aligned buf properly */
544 assert(!(((uintptr_t)buf) & (len - 1)));
545
546 switch (len) {
547 case 1:
548 val = pci_get_byte(buf);
549 break;
550 case 2:
551 val = pci_get_word(buf);
552 break;
553 case 4:
554 val = pci_get_long(buf);
555 break;
556 default:
557 /* As length is under guest control, handle illegal values. */
558 return;
559 }
560 memory_region_dispatch_write(mr, addr, val, size_memop(len) | MO_LE,
561 MEMTXATTRS_UNSPECIFIED);
562 }
563
564 static void
565 virtio_address_space_read(VirtIOPCIProxy *proxy, hwaddr addr,
566 uint8_t *buf, int len)
567 {
568 uint64_t val;
569 MemoryRegion *mr;
570
571 /* address_space_* APIs assume an aligned address.
572 * As address is under guest control, handle illegal values.
573 */
574 addr &= ~(len - 1);
575
576 mr = virtio_address_space_lookup(proxy, &addr, len);
577 if (!mr) {
578 return;
579 }
580
581 /* Make sure caller aligned buf properly */
582 assert(!(((uintptr_t)buf) & (len - 1)));
583
584 memory_region_dispatch_read(mr, addr, &val, size_memop(len) | MO_LE,
585 MEMTXATTRS_UNSPECIFIED);
586 switch (len) {
587 case 1:
588 pci_set_byte(buf, val);
589 break;
590 case 2:
591 pci_set_word(buf, val);
592 break;
593 case 4:
594 pci_set_long(buf, val);
595 break;
596 default:
597 /* As length is under guest control, handle illegal values. */
598 break;
599 }
600 }
601
602 static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
603 uint32_t val, int len)
604 {
605 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
606 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
607 struct virtio_pci_cfg_cap *cfg;
608
609 pci_default_write_config(pci_dev, address, val, len);
610
611 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) {
612 pcie_cap_flr_write_config(pci_dev, address, val, len);
613 }
614
615 if (range_covers_byte(address, len, PCI_COMMAND)) {
616 if (!(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
617 virtio_set_disabled(vdev, true);
618 virtio_pci_stop_ioeventfd(proxy);
619 virtio_set_status(vdev, vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK);
620 } else {
621 virtio_set_disabled(vdev, false);
622 }
623 }
624
625 if (proxy->config_cap &&
626 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
627 pci_cfg_data),
628 sizeof cfg->pci_cfg_data)) {
629 uint32_t off;
630 uint32_t len;
631
632 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
633 off = le32_to_cpu(cfg->cap.offset);
634 len = le32_to_cpu(cfg->cap.length);
635
636 if (len == 1 || len == 2 || len == 4) {
637 assert(len <= sizeof cfg->pci_cfg_data);
638 virtio_address_space_write(proxy, off, cfg->pci_cfg_data, len);
639 }
640 }
641 }
642
643 static uint32_t virtio_read_config(PCIDevice *pci_dev,
644 uint32_t address, int len)
645 {
646 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
647 struct virtio_pci_cfg_cap *cfg;
648
649 if (proxy->config_cap &&
650 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
651 pci_cfg_data),
652 sizeof cfg->pci_cfg_data)) {
653 uint32_t off;
654 uint32_t len;
655
656 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
657 off = le32_to_cpu(cfg->cap.offset);
658 len = le32_to_cpu(cfg->cap.length);
659
660 if (len == 1 || len == 2 || len == 4) {
661 assert(len <= sizeof cfg->pci_cfg_data);
662 virtio_address_space_read(proxy, off, cfg->pci_cfg_data, len);
663 }
664 }
665
666 return pci_default_read_config(pci_dev, address, len);
667 }
668
669 static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy,
670 unsigned int queue_no,
671 unsigned int vector)
672 {
673 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
674 int ret;
675
676 if (irqfd->users == 0) {
677 ret = kvm_irqchip_add_msi_route(kvm_state, vector, &proxy->pci_dev);
678 if (ret < 0) {
679 return ret;
680 }
681 irqfd->virq = ret;
682 }
683 irqfd->users++;
684 return 0;
685 }
686
687 static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy,
688 unsigned int vector)
689 {
690 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
691 if (--irqfd->users == 0) {
692 kvm_irqchip_release_virq(kvm_state, irqfd->virq);
693 }
694 }
695
696 static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy,
697 unsigned int queue_no,
698 unsigned int vector)
699 {
700 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
701 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
702 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
703 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
704 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, irqfd->virq);
705 }
706
707 static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy,
708 unsigned int queue_no,
709 unsigned int vector)
710 {
711 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
712 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
713 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
714 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
715 int ret;
716
717 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, irqfd->virq);
718 assert(ret == 0);
719 }
720
721 static int kvm_virtio_pci_vector_use(VirtIOPCIProxy *proxy, int nvqs)
722 {
723 PCIDevice *dev = &proxy->pci_dev;
724 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
725 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
726 unsigned int vector;
727 int ret, queue_no;
728
729 for (queue_no = 0; queue_no < nvqs; queue_no++) {
730 if (!virtio_queue_get_num(vdev, queue_no)) {
731 break;
732 }
733 vector = virtio_queue_vector(vdev, queue_no);
734 if (vector >= msix_nr_vectors_allocated(dev)) {
735 continue;
736 }
737 ret = kvm_virtio_pci_vq_vector_use(proxy, queue_no, vector);
738 if (ret < 0) {
739 goto undo;
740 }
741 /* If guest supports masking, set up irqfd now.
742 * Otherwise, delay until unmasked in the frontend.
743 */
744 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
745 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector);
746 if (ret < 0) {
747 kvm_virtio_pci_vq_vector_release(proxy, vector);
748 goto undo;
749 }
750 }
751 }
752 return 0;
753
754 undo:
755 while (--queue_no >= 0) {
756 vector = virtio_queue_vector(vdev, queue_no);
757 if (vector >= msix_nr_vectors_allocated(dev)) {
758 continue;
759 }
760 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
761 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
762 }
763 kvm_virtio_pci_vq_vector_release(proxy, vector);
764 }
765 return ret;
766 }
767
768 static void kvm_virtio_pci_vector_release(VirtIOPCIProxy *proxy, int nvqs)
769 {
770 PCIDevice *dev = &proxy->pci_dev;
771 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
772 unsigned int vector;
773 int queue_no;
774 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
775
776 for (queue_no = 0; queue_no < nvqs; queue_no++) {
777 if (!virtio_queue_get_num(vdev, queue_no)) {
778 break;
779 }
780 vector = virtio_queue_vector(vdev, queue_no);
781 if (vector >= msix_nr_vectors_allocated(dev)) {
782 continue;
783 }
784 /* If guest supports masking, clean up irqfd now.
785 * Otherwise, it was cleaned when masked in the frontend.
786 */
787 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
788 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
789 }
790 kvm_virtio_pci_vq_vector_release(proxy, vector);
791 }
792 }
793
794 static int virtio_pci_vq_vector_unmask(VirtIOPCIProxy *proxy,
795 unsigned int queue_no,
796 unsigned int vector,
797 MSIMessage msg)
798 {
799 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
800 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
801 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
802 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
803 VirtIOIRQFD *irqfd;
804 int ret = 0;
805
806 if (proxy->vector_irqfd) {
807 irqfd = &proxy->vector_irqfd[vector];
808 if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) {
809 ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg,
810 &proxy->pci_dev);
811 if (ret < 0) {
812 return ret;
813 }
814 kvm_irqchip_commit_routes(kvm_state);
815 }
816 }
817
818 /* If guest supports masking, irqfd is already setup, unmask it.
819 * Otherwise, set it up now.
820 */
821 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
822 k->guest_notifier_mask(vdev, queue_no, false);
823 /* Test after unmasking to avoid losing events. */
824 if (k->guest_notifier_pending &&
825 k->guest_notifier_pending(vdev, queue_no)) {
826 event_notifier_set(n);
827 }
828 } else {
829 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector);
830 }
831 return ret;
832 }
833
834 static void virtio_pci_vq_vector_mask(VirtIOPCIProxy *proxy,
835 unsigned int queue_no,
836 unsigned int vector)
837 {
838 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
839 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
840
841 /* If guest supports masking, keep irqfd but mask it.
842 * Otherwise, clean it up now.
843 */
844 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
845 k->guest_notifier_mask(vdev, queue_no, true);
846 } else {
847 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
848 }
849 }
850
851 static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector,
852 MSIMessage msg)
853 {
854 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
855 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
856 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
857 int ret, index, unmasked = 0;
858
859 while (vq) {
860 index = virtio_get_queue_index(vq);
861 if (!virtio_queue_get_num(vdev, index)) {
862 break;
863 }
864 if (index < proxy->nvqs_with_notifiers) {
865 ret = virtio_pci_vq_vector_unmask(proxy, index, vector, msg);
866 if (ret < 0) {
867 goto undo;
868 }
869 ++unmasked;
870 }
871 vq = virtio_vector_next_queue(vq);
872 }
873
874 return 0;
875
876 undo:
877 vq = virtio_vector_first_queue(vdev, vector);
878 while (vq && unmasked >= 0) {
879 index = virtio_get_queue_index(vq);
880 if (index < proxy->nvqs_with_notifiers) {
881 virtio_pci_vq_vector_mask(proxy, index, vector);
882 --unmasked;
883 }
884 vq = virtio_vector_next_queue(vq);
885 }
886 return ret;
887 }
888
889 static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector)
890 {
891 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
892 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
893 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
894 int index;
895
896 while (vq) {
897 index = virtio_get_queue_index(vq);
898 if (!virtio_queue_get_num(vdev, index)) {
899 break;
900 }
901 if (index < proxy->nvqs_with_notifiers) {
902 virtio_pci_vq_vector_mask(proxy, index, vector);
903 }
904 vq = virtio_vector_next_queue(vq);
905 }
906 }
907
908 static void virtio_pci_vector_poll(PCIDevice *dev,
909 unsigned int vector_start,
910 unsigned int vector_end)
911 {
912 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
913 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
914 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
915 int queue_no;
916 unsigned int vector;
917 EventNotifier *notifier;
918 VirtQueue *vq;
919
920 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) {
921 if (!virtio_queue_get_num(vdev, queue_no)) {
922 break;
923 }
924 vector = virtio_queue_vector(vdev, queue_no);
925 if (vector < vector_start || vector >= vector_end ||
926 !msix_is_masked(dev, vector)) {
927 continue;
928 }
929 vq = virtio_get_queue(vdev, queue_no);
930 notifier = virtio_queue_get_guest_notifier(vq);
931 if (k->guest_notifier_pending) {
932 if (k->guest_notifier_pending(vdev, queue_no)) {
933 msix_set_pending(dev, vector);
934 }
935 } else if (event_notifier_test_and_clear(notifier)) {
936 msix_set_pending(dev, vector);
937 }
938 }
939 }
940
941 static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign,
942 bool with_irqfd)
943 {
944 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
945 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
946 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev);
947 VirtQueue *vq = virtio_get_queue(vdev, n);
948 EventNotifier *notifier = virtio_queue_get_guest_notifier(vq);
949
950 if (assign) {
951 int r = event_notifier_init(notifier, 0);
952 if (r < 0) {
953 return r;
954 }
955 virtio_queue_set_guest_notifier_fd_handler(vq, true, with_irqfd);
956 } else {
957 virtio_queue_set_guest_notifier_fd_handler(vq, false, with_irqfd);
958 event_notifier_cleanup(notifier);
959 }
960
961 if (!msix_enabled(&proxy->pci_dev) &&
962 vdev->use_guest_notifier_mask &&
963 vdc->guest_notifier_mask) {
964 vdc->guest_notifier_mask(vdev, n, !assign);
965 }
966
967 return 0;
968 }
969
970 static bool virtio_pci_query_guest_notifiers(DeviceState *d)
971 {
972 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
973 return msix_enabled(&proxy->pci_dev);
974 }
975
976 static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign)
977 {
978 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
979 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
980 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
981 int r, n;
982 bool with_irqfd = msix_enabled(&proxy->pci_dev) &&
983 kvm_msi_via_irqfd_enabled();
984
985 nvqs = MIN(nvqs, VIRTIO_QUEUE_MAX);
986
987 /* When deassigning, pass a consistent nvqs value
988 * to avoid leaking notifiers.
989 */
990 assert(assign || nvqs == proxy->nvqs_with_notifiers);
991
992 proxy->nvqs_with_notifiers = nvqs;
993
994 /* Must unset vector notifier while guest notifier is still assigned */
995 if ((proxy->vector_irqfd || k->guest_notifier_mask) && !assign) {
996 msix_unset_vector_notifiers(&proxy->pci_dev);
997 if (proxy->vector_irqfd) {
998 kvm_virtio_pci_vector_release(proxy, nvqs);
999 g_free(proxy->vector_irqfd);
1000 proxy->vector_irqfd = NULL;
1001 }
1002 }
1003
1004 for (n = 0; n < nvqs; n++) {
1005 if (!virtio_queue_get_num(vdev, n)) {
1006 break;
1007 }
1008
1009 r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd);
1010 if (r < 0) {
1011 goto assign_error;
1012 }
1013 }
1014
1015 /* Must set vector notifier after guest notifier has been assigned */
1016 if ((with_irqfd || k->guest_notifier_mask) && assign) {
1017 if (with_irqfd) {
1018 proxy->vector_irqfd =
1019 g_malloc0(sizeof(*proxy->vector_irqfd) *
1020 msix_nr_vectors_allocated(&proxy->pci_dev));
1021 r = kvm_virtio_pci_vector_use(proxy, nvqs);
1022 if (r < 0) {
1023 goto assign_error;
1024 }
1025 }
1026 r = msix_set_vector_notifiers(&proxy->pci_dev,
1027 virtio_pci_vector_unmask,
1028 virtio_pci_vector_mask,
1029 virtio_pci_vector_poll);
1030 if (r < 0) {
1031 goto notifiers_error;
1032 }
1033 }
1034
1035 return 0;
1036
1037 notifiers_error:
1038 if (with_irqfd) {
1039 assert(assign);
1040 kvm_virtio_pci_vector_release(proxy, nvqs);
1041 }
1042
1043 assign_error:
1044 /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */
1045 assert(assign);
1046 while (--n >= 0) {
1047 virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd);
1048 }
1049 return r;
1050 }
1051
1052 static int virtio_pci_set_host_notifier_mr(DeviceState *d, int n,
1053 MemoryRegion *mr, bool assign)
1054 {
1055 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1056 int offset;
1057
1058 if (n >= VIRTIO_QUEUE_MAX || !virtio_pci_modern(proxy) ||
1059 virtio_pci_queue_mem_mult(proxy) != memory_region_size(mr)) {
1060 return -1;
1061 }
1062
1063 if (assign) {
1064 offset = virtio_pci_queue_mem_mult(proxy) * n;
1065 memory_region_add_subregion_overlap(&proxy->notify.mr, offset, mr, 1);
1066 } else {
1067 memory_region_del_subregion(&proxy->notify.mr, mr);
1068 }
1069
1070 return 0;
1071 }
1072
1073 static void virtio_pci_vmstate_change(DeviceState *d, bool running)
1074 {
1075 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1076 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1077
1078 if (running) {
1079 /* Old QEMU versions did not set bus master enable on status write.
1080 * Detect DRIVER set and enable it.
1081 */
1082 if ((proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION) &&
1083 (vdev->status & VIRTIO_CONFIG_S_DRIVER) &&
1084 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
1085 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
1086 proxy->pci_dev.config[PCI_COMMAND] |
1087 PCI_COMMAND_MASTER, 1);
1088 }
1089 virtio_pci_start_ioeventfd(proxy);
1090 } else {
1091 virtio_pci_stop_ioeventfd(proxy);
1092 }
1093 }
1094
1095 /*
1096 * virtio-pci: This is the PCIDevice which has a virtio-pci-bus.
1097 */
1098
1099 static int virtio_pci_query_nvectors(DeviceState *d)
1100 {
1101 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1102
1103 return proxy->nvectors;
1104 }
1105
1106 static AddressSpace *virtio_pci_get_dma_as(DeviceState *d)
1107 {
1108 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1109 PCIDevice *dev = &proxy->pci_dev;
1110
1111 return pci_get_address_space(dev);
1112 }
1113
1114 static bool virtio_pci_queue_enabled(DeviceState *d, int n)
1115 {
1116 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1117 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1118
1119 if (virtio_vdev_has_feature(vdev, VIRTIO_F_VERSION_1)) {
1120 return proxy->vqs[n].enabled;
1121 }
1122
1123 return virtio_queue_enabled_legacy(vdev, n);
1124 }
1125
1126 static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy,
1127 struct virtio_pci_cap *cap)
1128 {
1129 PCIDevice *dev = &proxy->pci_dev;
1130 int offset;
1131
1132 offset = pci_add_capability(dev, PCI_CAP_ID_VNDR, 0,
1133 cap->cap_len, &error_abort);
1134
1135 assert(cap->cap_len >= sizeof *cap);
1136 memcpy(dev->config + offset + PCI_CAP_FLAGS, &cap->cap_len,
1137 cap->cap_len - PCI_CAP_FLAGS);
1138
1139 return offset;
1140 }
1141
1142 static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr,
1143 unsigned size)
1144 {
1145 VirtIOPCIProxy *proxy = opaque;
1146 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1147 uint32_t val = 0;
1148 int i;
1149
1150 switch (addr) {
1151 case VIRTIO_PCI_COMMON_DFSELECT:
1152 val = proxy->dfselect;
1153 break;
1154 case VIRTIO_PCI_COMMON_DF:
1155 if (proxy->dfselect <= 1) {
1156 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev);
1157
1158 val = (vdev->host_features & ~vdc->legacy_features) >>
1159 (32 * proxy->dfselect);
1160 }
1161 break;
1162 case VIRTIO_PCI_COMMON_GFSELECT:
1163 val = proxy->gfselect;
1164 break;
1165 case VIRTIO_PCI_COMMON_GF:
1166 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
1167 val = proxy->guest_features[proxy->gfselect];
1168 }
1169 break;
1170 case VIRTIO_PCI_COMMON_MSIX:
1171 val = vdev->config_vector;
1172 break;
1173 case VIRTIO_PCI_COMMON_NUMQ:
1174 for (i = 0; i < VIRTIO_QUEUE_MAX; ++i) {
1175 if (virtio_queue_get_num(vdev, i)) {
1176 val = i + 1;
1177 }
1178 }
1179 break;
1180 case VIRTIO_PCI_COMMON_STATUS:
1181 val = vdev->status;
1182 break;
1183 case VIRTIO_PCI_COMMON_CFGGENERATION:
1184 val = vdev->generation;
1185 break;
1186 case VIRTIO_PCI_COMMON_Q_SELECT:
1187 val = vdev->queue_sel;
1188 break;
1189 case VIRTIO_PCI_COMMON_Q_SIZE:
1190 val = virtio_queue_get_num(vdev, vdev->queue_sel);
1191 break;
1192 case VIRTIO_PCI_COMMON_Q_MSIX:
1193 val = virtio_queue_vector(vdev, vdev->queue_sel);
1194 break;
1195 case VIRTIO_PCI_COMMON_Q_ENABLE:
1196 val = proxy->vqs[vdev->queue_sel].enabled;
1197 break;
1198 case VIRTIO_PCI_COMMON_Q_NOFF:
1199 /* Simply map queues in order */
1200 val = vdev->queue_sel;
1201 break;
1202 case VIRTIO_PCI_COMMON_Q_DESCLO:
1203 val = proxy->vqs[vdev->queue_sel].desc[0];
1204 break;
1205 case VIRTIO_PCI_COMMON_Q_DESCHI:
1206 val = proxy->vqs[vdev->queue_sel].desc[1];
1207 break;
1208 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1209 val = proxy->vqs[vdev->queue_sel].avail[0];
1210 break;
1211 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1212 val = proxy->vqs[vdev->queue_sel].avail[1];
1213 break;
1214 case VIRTIO_PCI_COMMON_Q_USEDLO:
1215 val = proxy->vqs[vdev->queue_sel].used[0];
1216 break;
1217 case VIRTIO_PCI_COMMON_Q_USEDHI:
1218 val = proxy->vqs[vdev->queue_sel].used[1];
1219 break;
1220 default:
1221 val = 0;
1222 }
1223
1224 return val;
1225 }
1226
1227 static void virtio_pci_common_write(void *opaque, hwaddr addr,
1228 uint64_t val, unsigned size)
1229 {
1230 VirtIOPCIProxy *proxy = opaque;
1231 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1232
1233 switch (addr) {
1234 case VIRTIO_PCI_COMMON_DFSELECT:
1235 proxy->dfselect = val;
1236 break;
1237 case VIRTIO_PCI_COMMON_GFSELECT:
1238 proxy->gfselect = val;
1239 break;
1240 case VIRTIO_PCI_COMMON_GF:
1241 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
1242 proxy->guest_features[proxy->gfselect] = val;
1243 virtio_set_features(vdev,
1244 (((uint64_t)proxy->guest_features[1]) << 32) |
1245 proxy->guest_features[0]);
1246 }
1247 break;
1248 case VIRTIO_PCI_COMMON_MSIX:
1249 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
1250 /* Make it possible for guest to discover an error took place. */
1251 if (msix_vector_use(&proxy->pci_dev, val) < 0) {
1252 val = VIRTIO_NO_VECTOR;
1253 }
1254 vdev->config_vector = val;
1255 break;
1256 case VIRTIO_PCI_COMMON_STATUS:
1257 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
1258 virtio_pci_stop_ioeventfd(proxy);
1259 }
1260
1261 virtio_set_status(vdev, val & 0xFF);
1262
1263 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
1264 virtio_pci_start_ioeventfd(proxy);
1265 }
1266
1267 if (vdev->status == 0) {
1268 virtio_pci_reset(DEVICE(proxy));
1269 }
1270
1271 break;
1272 case VIRTIO_PCI_COMMON_Q_SELECT:
1273 if (val < VIRTIO_QUEUE_MAX) {
1274 vdev->queue_sel = val;
1275 }
1276 break;
1277 case VIRTIO_PCI_COMMON_Q_SIZE:
1278 proxy->vqs[vdev->queue_sel].num = val;
1279 virtio_queue_set_num(vdev, vdev->queue_sel,
1280 proxy->vqs[vdev->queue_sel].num);
1281 break;
1282 case VIRTIO_PCI_COMMON_Q_MSIX:
1283 msix_vector_unuse(&proxy->pci_dev,
1284 virtio_queue_vector(vdev, vdev->queue_sel));
1285 /* Make it possible for guest to discover an error took place. */
1286 if (msix_vector_use(&proxy->pci_dev, val) < 0) {
1287 val = VIRTIO_NO_VECTOR;
1288 }
1289 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
1290 break;
1291 case VIRTIO_PCI_COMMON_Q_ENABLE:
1292 if (val == 1) {
1293 virtio_queue_set_num(vdev, vdev->queue_sel,
1294 proxy->vqs[vdev->queue_sel].num);
1295 virtio_queue_set_rings(vdev, vdev->queue_sel,
1296 ((uint64_t)proxy->vqs[vdev->queue_sel].desc[1]) << 32 |
1297 proxy->vqs[vdev->queue_sel].desc[0],
1298 ((uint64_t)proxy->vqs[vdev->queue_sel].avail[1]) << 32 |
1299 proxy->vqs[vdev->queue_sel].avail[0],
1300 ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 |
1301 proxy->vqs[vdev->queue_sel].used[0]);
1302 proxy->vqs[vdev->queue_sel].enabled = 1;
1303 } else {
1304 virtio_error(vdev, "wrong value for queue_enable %"PRIx64, val);
1305 }
1306 break;
1307 case VIRTIO_PCI_COMMON_Q_DESCLO:
1308 proxy->vqs[vdev->queue_sel].desc[0] = val;
1309 break;
1310 case VIRTIO_PCI_COMMON_Q_DESCHI:
1311 proxy->vqs[vdev->queue_sel].desc[1] = val;
1312 break;
1313 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1314 proxy->vqs[vdev->queue_sel].avail[0] = val;
1315 break;
1316 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1317 proxy->vqs[vdev->queue_sel].avail[1] = val;
1318 break;
1319 case VIRTIO_PCI_COMMON_Q_USEDLO:
1320 proxy->vqs[vdev->queue_sel].used[0] = val;
1321 break;
1322 case VIRTIO_PCI_COMMON_Q_USEDHI:
1323 proxy->vqs[vdev->queue_sel].used[1] = val;
1324 break;
1325 default:
1326 break;
1327 }
1328 }
1329
1330
1331 static uint64_t virtio_pci_notify_read(void *opaque, hwaddr addr,
1332 unsigned size)
1333 {
1334 return 0;
1335 }
1336
1337 static void virtio_pci_notify_write(void *opaque, hwaddr addr,
1338 uint64_t val, unsigned size)
1339 {
1340 VirtIOPCIProxy *proxy = opaque;
1341 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1342
1343 unsigned queue = addr / virtio_pci_queue_mem_mult(proxy);
1344
1345 if (vdev != NULL && queue < VIRTIO_QUEUE_MAX) {
1346 virtio_queue_notify(vdev, queue);
1347 }
1348 }
1349
1350 static void virtio_pci_notify_write_pio(void *opaque, hwaddr addr,
1351 uint64_t val, unsigned size)
1352 {
1353 VirtIOPCIProxy *proxy = opaque;
1354 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1355
1356 unsigned queue = val;
1357
1358 if (vdev != NULL && queue < VIRTIO_QUEUE_MAX) {
1359 virtio_queue_notify(vdev, queue);
1360 }
1361 }
1362
1363 static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr,
1364 unsigned size)
1365 {
1366 VirtIOPCIProxy *proxy = opaque;
1367 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1368 uint64_t val;
1369
1370 if (vdev == NULL) {
1371 return 0;
1372 }
1373
1374 val = qatomic_xchg(&vdev->isr, 0);
1375 pci_irq_deassert(&proxy->pci_dev);
1376 return val;
1377 }
1378
1379 static void virtio_pci_isr_write(void *opaque, hwaddr addr,
1380 uint64_t val, unsigned size)
1381 {
1382 }
1383
1384 static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr,
1385 unsigned size)
1386 {
1387 VirtIOPCIProxy *proxy = opaque;
1388 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1389 uint64_t val;
1390
1391 if (vdev == NULL) {
1392 return 0;
1393 }
1394
1395 switch (size) {
1396 case 1:
1397 val = virtio_config_modern_readb(vdev, addr);
1398 break;
1399 case 2:
1400 val = virtio_config_modern_readw(vdev, addr);
1401 break;
1402 case 4:
1403 val = virtio_config_modern_readl(vdev, addr);
1404 break;
1405 default:
1406 val = 0;
1407 break;
1408 }
1409 return val;
1410 }
1411
1412 static void virtio_pci_device_write(void *opaque, hwaddr addr,
1413 uint64_t val, unsigned size)
1414 {
1415 VirtIOPCIProxy *proxy = opaque;
1416 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1417
1418 if (vdev == NULL) {
1419 return;
1420 }
1421
1422 switch (size) {
1423 case 1:
1424 virtio_config_modern_writeb(vdev, addr, val);
1425 break;
1426 case 2:
1427 virtio_config_modern_writew(vdev, addr, val);
1428 break;
1429 case 4:
1430 virtio_config_modern_writel(vdev, addr, val);
1431 break;
1432 }
1433 }
1434
1435 static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy,
1436 const char *vdev_name)
1437 {
1438 static const MemoryRegionOps common_ops = {
1439 .read = virtio_pci_common_read,
1440 .write = virtio_pci_common_write,
1441 .impl = {
1442 .min_access_size = 1,
1443 .max_access_size = 4,
1444 },
1445 .endianness = DEVICE_LITTLE_ENDIAN,
1446 };
1447 static const MemoryRegionOps isr_ops = {
1448 .read = virtio_pci_isr_read,
1449 .write = virtio_pci_isr_write,
1450 .impl = {
1451 .min_access_size = 1,
1452 .max_access_size = 4,
1453 },
1454 .endianness = DEVICE_LITTLE_ENDIAN,
1455 };
1456 static const MemoryRegionOps device_ops = {
1457 .read = virtio_pci_device_read,
1458 .write = virtio_pci_device_write,
1459 .impl = {
1460 .min_access_size = 1,
1461 .max_access_size = 4,
1462 },
1463 .endianness = DEVICE_LITTLE_ENDIAN,
1464 };
1465 static const MemoryRegionOps notify_ops = {
1466 .read = virtio_pci_notify_read,
1467 .write = virtio_pci_notify_write,
1468 .impl = {
1469 .min_access_size = 1,
1470 .max_access_size = 4,
1471 },
1472 .endianness = DEVICE_LITTLE_ENDIAN,
1473 };
1474 static const MemoryRegionOps notify_pio_ops = {
1475 .read = virtio_pci_notify_read,
1476 .write = virtio_pci_notify_write_pio,
1477 .impl = {
1478 .min_access_size = 1,
1479 .max_access_size = 4,
1480 },
1481 .endianness = DEVICE_LITTLE_ENDIAN,
1482 };
1483 g_autoptr(GString) name = g_string_new(NULL);
1484
1485 g_string_printf(name, "virtio-pci-common-%s", vdev_name);
1486 memory_region_init_io(&proxy->common.mr, OBJECT(proxy),
1487 &common_ops,
1488 proxy,
1489 name->str,
1490 proxy->common.size);
1491
1492 g_string_printf(name, "virtio-pci-isr-%s", vdev_name);
1493 memory_region_init_io(&proxy->isr.mr, OBJECT(proxy),
1494 &isr_ops,
1495 proxy,
1496 name->str,
1497 proxy->isr.size);
1498
1499 g_string_printf(name, "virtio-pci-device-%s", vdev_name);
1500 memory_region_init_io(&proxy->device.mr, OBJECT(proxy),
1501 &device_ops,
1502 proxy,
1503 name->str,
1504 proxy->device.size);
1505
1506 g_string_printf(name, "virtio-pci-notify-%s", vdev_name);
1507 memory_region_init_io(&proxy->notify.mr, OBJECT(proxy),
1508 &notify_ops,
1509 proxy,
1510 name->str,
1511 proxy->notify.size);
1512
1513 g_string_printf(name, "virtio-pci-notify-pio-%s", vdev_name);
1514 memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy),
1515 &notify_pio_ops,
1516 proxy,
1517 name->str,
1518 proxy->notify_pio.size);
1519 }
1520
1521 static void virtio_pci_modern_region_map(VirtIOPCIProxy *proxy,
1522 VirtIOPCIRegion *region,
1523 struct virtio_pci_cap *cap,
1524 MemoryRegion *mr,
1525 uint8_t bar)
1526 {
1527 memory_region_add_subregion(mr, region->offset, &region->mr);
1528
1529 cap->cfg_type = region->type;
1530 cap->bar = bar;
1531 cap->offset = cpu_to_le32(region->offset);
1532 cap->length = cpu_to_le32(region->size);
1533 virtio_pci_add_mem_cap(proxy, cap);
1534
1535 }
1536
1537 static void virtio_pci_modern_mem_region_map(VirtIOPCIProxy *proxy,
1538 VirtIOPCIRegion *region,
1539 struct virtio_pci_cap *cap)
1540 {
1541 virtio_pci_modern_region_map(proxy, region, cap,
1542 &proxy->modern_bar, proxy->modern_mem_bar_idx);
1543 }
1544
1545 static void virtio_pci_modern_io_region_map(VirtIOPCIProxy *proxy,
1546 VirtIOPCIRegion *region,
1547 struct virtio_pci_cap *cap)
1548 {
1549 virtio_pci_modern_region_map(proxy, region, cap,
1550 &proxy->io_bar, proxy->modern_io_bar_idx);
1551 }
1552
1553 static void virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy *proxy,
1554 VirtIOPCIRegion *region)
1555 {
1556 memory_region_del_subregion(&proxy->modern_bar,
1557 &region->mr);
1558 }
1559
1560 static void virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy,
1561 VirtIOPCIRegion *region)
1562 {
1563 memory_region_del_subregion(&proxy->io_bar,
1564 &region->mr);
1565 }
1566
1567 static void virtio_pci_pre_plugged(DeviceState *d, Error **errp)
1568 {
1569 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1570 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1571
1572 if (virtio_pci_modern(proxy)) {
1573 virtio_add_feature(&vdev->host_features, VIRTIO_F_VERSION_1);
1574 }
1575
1576 virtio_add_feature(&vdev->host_features, VIRTIO_F_BAD_FEATURE);
1577 }
1578
1579 /* This is called by virtio-bus just after the device is plugged. */
1580 static void virtio_pci_device_plugged(DeviceState *d, Error **errp)
1581 {
1582 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1583 VirtioBusState *bus = &proxy->bus;
1584 bool legacy = virtio_pci_legacy(proxy);
1585 bool modern;
1586 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
1587 uint8_t *config;
1588 uint32_t size;
1589 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1590
1591 /*
1592 * Virtio capabilities present without
1593 * VIRTIO_F_VERSION_1 confuses guests
1594 */
1595 if (!proxy->ignore_backend_features &&
1596 !virtio_has_feature(vdev->host_features, VIRTIO_F_VERSION_1)) {
1597 virtio_pci_disable_modern(proxy);
1598
1599 if (!legacy) {
1600 error_setg(errp, "Device doesn't support modern mode, and legacy"
1601 " mode is disabled");
1602 error_append_hint(errp, "Set disable-legacy to off\n");
1603
1604 return;
1605 }
1606 }
1607
1608 modern = virtio_pci_modern(proxy);
1609
1610 config = proxy->pci_dev.config;
1611 if (proxy->class_code) {
1612 pci_config_set_class(config, proxy->class_code);
1613 }
1614
1615 if (legacy) {
1616 if (!virtio_legacy_allowed(vdev)) {
1617 /*
1618 * To avoid migration issues, we allow legacy mode when legacy
1619 * check is disabled in the old machine types (< 5.1).
1620 */
1621 if (virtio_legacy_check_disabled(vdev)) {
1622 warn_report("device is modern-only, but for backward "
1623 "compatibility legacy is allowed");
1624 } else {
1625 error_setg(errp,
1626 "device is modern-only, use disable-legacy=on");
1627 return;
1628 }
1629 }
1630 if (virtio_host_has_feature(vdev, VIRTIO_F_IOMMU_PLATFORM)) {
1631 error_setg(errp, "VIRTIO_F_IOMMU_PLATFORM was supported by"
1632 " neither legacy nor transitional device");
1633 return ;
1634 }
1635 /*
1636 * Legacy and transitional devices use specific subsystem IDs.
1637 * Note that the subsystem vendor ID (config + PCI_SUBSYSTEM_VENDOR_ID)
1638 * is set to PCI_SUBVENDOR_ID_REDHAT_QUMRANET by default.
1639 */
1640 pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus));
1641 } else {
1642 /* pure virtio-1.0 */
1643 pci_set_word(config + PCI_VENDOR_ID,
1644 PCI_VENDOR_ID_REDHAT_QUMRANET);
1645 pci_set_word(config + PCI_DEVICE_ID,
1646 0x1040 + virtio_bus_get_vdev_id(bus));
1647 pci_config_set_revision(config, 1);
1648 }
1649 config[PCI_INTERRUPT_PIN] = 1;
1650
1651
1652 if (modern) {
1653 struct virtio_pci_cap cap = {
1654 .cap_len = sizeof cap,
1655 };
1656 struct virtio_pci_notify_cap notify = {
1657 .cap.cap_len = sizeof notify,
1658 .notify_off_multiplier =
1659 cpu_to_le32(virtio_pci_queue_mem_mult(proxy)),
1660 };
1661 struct virtio_pci_cfg_cap cfg = {
1662 .cap.cap_len = sizeof cfg,
1663 .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG,
1664 };
1665 struct virtio_pci_notify_cap notify_pio = {
1666 .cap.cap_len = sizeof notify,
1667 .notify_off_multiplier = cpu_to_le32(0x0),
1668 };
1669
1670 struct virtio_pci_cfg_cap *cfg_mask;
1671
1672 virtio_pci_modern_regions_init(proxy, vdev->name);
1673
1674 virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap);
1675 virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap);
1676 virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap);
1677 virtio_pci_modern_mem_region_map(proxy, &proxy->notify, &notify.cap);
1678
1679 if (modern_pio) {
1680 memory_region_init(&proxy->io_bar, OBJECT(proxy),
1681 "virtio-pci-io", 0x4);
1682
1683 pci_register_bar(&proxy->pci_dev, proxy->modern_io_bar_idx,
1684 PCI_BASE_ADDRESS_SPACE_IO, &proxy->io_bar);
1685
1686 virtio_pci_modern_io_region_map(proxy, &proxy->notify_pio,
1687 &notify_pio.cap);
1688 }
1689
1690 pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar_idx,
1691 PCI_BASE_ADDRESS_SPACE_MEMORY |
1692 PCI_BASE_ADDRESS_MEM_PREFETCH |
1693 PCI_BASE_ADDRESS_MEM_TYPE_64,
1694 &proxy->modern_bar);
1695
1696 proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap);
1697 cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap);
1698 pci_set_byte(&cfg_mask->cap.bar, ~0x0);
1699 pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0);
1700 pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0);
1701 pci_set_long(cfg_mask->pci_cfg_data, ~0x0);
1702 }
1703
1704 if (proxy->nvectors) {
1705 int err = msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors,
1706 proxy->msix_bar_idx, NULL);
1707 if (err) {
1708 /* Notice when a system that supports MSIx can't initialize it */
1709 if (err != -ENOTSUP) {
1710 warn_report("unable to init msix vectors to %" PRIu32,
1711 proxy->nvectors);
1712 }
1713 proxy->nvectors = 0;
1714 }
1715 }
1716
1717 proxy->pci_dev.config_write = virtio_write_config;
1718 proxy->pci_dev.config_read = virtio_read_config;
1719
1720 if (legacy) {
1721 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev)
1722 + virtio_bus_get_vdev_config_len(bus);
1723 size = pow2ceil(size);
1724
1725 memory_region_init_io(&proxy->bar, OBJECT(proxy),
1726 &virtio_pci_config_ops,
1727 proxy, "virtio-pci", size);
1728
1729 pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar_idx,
1730 PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar);
1731 }
1732 }
1733
1734 static void virtio_pci_device_unplugged(DeviceState *d)
1735 {
1736 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1737 bool modern = virtio_pci_modern(proxy);
1738 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
1739
1740 virtio_pci_stop_ioeventfd(proxy);
1741
1742 if (modern) {
1743 virtio_pci_modern_mem_region_unmap(proxy, &proxy->common);
1744 virtio_pci_modern_mem_region_unmap(proxy, &proxy->isr);
1745 virtio_pci_modern_mem_region_unmap(proxy, &proxy->device);
1746 virtio_pci_modern_mem_region_unmap(proxy, &proxy->notify);
1747 if (modern_pio) {
1748 virtio_pci_modern_io_region_unmap(proxy, &proxy->notify_pio);
1749 }
1750 }
1751 }
1752
1753 static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
1754 {
1755 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
1756 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev);
1757 bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) &&
1758 !pci_bus_is_root(pci_get_bus(pci_dev));
1759
1760 if (kvm_enabled() && !kvm_has_many_ioeventfds()) {
1761 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD;
1762 }
1763
1764 /* fd-based ioevents can't be synchronized in record/replay */
1765 if (replay_mode != REPLAY_MODE_NONE) {
1766 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD;
1767 }
1768
1769 /*
1770 * virtio pci bar layout used by default.
1771 * subclasses can re-arrange things if needed.
1772 *
1773 * region 0 -- virtio legacy io bar
1774 * region 1 -- msi-x bar
1775 * region 2 -- virtio modern io bar (off by default)
1776 * region 4+5 -- virtio modern memory (64bit) bar
1777 *
1778 */
1779 proxy->legacy_io_bar_idx = 0;
1780 proxy->msix_bar_idx = 1;
1781 proxy->modern_io_bar_idx = 2;
1782 proxy->modern_mem_bar_idx = 4;
1783
1784 proxy->common.offset = 0x0;
1785 proxy->common.size = 0x1000;
1786 proxy->common.type = VIRTIO_PCI_CAP_COMMON_CFG;
1787
1788 proxy->isr.offset = 0x1000;
1789 proxy->isr.size = 0x1000;
1790 proxy->isr.type = VIRTIO_PCI_CAP_ISR_CFG;
1791
1792 proxy->device.offset = 0x2000;
1793 proxy->device.size = 0x1000;
1794 proxy->device.type = VIRTIO_PCI_CAP_DEVICE_CFG;
1795
1796 proxy->notify.offset = 0x3000;
1797 proxy->notify.size = virtio_pci_queue_mem_mult(proxy) * VIRTIO_QUEUE_MAX;
1798 proxy->notify.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
1799
1800 proxy->notify_pio.offset = 0x0;
1801 proxy->notify_pio.size = 0x4;
1802 proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
1803
1804 /* subclasses can enforce modern, so do this unconditionally */
1805 memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci",
1806 /* PCI BAR regions must be powers of 2 */
1807 pow2ceil(proxy->notify.offset + proxy->notify.size));
1808
1809 if (proxy->disable_legacy == ON_OFF_AUTO_AUTO) {
1810 proxy->disable_legacy = pcie_port ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
1811 }
1812
1813 if (!virtio_pci_modern(proxy) && !virtio_pci_legacy(proxy)) {
1814 error_setg(errp, "device cannot work as neither modern nor legacy mode"
1815 " is enabled");
1816 error_append_hint(errp, "Set either disable-modern or disable-legacy"
1817 " to off\n");
1818 return;
1819 }
1820
1821 if (pcie_port && pci_is_express(pci_dev)) {
1822 int pos;
1823 uint16_t last_pcie_cap_offset = PCI_CONFIG_SPACE_SIZE;
1824
1825 pos = pcie_endpoint_cap_init(pci_dev, 0);
1826 assert(pos > 0);
1827
1828 pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0,
1829 PCI_PM_SIZEOF, errp);
1830 if (pos < 0) {
1831 return;
1832 }
1833
1834 pci_dev->exp.pm_cap = pos;
1835
1836 /*
1837 * Indicates that this function complies with revision 1.2 of the
1838 * PCI Power Management Interface Specification.
1839 */
1840 pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
1841
1842 if (proxy->flags & VIRTIO_PCI_FLAG_AER) {
1843 pcie_aer_init(pci_dev, PCI_ERR_VER, last_pcie_cap_offset,
1844 PCI_ERR_SIZEOF, NULL);
1845 last_pcie_cap_offset += PCI_ERR_SIZEOF;
1846 }
1847
1848 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) {
1849 /* Init error enabling flags */
1850 pcie_cap_deverr_init(pci_dev);
1851 }
1852
1853 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_LNKCTL) {
1854 /* Init Link Control Register */
1855 pcie_cap_lnkctl_init(pci_dev);
1856 }
1857
1858 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) {
1859 /* Init Power Management Control Register */
1860 pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL,
1861 PCI_PM_CTRL_STATE_MASK);
1862 }
1863
1864 if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
1865 pcie_ats_init(pci_dev, last_pcie_cap_offset,
1866 proxy->flags & VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED);
1867 last_pcie_cap_offset += PCI_EXT_CAP_ATS_SIZEOF;
1868 }
1869
1870 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) {
1871 /* Set Function Level Reset capability bit */
1872 pcie_cap_flr_init(pci_dev);
1873 }
1874 } else {
1875 /*
1876 * make future invocations of pci_is_express() return false
1877 * and pci_config_size() return PCI_CONFIG_SPACE_SIZE.
1878 */
1879 pci_dev->cap_present &= ~QEMU_PCI_CAP_EXPRESS;
1880 }
1881
1882 virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy);
1883 if (k->realize) {
1884 k->realize(proxy, errp);
1885 }
1886 }
1887
1888 static void virtio_pci_exit(PCIDevice *pci_dev)
1889 {
1890 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
1891 bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) &&
1892 !pci_bus_is_root(pci_get_bus(pci_dev));
1893
1894 msix_uninit_exclusive_bar(pci_dev);
1895 if (proxy->flags & VIRTIO_PCI_FLAG_AER && pcie_port &&
1896 pci_is_express(pci_dev)) {
1897 pcie_aer_exit(pci_dev);
1898 }
1899 }
1900
1901 static void virtio_pci_reset(DeviceState *qdev)
1902 {
1903 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
1904 VirtioBusState *bus = VIRTIO_BUS(&proxy->bus);
1905 PCIDevice *dev = PCI_DEVICE(qdev);
1906 int i;
1907
1908 virtio_pci_stop_ioeventfd(proxy);
1909 virtio_bus_reset(bus);
1910 msix_unuse_all_vectors(&proxy->pci_dev);
1911
1912 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
1913 proxy->vqs[i].enabled = 0;
1914 proxy->vqs[i].num = 0;
1915 proxy->vqs[i].desc[0] = proxy->vqs[i].desc[1] = 0;
1916 proxy->vqs[i].avail[0] = proxy->vqs[i].avail[1] = 0;
1917 proxy->vqs[i].used[0] = proxy->vqs[i].used[1] = 0;
1918 }
1919
1920 if (pci_is_express(dev)) {
1921 pcie_cap_deverr_reset(dev);
1922 pcie_cap_lnkctl_reset(dev);
1923
1924 pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 0);
1925 }
1926 }
1927
1928 static Property virtio_pci_properties[] = {
1929 DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags,
1930 VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false),
1931 DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags,
1932 VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true),
1933 DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags,
1934 VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false),
1935 DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags,
1936 VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false),
1937 DEFINE_PROP_BIT("page-per-vq", VirtIOPCIProxy, flags,
1938 VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, false),
1939 DEFINE_PROP_BOOL("x-ignore-backend-features", VirtIOPCIProxy,
1940 ignore_backend_features, false),
1941 DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags,
1942 VIRTIO_PCI_FLAG_ATS_BIT, false),
1943 DEFINE_PROP_BIT("x-ats-page-aligned", VirtIOPCIProxy, flags,
1944 VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT, true),
1945 DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags,
1946 VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true),
1947 DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags,
1948 VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true),
1949 DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags,
1950 VIRTIO_PCI_FLAG_INIT_PM_BIT, true),
1951 DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags,
1952 VIRTIO_PCI_FLAG_INIT_FLR_BIT, true),
1953 DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags,
1954 VIRTIO_PCI_FLAG_AER_BIT, false),
1955 DEFINE_PROP_END_OF_LIST(),
1956 };
1957
1958 static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp)
1959 {
1960 VirtioPCIClass *vpciklass = VIRTIO_PCI_GET_CLASS(qdev);
1961 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
1962 PCIDevice *pci_dev = &proxy->pci_dev;
1963
1964 if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE) &&
1965 virtio_pci_modern(proxy)) {
1966 pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
1967 }
1968
1969 vpciklass->parent_dc_realize(qdev, errp);
1970 }
1971
1972 static void virtio_pci_class_init(ObjectClass *klass, void *data)
1973 {
1974 DeviceClass *dc = DEVICE_CLASS(klass);
1975 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1976 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass);
1977
1978 device_class_set_props(dc, virtio_pci_properties);
1979 k->realize = virtio_pci_realize;
1980 k->exit = virtio_pci_exit;
1981 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1982 k->revision = VIRTIO_PCI_ABI_VERSION;
1983 k->class_id = PCI_CLASS_OTHERS;
1984 device_class_set_parent_realize(dc, virtio_pci_dc_realize,
1985 &vpciklass->parent_dc_realize);
1986 dc->reset = virtio_pci_reset;
1987 }
1988
1989 static const TypeInfo virtio_pci_info = {
1990 .name = TYPE_VIRTIO_PCI,
1991 .parent = TYPE_PCI_DEVICE,
1992 .instance_size = sizeof(VirtIOPCIProxy),
1993 .class_init = virtio_pci_class_init,
1994 .class_size = sizeof(VirtioPCIClass),
1995 .abstract = true,
1996 };
1997
1998 static Property virtio_pci_generic_properties[] = {
1999 DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy,
2000 ON_OFF_AUTO_AUTO),
2001 DEFINE_PROP_BOOL("disable-modern", VirtIOPCIProxy, disable_modern, false),
2002 DEFINE_PROP_END_OF_LIST(),
2003 };
2004
2005 static void virtio_pci_base_class_init(ObjectClass *klass, void *data)
2006 {
2007 const VirtioPCIDeviceTypeInfo *t = data;
2008 if (t->class_init) {
2009 t->class_init(klass, NULL);
2010 }
2011 }
2012
2013 static void virtio_pci_generic_class_init(ObjectClass *klass, void *data)
2014 {
2015 DeviceClass *dc = DEVICE_CLASS(klass);
2016
2017 device_class_set_props(dc, virtio_pci_generic_properties);
2018 }
2019
2020 static void virtio_pci_transitional_instance_init(Object *obj)
2021 {
2022 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj);
2023
2024 proxy->disable_legacy = ON_OFF_AUTO_OFF;
2025 proxy->disable_modern = false;
2026 }
2027
2028 static void virtio_pci_non_transitional_instance_init(Object *obj)
2029 {
2030 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj);
2031
2032 proxy->disable_legacy = ON_OFF_AUTO_ON;
2033 proxy->disable_modern = false;
2034 }
2035
2036 void virtio_pci_types_register(const VirtioPCIDeviceTypeInfo *t)
2037 {
2038 char *base_name = NULL;
2039 TypeInfo base_type_info = {
2040 .name = t->base_name,
2041 .parent = t->parent ? t->parent : TYPE_VIRTIO_PCI,
2042 .instance_size = t->instance_size,
2043 .instance_init = t->instance_init,
2044 .class_size = t->class_size,
2045 .abstract = true,
2046 .interfaces = t->interfaces,
2047 };
2048 TypeInfo generic_type_info = {
2049 .name = t->generic_name,
2050 .parent = base_type_info.name,
2051 .class_init = virtio_pci_generic_class_init,
2052 .interfaces = (InterfaceInfo[]) {
2053 { INTERFACE_PCIE_DEVICE },
2054 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
2055 { }
2056 },
2057 };
2058
2059 if (!base_type_info.name) {
2060 /* No base type -> register a single generic device type */
2061 /* use intermediate %s-base-type to add generic device props */
2062 base_name = g_strdup_printf("%s-base-type", t->generic_name);
2063 base_type_info.name = base_name;
2064 base_type_info.class_init = virtio_pci_generic_class_init;
2065
2066 generic_type_info.parent = base_name;
2067 generic_type_info.class_init = virtio_pci_base_class_init;
2068 generic_type_info.class_data = (void *)t;
2069
2070 assert(!t->non_transitional_name);
2071 assert(!t->transitional_name);
2072 } else {
2073 base_type_info.class_init = virtio_pci_base_class_init;
2074 base_type_info.class_data = (void *)t;
2075 }
2076
2077 type_register(&base_type_info);
2078 if (generic_type_info.name) {
2079 type_register(&generic_type_info);
2080 }
2081
2082 if (t->non_transitional_name) {
2083 const TypeInfo non_transitional_type_info = {
2084 .name = t->non_transitional_name,
2085 .parent = base_type_info.name,
2086 .instance_init = virtio_pci_non_transitional_instance_init,
2087 .interfaces = (InterfaceInfo[]) {
2088 { INTERFACE_PCIE_DEVICE },
2089 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
2090 { }
2091 },
2092 };
2093 type_register(&non_transitional_type_info);
2094 }
2095
2096 if (t->transitional_name) {
2097 const TypeInfo transitional_type_info = {
2098 .name = t->transitional_name,
2099 .parent = base_type_info.name,
2100 .instance_init = virtio_pci_transitional_instance_init,
2101 .interfaces = (InterfaceInfo[]) {
2102 /*
2103 * Transitional virtio devices work only as Conventional PCI
2104 * devices because they require PIO ports.
2105 */
2106 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
2107 { }
2108 },
2109 };
2110 type_register(&transitional_type_info);
2111 }
2112 g_free(base_name);
2113 }
2114
2115 unsigned virtio_pci_optimal_num_queues(unsigned fixed_queues)
2116 {
2117 /*
2118 * 1:1 vq to vCPU mapping is ideal because the same vCPU that submitted
2119 * virtqueue buffers can handle their completion. When a different vCPU
2120 * handles completion it may need to IPI the vCPU that submitted the
2121 * request and this adds overhead.
2122 *
2123 * Virtqueues consume guest RAM and MSI-X vectors. This is wasteful in
2124 * guests with very many vCPUs and a device that is only used by a few
2125 * vCPUs. Unfortunately optimizing that case requires manual pinning inside
2126 * the guest, so those users might as well manually set the number of
2127 * queues. There is no upper limit that can be applied automatically and
2128 * doing so arbitrarily would result in a sudden performance drop once the
2129 * threshold number of vCPUs is exceeded.
2130 */
2131 unsigned num_queues = current_machine->smp.cpus;
2132
2133 /*
2134 * The maximum number of MSI-X vectors is PCI_MSIX_FLAGS_QSIZE + 1, but the
2135 * config change interrupt and the fixed virtqueues must be taken into
2136 * account too.
2137 */
2138 num_queues = MIN(num_queues, PCI_MSIX_FLAGS_QSIZE - fixed_queues);
2139
2140 /*
2141 * There is a limit to how many virtqueues a device can have.
2142 */
2143 return MIN(num_queues, VIRTIO_QUEUE_MAX - fixed_queues);
2144 }
2145
2146 /* virtio-pci-bus */
2147
2148 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
2149 VirtIOPCIProxy *dev)
2150 {
2151 DeviceState *qdev = DEVICE(dev);
2152 char virtio_bus_name[] = "virtio-bus";
2153
2154 qbus_create_inplace(bus, bus_size, TYPE_VIRTIO_PCI_BUS, qdev,
2155 virtio_bus_name);
2156 }
2157
2158 static void virtio_pci_bus_class_init(ObjectClass *klass, void *data)
2159 {
2160 BusClass *bus_class = BUS_CLASS(klass);
2161 VirtioBusClass *k = VIRTIO_BUS_CLASS(klass);
2162 bus_class->max_dev = 1;
2163 k->notify = virtio_pci_notify;
2164 k->save_config = virtio_pci_save_config;
2165 k->load_config = virtio_pci_load_config;
2166 k->save_queue = virtio_pci_save_queue;
2167 k->load_queue = virtio_pci_load_queue;
2168 k->save_extra_state = virtio_pci_save_extra_state;
2169 k->load_extra_state = virtio_pci_load_extra_state;
2170 k->has_extra_state = virtio_pci_has_extra_state;
2171 k->query_guest_notifiers = virtio_pci_query_guest_notifiers;
2172 k->set_guest_notifiers = virtio_pci_set_guest_notifiers;
2173 k->set_host_notifier_mr = virtio_pci_set_host_notifier_mr;
2174 k->vmstate_change = virtio_pci_vmstate_change;
2175 k->pre_plugged = virtio_pci_pre_plugged;
2176 k->device_plugged = virtio_pci_device_plugged;
2177 k->device_unplugged = virtio_pci_device_unplugged;
2178 k->query_nvectors = virtio_pci_query_nvectors;
2179 k->ioeventfd_enabled = virtio_pci_ioeventfd_enabled;
2180 k->ioeventfd_assign = virtio_pci_ioeventfd_assign;
2181 k->get_dma_as = virtio_pci_get_dma_as;
2182 k->queue_enabled = virtio_pci_queue_enabled;
2183 }
2184
2185 static const TypeInfo virtio_pci_bus_info = {
2186 .name = TYPE_VIRTIO_PCI_BUS,
2187 .parent = TYPE_VIRTIO_BUS,
2188 .instance_size = sizeof(VirtioPCIBusState),
2189 .class_size = sizeof(VirtioPCIBusClass),
2190 .class_init = virtio_pci_bus_class_init,
2191 };
2192
2193 static void virtio_pci_register_types(void)
2194 {
2195 /* Base types: */
2196 type_register_static(&virtio_pci_bus_info);
2197 type_register_static(&virtio_pci_info);
2198 }
2199
2200 type_init(virtio_pci_register_types)
2201
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