2 * Copyright (c) 2007, Neocleus Corporation.
3 * Copyright (c) 2007, Intel Corporation.
5 * This work is licensed under the terms of the GNU GPL, version 2. See
6 * the COPYING file in the top-level directory.
8 * Alex Novik <alex@neocleus.com>
9 * Allen Kay <allen.m.kay@intel.com>
10 * Guy Zana <guy@neocleus.com>
12 * This file implements direct PCI assignment to a HVM guest
16 * Interrupt Disable policy:
19 * Initialize(register_real_device)
20 * Map INTx(xc_physdev_map_pirq):
22 * - Set real Interrupt Disable bit to '1'.
23 * - Set machine_irq and assigned_device->machine_irq to '0'.
26 * Bind INTx(xc_domain_bind_pt_pci_irq):
28 * - Set real Interrupt Disable bit to '1'.
30 * - Decrement xen_pt_mapped_machine_irq[machine_irq]
31 * - Set assigned_device->machine_irq to '0'.
33 * Write to Interrupt Disable bit by guest software(xen_pt_cmd_reg_write)
35 * - Set real bit to '0' if assigned_device->machine_irq isn't '0'.
38 * - Set real bit to '1'.
41 * Initialize MSI register(xen_pt_msi_setup, xen_pt_msi_update)
42 * Bind MSI(xc_domain_update_msi_irq)
45 * - Set dev->msi->pirq to '-1'.
48 * Initialize MSI-X register(xen_pt_msix_update_one)
49 * Bind MSI-X(xc_domain_update_msi_irq)
52 * - Set entry->pirq to '-1'.
55 #include <sys/ioctl.h>
57 #include "hw/pci/pci.h"
58 #include "hw/xen/xen.h"
59 #include "hw/xen/xen_backend.h"
61 #include "qemu/range.h"
62 #include "exec/address-spaces.h"
64 #define XEN_PT_NR_IRQS (256)
65 static uint8_t xen_pt_mapped_machine_irq
[XEN_PT_NR_IRQS
] = {0};
67 void xen_pt_log(const PCIDevice
*d
, const char *f
, ...)
73 fprintf(stderr
, "[%02x:%02x.%d] ", pci_bus_num(d
->bus
),
74 PCI_SLOT(d
->devfn
), PCI_FUNC(d
->devfn
));
76 vfprintf(stderr
, f
, ap
);
82 static int xen_pt_pci_config_access_check(PCIDevice
*d
, uint32_t addr
, int len
)
84 /* check offset range */
86 XEN_PT_ERR(d
, "Failed to access register with offset exceeding 0xFF. "
87 "(addr: 0x%02x, len: %d)\n", addr
, len
);
92 if ((len
!= 1) && (len
!= 2) && (len
!= 4)) {
93 XEN_PT_ERR(d
, "Failed to access register with invalid access length. "
94 "(addr: 0x%02x, len: %d)\n", addr
, len
);
98 /* check offset alignment */
99 if (addr
& (len
- 1)) {
100 XEN_PT_ERR(d
, "Failed to access register with invalid access size "
101 "alignment. (addr: 0x%02x, len: %d)\n", addr
, len
);
108 int xen_pt_bar_offset_to_index(uint32_t offset
)
112 /* check Exp ROM BAR */
113 if (offset
== PCI_ROM_ADDRESS
) {
117 /* calculate BAR index */
118 index
= (offset
- PCI_BASE_ADDRESS_0
) >> 2;
119 if (index
>= PCI_NUM_REGIONS
) {
126 static uint32_t xen_pt_pci_read_config(PCIDevice
*d
, uint32_t addr
, int len
)
128 XenPCIPassthroughState
*s
= XEN_PT_DEVICE(d
);
130 XenPTRegGroup
*reg_grp_entry
= NULL
;
131 XenPTReg
*reg_entry
= NULL
;
134 uint32_t find_addr
= addr
;
136 if (xen_pt_pci_config_access_check(d
, addr
, len
)) {
140 /* find register group entry */
141 reg_grp_entry
= xen_pt_find_reg_grp(s
, addr
);
143 /* check 0-Hardwired register group */
144 if (reg_grp_entry
->reg_grp
->grp_type
== XEN_PT_GRP_TYPE_HARDWIRED
) {
145 /* no need to emulate, just return 0 */
151 /* read I/O device register value */
152 rc
= xen_host_pci_get_block(&s
->real_device
, addr
, (uint8_t *)&val
, len
);
154 XEN_PT_ERR(d
, "pci_read_block failed. return value: %d.\n", rc
);
155 memset(&val
, 0xff, len
);
158 /* just return the I/O device register value for
159 * passthrough type register group */
160 if (reg_grp_entry
== NULL
) {
164 /* adjust the read value to appropriate CFC-CFF window */
165 val
<<= (addr
& 3) << 3;
168 /* loop around the guest requested size */
169 while (emul_len
> 0) {
170 /* find register entry to be emulated */
171 reg_entry
= xen_pt_find_reg(reg_grp_entry
, find_addr
);
173 XenPTRegInfo
*reg
= reg_entry
->reg
;
174 uint32_t real_offset
= reg_grp_entry
->base_offset
+ reg
->offset
;
175 uint32_t valid_mask
= 0xFFFFFFFF >> ((4 - emul_len
) << 3);
176 uint8_t *ptr_val
= NULL
;
178 valid_mask
<<= (find_addr
- real_offset
) << 3;
179 ptr_val
= (uint8_t *)&val
+ (real_offset
& 3);
181 /* do emulation based on register size */
185 rc
= reg
->u
.b
.read(s
, reg_entry
, ptr_val
, valid_mask
);
190 rc
= reg
->u
.w
.read(s
, reg_entry
,
191 (uint16_t *)ptr_val
, valid_mask
);
195 if (reg
->u
.dw
.read
) {
196 rc
= reg
->u
.dw
.read(s
, reg_entry
,
197 (uint32_t *)ptr_val
, valid_mask
);
203 xen_shutdown_fatal_error("Internal error: Invalid read "
204 "emulation. (%s, rc: %d)\n",
209 /* calculate next address to find */
210 emul_len
-= reg
->size
;
212 find_addr
= real_offset
+ reg
->size
;
215 /* nothing to do with passthrough type register,
216 * continue to find next byte */
222 /* need to shift back before returning them to pci bus emulator */
223 val
>>= ((addr
& 3) << 3);
226 XEN_PT_LOG_CONFIG(d
, addr
, val
, len
);
230 static void xen_pt_pci_write_config(PCIDevice
*d
, uint32_t addr
,
231 uint32_t val
, int len
)
233 XenPCIPassthroughState
*s
= XEN_PT_DEVICE(d
);
235 XenPTRegGroup
*reg_grp_entry
= NULL
;
237 uint32_t read_val
= 0, wb_mask
;
239 XenPTReg
*reg_entry
= NULL
;
240 uint32_t find_addr
= addr
;
241 XenPTRegInfo
*reg
= NULL
;
242 bool wp_flag
= false;
244 if (xen_pt_pci_config_access_check(d
, addr
, len
)) {
248 XEN_PT_LOG_CONFIG(d
, addr
, val
, len
);
250 /* check unused BAR register */
251 index
= xen_pt_bar_offset_to_index(addr
);
252 if ((index
>= 0) && (val
> 0 && val
< XEN_PT_BAR_ALLF
) &&
253 (s
->bases
[index
].bar_flag
== XEN_PT_BAR_FLAG_UNUSED
)) {
254 XEN_PT_WARN(d
, "Guest attempt to set address to unused Base Address "
255 "Register. (addr: 0x%02x, len: %d)\n", addr
, len
);
258 /* find register group entry */
259 reg_grp_entry
= xen_pt_find_reg_grp(s
, addr
);
261 /* check 0-Hardwired register group */
262 if (reg_grp_entry
->reg_grp
->grp_type
== XEN_PT_GRP_TYPE_HARDWIRED
) {
263 /* ignore silently */
264 XEN_PT_WARN(d
, "Access to 0-Hardwired register. "
265 "(addr: 0x%02x, len: %d)\n", addr
, len
);
270 rc
= xen_host_pci_get_block(&s
->real_device
, addr
,
271 (uint8_t *)&read_val
, len
);
273 XEN_PT_ERR(d
, "pci_read_block failed. return value: %d.\n", rc
);
274 memset(&read_val
, 0xff, len
);
277 wb_mask
= 0xFFFFFFFF >> ((4 - len
) << 3);
280 /* pass directly to the real device for passthrough type register group */
281 if (reg_grp_entry
== NULL
) {
282 if (!s
->permissive
) {
289 memory_region_transaction_begin();
290 pci_default_write_config(d
, addr
, val
, len
);
292 /* adjust the read and write value to appropriate CFC-CFF window */
293 read_val
<<= (addr
& 3) << 3;
294 val
<<= (addr
& 3) << 3;
297 /* loop around the guest requested size */
298 while (emul_len
> 0) {
299 /* find register entry to be emulated */
300 reg_entry
= xen_pt_find_reg(reg_grp_entry
, find_addr
);
302 reg
= reg_entry
->reg
;
303 uint32_t real_offset
= reg_grp_entry
->base_offset
+ reg
->offset
;
304 uint32_t valid_mask
= 0xFFFFFFFF >> ((4 - emul_len
) << 3);
305 uint8_t *ptr_val
= NULL
;
306 uint32_t wp_mask
= reg
->emu_mask
| reg
->ro_mask
;
308 valid_mask
<<= (find_addr
- real_offset
) << 3;
309 ptr_val
= (uint8_t *)&val
+ (real_offset
& 3);
310 if (!s
->permissive
) {
311 wp_mask
|= reg
->res_mask
;
313 if (wp_mask
== (0xFFFFFFFF >> ((4 - reg
->size
) << 3))) {
314 wb_mask
&= ~((wp_mask
>> ((find_addr
- real_offset
) << 3))
315 << ((len
- emul_len
) << 3));
318 /* do emulation based on register size */
321 if (reg
->u
.b
.write
) {
322 rc
= reg
->u
.b
.write(s
, reg_entry
, ptr_val
,
323 read_val
>> ((real_offset
& 3) << 3),
328 if (reg
->u
.w
.write
) {
329 rc
= reg
->u
.w
.write(s
, reg_entry
, (uint16_t *)ptr_val
,
330 (read_val
>> ((real_offset
& 3) << 3)),
335 if (reg
->u
.dw
.write
) {
336 rc
= reg
->u
.dw
.write(s
, reg_entry
, (uint32_t *)ptr_val
,
337 (read_val
>> ((real_offset
& 3) << 3)),
344 xen_shutdown_fatal_error("Internal error: Invalid write"
345 " emulation. (%s, rc: %d)\n",
350 /* calculate next address to find */
351 emul_len
-= reg
->size
;
353 find_addr
= real_offset
+ reg
->size
;
356 /* nothing to do with passthrough type register,
357 * continue to find next byte */
358 if (!s
->permissive
) {
359 wb_mask
&= ~(0xff << ((len
- emul_len
) << 3));
360 /* Unused BARs will make it here, but we don't want to issue
361 * warnings for writes to them (bogus writes get dealt with
373 /* need to shift back before passing them to xen_host_pci_device */
374 val
>>= (addr
& 3) << 3;
376 memory_region_transaction_commit();
379 if (wp_flag
&& !s
->permissive_warned
) {
380 s
->permissive_warned
= true;
381 xen_pt_log(d
, "Write-back to unknown field 0x%02x (partially) inhibited (0x%0*x)\n",
382 addr
, len
* 2, wb_mask
);
383 xen_pt_log(d
, "If the device doesn't work, try enabling permissive mode\n");
384 xen_pt_log(d
, "(unsafe) and if it helps report the problem to xen-devel\n");
386 for (index
= 0; wb_mask
; index
+= len
) {
387 /* unknown regs are passed through */
388 while (!(wb_mask
& 0xff)) {
396 } while (wb_mask
& 0xff);
397 rc
= xen_host_pci_set_block(&s
->real_device
, addr
+ index
,
398 (uint8_t *)&val
+ index
, len
);
401 XEN_PT_ERR(d
, "pci_write_block failed. return value: %d.\n", rc
);
406 /* register regions */
408 static uint64_t xen_pt_bar_read(void *o
, hwaddr addr
,
412 /* if this function is called, that probably means that there is a
413 * misconfiguration of the IOMMU. */
414 XEN_PT_ERR(d
, "Should not read BAR through QEMU. @0x"TARGET_FMT_plx
"\n",
418 static void xen_pt_bar_write(void *o
, hwaddr addr
, uint64_t val
,
422 /* Same comment as xen_pt_bar_read function */
423 XEN_PT_ERR(d
, "Should not write BAR through QEMU. @0x"TARGET_FMT_plx
"\n",
427 static const MemoryRegionOps ops
= {
428 .endianness
= DEVICE_NATIVE_ENDIAN
,
429 .read
= xen_pt_bar_read
,
430 .write
= xen_pt_bar_write
,
433 static int xen_pt_register_regions(XenPCIPassthroughState
*s
, uint16_t *cmd
)
436 XenHostPCIDevice
*d
= &s
->real_device
;
438 /* Register PIO/MMIO BARs */
439 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
440 XenHostPCIIORegion
*r
= &d
->io_regions
[i
];
443 if (r
->base_addr
== 0 || r
->size
== 0) {
447 s
->bases
[i
].access
.u
= r
->base_addr
;
449 if (r
->type
& XEN_HOST_PCI_REGION_TYPE_IO
) {
450 type
= PCI_BASE_ADDRESS_SPACE_IO
;
451 *cmd
|= PCI_COMMAND_IO
;
453 type
= PCI_BASE_ADDRESS_SPACE_MEMORY
;
454 if (r
->type
& XEN_HOST_PCI_REGION_TYPE_PREFETCH
) {
455 type
|= PCI_BASE_ADDRESS_MEM_PREFETCH
;
457 if (r
->type
& XEN_HOST_PCI_REGION_TYPE_MEM_64
) {
458 type
|= PCI_BASE_ADDRESS_MEM_TYPE_64
;
460 *cmd
|= PCI_COMMAND_MEMORY
;
463 memory_region_init_io(&s
->bar
[i
], OBJECT(s
), &ops
, &s
->dev
,
464 "xen-pci-pt-bar", r
->size
);
465 pci_register_bar(&s
->dev
, i
, type
, &s
->bar
[i
]);
467 XEN_PT_LOG(&s
->dev
, "IO region %i registered (size=0x%08"PRIx64
468 " base_addr=0x%08"PRIx64
" type: %#x)\n",
469 i
, r
->size
, r
->base_addr
, type
);
472 /* Register expansion ROM address */
473 if (d
->rom
.base_addr
&& d
->rom
.size
) {
474 uint32_t bar_data
= 0;
476 /* Re-set BAR reported by OS, otherwise ROM can't be read. */
477 if (xen_host_pci_get_long(d
, PCI_ROM_ADDRESS
, &bar_data
)) {
480 if ((bar_data
& PCI_ROM_ADDRESS_MASK
) == 0) {
481 bar_data
|= d
->rom
.base_addr
& PCI_ROM_ADDRESS_MASK
;
482 xen_host_pci_set_long(d
, PCI_ROM_ADDRESS
, bar_data
);
485 s
->bases
[PCI_ROM_SLOT
].access
.maddr
= d
->rom
.base_addr
;
487 memory_region_init_io(&s
->rom
, OBJECT(s
), &ops
, &s
->dev
,
488 "xen-pci-pt-rom", d
->rom
.size
);
489 pci_register_bar(&s
->dev
, PCI_ROM_SLOT
, PCI_BASE_ADDRESS_MEM_PREFETCH
,
492 XEN_PT_LOG(&s
->dev
, "Expansion ROM registered (size=0x%08"PRIx64
493 " base_addr=0x%08"PRIx64
")\n",
494 d
->rom
.size
, d
->rom
.base_addr
);
502 static int xen_pt_bar_from_region(XenPCIPassthroughState
*s
, MemoryRegion
*mr
)
506 for (i
= 0; i
< PCI_NUM_REGIONS
- 1; i
++) {
507 if (mr
== &s
->bar
[i
]) {
518 * This function checks if an io_region overlaps an io_region from another
519 * device. The io_region to check is provided with (addr, size and type)
520 * A callback can be provided and will be called for every region that is
522 * The return value indicates if the region is overlappsed */
523 struct CheckBarArgs
{
524 XenPCIPassthroughState
*s
;
530 static void xen_pt_check_bar_overlap(PCIBus
*bus
, PCIDevice
*d
, void *opaque
)
532 struct CheckBarArgs
*arg
= opaque
;
533 XenPCIPassthroughState
*s
= arg
->s
;
534 uint8_t type
= arg
->type
;
537 if (d
->devfn
== s
->dev
.devfn
) {
541 /* xxx: This ignores bridges. */
542 for (i
= 0; i
< PCI_NUM_REGIONS
; i
++) {
543 const PCIIORegion
*r
= &d
->io_regions
[i
];
548 if ((type
& PCI_BASE_ADDRESS_SPACE_IO
)
549 != (r
->type
& PCI_BASE_ADDRESS_SPACE_IO
)) {
553 if (ranges_overlap(arg
->addr
, arg
->size
, r
->addr
, r
->size
)) {
555 "Overlapped to device [%02x:%02x.%d] Region: %i"
556 " (addr: %#"FMT_PCIBUS
", len: %#"FMT_PCIBUS
")\n",
557 pci_bus_num(bus
), PCI_SLOT(d
->devfn
),
558 PCI_FUNC(d
->devfn
), i
, r
->addr
, r
->size
);
564 static void xen_pt_region_update(XenPCIPassthroughState
*s
,
565 MemoryRegionSection
*sec
, bool adding
)
567 PCIDevice
*d
= &s
->dev
;
568 MemoryRegion
*mr
= sec
->mr
;
571 int op
= adding
? DPCI_ADD_MAPPING
: DPCI_REMOVE_MAPPING
;
572 struct CheckBarArgs args
= {
574 .addr
= sec
->offset_within_address_space
,
575 .size
= int128_get64(sec
->size
),
579 bar
= xen_pt_bar_from_region(s
, mr
);
580 if (bar
== -1 && (!s
->msix
|| &s
->msix
->mmio
!= mr
)) {
584 if (s
->msix
&& &s
->msix
->mmio
== mr
) {
586 s
->msix
->mmio_base_addr
= sec
->offset_within_address_space
;
587 rc
= xen_pt_msix_update_remap(s
, s
->msix
->bar_index
);
592 args
.type
= d
->io_regions
[bar
].type
;
593 pci_for_each_device(d
->bus
, pci_bus_num(d
->bus
),
594 xen_pt_check_bar_overlap
, &args
);
596 XEN_PT_WARN(d
, "Region: %d (addr: %#"FMT_PCIBUS
597 ", len: %#"FMT_PCIBUS
") is overlapped.\n",
598 bar
, sec
->offset_within_address_space
,
599 int128_get64(sec
->size
));
602 if (d
->io_regions
[bar
].type
& PCI_BASE_ADDRESS_SPACE_IO
) {
603 uint32_t guest_port
= sec
->offset_within_address_space
;
604 uint32_t machine_port
= s
->bases
[bar
].access
.pio_base
;
605 uint32_t size
= int128_get64(sec
->size
);
606 rc
= xc_domain_ioport_mapping(xen_xc
, xen_domid
,
607 guest_port
, machine_port
, size
,
610 XEN_PT_ERR(d
, "%s ioport mapping failed! (rc: %i)\n",
611 adding
? "create new" : "remove old", rc
);
614 pcibus_t guest_addr
= sec
->offset_within_address_space
;
615 pcibus_t machine_addr
= s
->bases
[bar
].access
.maddr
616 + sec
->offset_within_region
;
617 pcibus_t size
= int128_get64(sec
->size
);
618 rc
= xc_domain_memory_mapping(xen_xc
, xen_domid
,
619 XEN_PFN(guest_addr
+ XC_PAGE_SIZE
- 1),
620 XEN_PFN(machine_addr
+ XC_PAGE_SIZE
- 1),
621 XEN_PFN(size
+ XC_PAGE_SIZE
- 1),
624 XEN_PT_ERR(d
, "%s mem mapping failed! (rc: %i)\n",
625 adding
? "create new" : "remove old", rc
);
630 static void xen_pt_region_add(MemoryListener
*l
, MemoryRegionSection
*sec
)
632 XenPCIPassthroughState
*s
= container_of(l
, XenPCIPassthroughState
,
635 memory_region_ref(sec
->mr
);
636 xen_pt_region_update(s
, sec
, true);
639 static void xen_pt_region_del(MemoryListener
*l
, MemoryRegionSection
*sec
)
641 XenPCIPassthroughState
*s
= container_of(l
, XenPCIPassthroughState
,
644 xen_pt_region_update(s
, sec
, false);
645 memory_region_unref(sec
->mr
);
648 static void xen_pt_io_region_add(MemoryListener
*l
, MemoryRegionSection
*sec
)
650 XenPCIPassthroughState
*s
= container_of(l
, XenPCIPassthroughState
,
653 memory_region_ref(sec
->mr
);
654 xen_pt_region_update(s
, sec
, true);
657 static void xen_pt_io_region_del(MemoryListener
*l
, MemoryRegionSection
*sec
)
659 XenPCIPassthroughState
*s
= container_of(l
, XenPCIPassthroughState
,
662 xen_pt_region_update(s
, sec
, false);
663 memory_region_unref(sec
->mr
);
666 static const MemoryListener xen_pt_memory_listener
= {
667 .region_add
= xen_pt_region_add
,
668 .region_del
= xen_pt_region_del
,
672 static const MemoryListener xen_pt_io_listener
= {
673 .region_add
= xen_pt_io_region_add
,
674 .region_del
= xen_pt_io_region_del
,
680 static int xen_pt_initfn(PCIDevice
*d
)
682 XenPCIPassthroughState
*s
= XEN_PT_DEVICE(d
);
684 uint8_t machine_irq
= 0;
686 int pirq
= XEN_PT_UNASSIGNED_PIRQ
;
688 /* register real device */
689 XEN_PT_LOG(d
, "Assigning real physical device %02x:%02x.%d"
691 s
->hostaddr
.bus
, s
->hostaddr
.slot
, s
->hostaddr
.function
,
694 rc
= xen_host_pci_device_get(&s
->real_device
,
695 s
->hostaddr
.domain
, s
->hostaddr
.bus
,
696 s
->hostaddr
.slot
, s
->hostaddr
.function
);
698 XEN_PT_ERR(d
, "Failed to \"open\" the real pci device. rc: %i\n", rc
);
702 s
->is_virtfn
= s
->real_device
.is_virtfn
;
704 XEN_PT_LOG(d
, "%04x:%02x:%02x.%d is a SR-IOV Virtual Function\n",
705 s
->real_device
.domain
, s
->real_device
.bus
,
706 s
->real_device
.dev
, s
->real_device
.func
);
709 /* Initialize virtualized PCI configuration (Extended 256 Bytes) */
710 if (xen_host_pci_get_block(&s
->real_device
, 0, d
->config
,
711 PCI_CONFIG_SPACE_SIZE
) == -1) {
712 xen_host_pci_device_put(&s
->real_device
);
716 s
->memory_listener
= xen_pt_memory_listener
;
717 s
->io_listener
= xen_pt_io_listener
;
719 /* Handle real device's MMIO/PIO BARs */
720 xen_pt_register_regions(s
, &cmd
);
722 /* reinitialize each config register to be emulated */
723 if (xen_pt_config_init(s
)) {
724 XEN_PT_ERR(d
, "PCI Config space initialisation failed.\n");
725 xen_host_pci_device_put(&s
->real_device
);
730 if (!s
->dev
.config
[PCI_INTERRUPT_PIN
]) {
731 XEN_PT_LOG(d
, "no pin interrupt\n");
735 machine_irq
= s
->real_device
.irq
;
736 rc
= xc_physdev_map_pirq(xen_xc
, xen_domid
, machine_irq
, &pirq
);
739 XEN_PT_ERR(d
, "Mapping machine irq %u to pirq %i failed, (rc: %d)\n",
740 machine_irq
, pirq
, rc
);
742 /* Disable PCI intx assertion (turn on bit10 of devctl) */
743 xen_host_pci_set_word(&s
->real_device
,
745 pci_get_word(s
->dev
.config
+ PCI_COMMAND
)
746 | PCI_COMMAND_INTX_DISABLE
);
751 s
->machine_irq
= pirq
;
752 xen_pt_mapped_machine_irq
[machine_irq
]++;
755 /* bind machine_irq to device */
756 if (machine_irq
!= 0) {
757 uint8_t e_intx
= xen_pt_pci_intx(s
);
759 rc
= xc_domain_bind_pt_pci_irq(xen_xc
, xen_domid
, machine_irq
,
764 XEN_PT_ERR(d
, "Binding of interrupt %i failed! (rc: %d)\n",
767 /* Disable PCI intx assertion (turn on bit10 of devctl) */
768 xen_host_pci_set_word(&s
->real_device
, PCI_COMMAND
,
769 *(uint16_t *)(&s
->dev
.config
[PCI_COMMAND
])
770 | PCI_COMMAND_INTX_DISABLE
);
771 xen_pt_mapped_machine_irq
[machine_irq
]--;
773 if (xen_pt_mapped_machine_irq
[machine_irq
] == 0) {
774 if (xc_physdev_unmap_pirq(xen_xc
, xen_domid
, machine_irq
)) {
775 XEN_PT_ERR(d
, "Unmapping of machine interrupt %i failed!"
776 " (rc: %d)\n", machine_irq
, rc
);
785 xen_host_pci_set_word(&s
->real_device
, PCI_COMMAND
,
786 pci_get_word(d
->config
+ PCI_COMMAND
) | cmd
);
789 memory_listener_register(&s
->memory_listener
, &s
->dev
.bus_master_as
);
790 memory_listener_register(&s
->io_listener
, &address_space_io
);
792 "Real physical device %02x:%02x.%d registered successfully!\n",
793 s
->hostaddr
.bus
, s
->hostaddr
.slot
, s
->hostaddr
.function
);
798 static void xen_pt_unregister_device(PCIDevice
*d
)
800 XenPCIPassthroughState
*s
= XEN_PT_DEVICE(d
);
801 uint8_t machine_irq
= s
->machine_irq
;
802 uint8_t intx
= xen_pt_pci_intx(s
);
806 rc
= xc_domain_unbind_pt_irq(xen_xc
, xen_domid
, machine_irq
,
809 PCI_SLOT(s
->dev
.devfn
),
813 XEN_PT_ERR(d
, "unbinding of interrupt INT%c failed."
814 " (machine irq: %i, rc: %d)"
815 " But bravely continuing on..\n",
816 'a' + intx
, machine_irq
, rc
);
821 xen_pt_msi_disable(s
);
824 xen_pt_msix_disable(s
);
828 xen_pt_mapped_machine_irq
[machine_irq
]--;
830 if (xen_pt_mapped_machine_irq
[machine_irq
] == 0) {
831 rc
= xc_physdev_unmap_pirq(xen_xc
, xen_domid
, machine_irq
);
834 XEN_PT_ERR(d
, "unmapping of interrupt %i failed. (rc: %d)"
835 " But bravely continuing on..\n",
841 /* delete all emulated config registers */
842 xen_pt_config_delete(s
);
844 memory_listener_unregister(&s
->memory_listener
);
845 memory_listener_unregister(&s
->io_listener
);
847 xen_host_pci_device_put(&s
->real_device
);
850 static Property xen_pci_passthrough_properties
[] = {
851 DEFINE_PROP_PCI_HOST_DEVADDR("hostaddr", XenPCIPassthroughState
, hostaddr
),
852 DEFINE_PROP_BOOL("permissive", XenPCIPassthroughState
, permissive
, false),
853 DEFINE_PROP_END_OF_LIST(),
856 static void xen_pci_passthrough_class_init(ObjectClass
*klass
, void *data
)
858 DeviceClass
*dc
= DEVICE_CLASS(klass
);
859 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
861 k
->init
= xen_pt_initfn
;
862 k
->exit
= xen_pt_unregister_device
;
863 k
->config_read
= xen_pt_pci_read_config
;
864 k
->config_write
= xen_pt_pci_write_config
;
865 set_bit(DEVICE_CATEGORY_MISC
, dc
->categories
);
866 dc
->desc
= "Assign an host PCI device with Xen";
867 dc
->props
= xen_pci_passthrough_properties
;
870 static const TypeInfo xen_pci_passthrough_info
= {
871 .name
= TYPE_XEN_PT_DEVICE
,
872 .parent
= TYPE_PCI_DEVICE
,
873 .instance_size
= sizeof(XenPCIPassthroughState
),
874 .class_init
= xen_pci_passthrough_class_init
,
877 static void xen_pci_passthrough_register_types(void)
879 type_register_static(&xen_pci_passthrough_info
);
882 type_init(xen_pci_passthrough_register_types
)