]>
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1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright (C) 1988, 89, 91, 93, 94, 95, 96, 97, 1998
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
24 * modified by John Hassey (hassey@dg-rtp.dg.com)
28 * The main tables describing the instructions is essentially a copy
29 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
30 * Programmers Manual. Usually, there is a capital letter, followed
31 * by a small letter. The capital letter tell the addressing mode,
32 * and the small letter tells about the operand size. Refer to
33 * the Intel manual for details.
42 static int fetch_data
PARAMS ((struct disassemble_info
*, bfd_byte
*));
46 /* Points to first byte not fetched. */
47 bfd_byte
*max_fetched
;
48 bfd_byte the_buffer
[MAXLEN
];
53 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
54 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
56 #define FETCH_DATA(info, addr) \
57 ((addr) <= ((struct dis_private *)(info->private_data))->max_fetched \
58 ? 1 : fetch_data ((info), (addr)))
61 fetch_data (info
, addr
)
62 struct disassemble_info
*info
;
66 struct dis_private
*priv
= (struct dis_private
*)info
->private_data
;
67 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
69 status
= (*info
->read_memory_func
) (start
,
71 addr
- priv
->max_fetched
,
75 (*info
->memory_error_func
) (status
, start
, info
);
76 longjmp (priv
->bailout
, 1);
79 priv
->max_fetched
= addr
;
83 #define Eb OP_E, b_mode
84 #define indirEb OP_indirE, b_mode
85 #define Gb OP_G, b_mode
86 #define Ev OP_E, v_mode
87 #define indirEv OP_indirE, v_mode
88 #define Ew OP_E, w_mode
89 #define Ma OP_E, v_mode
91 #define Mp OP_E, 0 /* ? */
92 #define Gv OP_G, v_mode
93 #define Gw OP_G, w_mode
94 #define Rw OP_rm, w_mode
95 #define Rd OP_rm, d_mode
96 #define Ib OP_I, b_mode
97 #define sIb OP_sI, b_mode /* sign extened byte */
98 #define Iv OP_I, v_mode
99 #define Iw OP_I, w_mode
100 #define Jb OP_J, b_mode
101 #define Jv OP_J, v_mode
103 #define ONE OP_ONE, 0
105 #define Cd OP_C, d_mode
106 #define Dd OP_D, d_mode
107 #define Td OP_T, d_mode
109 #define eAX OP_REG, eAX_reg
110 #define eBX OP_REG, eBX_reg
111 #define eCX OP_REG, eCX_reg
112 #define eDX OP_REG, eDX_reg
113 #define eSP OP_REG, eSP_reg
114 #define eBP OP_REG, eBP_reg
115 #define eSI OP_REG, eSI_reg
116 #define eDI OP_REG, eDI_reg
117 #define AL OP_REG, al_reg
118 #define CL OP_REG, cl_reg
119 #define DL OP_REG, dl_reg
120 #define BL OP_REG, bl_reg
121 #define AH OP_REG, ah_reg
122 #define CH OP_REG, ch_reg
123 #define DH OP_REG, dh_reg
124 #define BH OP_REG, bh_reg
125 #define AX OP_REG, ax_reg
126 #define DX OP_REG, dx_reg
127 #define indirDX OP_REG, indir_dx_reg
129 #define Sw OP_SEG, w_mode
130 #define Ap OP_DIR, lptr
131 #define Av OP_DIR, v_mode
132 #define Ob OP_OFF, b_mode
133 #define Ov OP_OFF, v_mode
134 #define Xb OP_DSSI, b_mode
135 #define Xv OP_DSSI, v_mode
136 #define Yb OP_ESDI, b_mode
137 #define Yv OP_ESDI, v_mode
139 #define es OP_REG, es_reg
140 #define ss OP_REG, ss_reg
141 #define cs OP_REG, cs_reg
142 #define ds OP_REG, ds_reg
143 #define fs OP_REG, fs_reg
144 #define gs OP_REG, gs_reg
147 #define EM OP_EM, v_mode
148 #define MS OP_MS, b_mode
150 typedef int (*op_rtn
) PARAMS ((int bytemode
, int aflag
, int dflag
));
152 static int OP_E
PARAMS ((int, int, int));
153 static int OP_G
PARAMS ((int, int, int));
154 static int OP_I
PARAMS ((int, int, int));
155 static int OP_indirE
PARAMS ((int, int, int));
156 static int OP_sI
PARAMS ((int, int, int));
157 static int OP_REG
PARAMS ((int, int, int));
158 static int OP_J
PARAMS ((int, int, int));
159 static int OP_DIR
PARAMS ((int, int, int));
160 static int OP_OFF
PARAMS ((int, int, int));
161 static int OP_ESDI
PARAMS ((int, int, int));
162 static int OP_DSSI
PARAMS ((int, int, int));
163 static int OP_SEG
PARAMS ((int, int, int));
164 static int OP_C
PARAMS ((int, int, int));
165 static int OP_D
PARAMS ((int, int, int));
166 static int OP_T
PARAMS ((int, int, int));
167 static int OP_rm
PARAMS ((int, int, int));
168 static int OP_ST
PARAMS ((int, int, int));
169 static int OP_STi
PARAMS ((int, int, int));
171 static int OP_ONE
PARAMS ((int, int, int));
173 static int OP_MMX
PARAMS ((int, int, int));
174 static int OP_EM
PARAMS ((int, int, int));
175 static int OP_MS
PARAMS ((int, int, int));
177 static void append_prefix
PARAMS ((void));
178 static void set_op
PARAMS ((int op
));
179 static void putop
PARAMS ((char *template, int aflag
, int dflag
));
180 static void dofloat
PARAMS ((int aflag
, int dflag
));
181 static int get16
PARAMS ((void));
182 static int get32
PARAMS ((void));
183 static void ckprefix
PARAMS ((void));
225 #define indir_dx_reg 150
227 #define GRP1b NULL, NULL, 0
228 #define GRP1S NULL, NULL, 1
229 #define GRP1Ss NULL, NULL, 2
230 #define GRP2b NULL, NULL, 3
231 #define GRP2S NULL, NULL, 4
232 #define GRP2b_one NULL, NULL, 5
233 #define GRP2S_one NULL, NULL, 6
234 #define GRP2b_cl NULL, NULL, 7
235 #define GRP2S_cl NULL, NULL, 8
236 #define GRP3b NULL, NULL, 9
237 #define GRP3S NULL, NULL, 10
238 #define GRP4 NULL, NULL, 11
239 #define GRP5 NULL, NULL, 12
240 #define GRP6 NULL, NULL, 13
241 #define GRP7 NULL, NULL, 14
242 #define GRP8 NULL, NULL, 15
243 #define GRP9 NULL, NULL, 16
244 #define GRP10 NULL, NULL, 17
245 #define GRP11 NULL, NULL, 18
246 #define GRP12 NULL, NULL, 19
249 #define FLOAT NULL, NULL, FLOATCODE
261 static struct dis386 dis386
[] = {
279 { "(bad)" }, /* 0x0f extended opcode escape */
305 { "(bad)" }, /* SEG ES prefix */
314 { "(bad)" }, /* SEG CS prefix */
323 { "(bad)" }, /* SEG SS prefix */
332 { "(bad)" }, /* SEG DS prefix */
373 { "boundS", Gv
, Ma
},
375 { "(bad)" }, /* seg fs */
376 { "(bad)" }, /* seg gs */
377 { "(bad)" }, /* op size prefix */
378 { "(bad)" }, /* adr size prefix */
380 { "pushS", Iv
}, /* 386 book wrong */
381 { "imulS", Gv
, Ev
, Iv
},
382 { "pushS", sIb
}, /* push of byte really pushes 2 or 4 bytes */
383 { "imulS", Gv
, Ev
, Ib
},
384 { "insb", Yb
, indirDX
},
385 { "insS", Yv
, indirDX
},
386 { "outsb", indirDX
, Xb
},
387 { "outsS", indirDX
, Xv
},
426 { "xchgS", eCX
, eAX
},
427 { "xchgS", eDX
, eAX
},
428 { "xchgS", eBX
, eAX
},
429 { "xchgS", eSP
, eAX
},
430 { "xchgS", eBP
, eAX
},
431 { "xchgS", eSI
, eAX
},
432 { "xchgS", eDI
, eAX
},
437 { "(bad)" }, /* fwait */
453 { "testS", eAX
, Iv
},
455 { "stosS", Yv
, eAX
},
457 { "lodsS", eAX
, Xv
},
459 { "scasS", eAX
, Yv
},
528 { "inb", AL
, indirDX
},
529 { "inS", eAX
, indirDX
},
530 { "outb", indirDX
, AL
},
531 { "outS", indirDX
, eAX
},
533 { "(bad)" }, /* lock prefix */
535 { "(bad)" }, /* repne */
536 { "(bad)" }, /* repz */
552 static struct dis386 dis386_twobyte
[] = {
565 { "(bad)" }, { "ud2a" },
566 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
568 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
569 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
571 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
572 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
574 /* these are all backward in appendix A of the intel book */
584 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
585 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
587 { "wrmsr" }, { "rdtsc" }, { "rdmsr" }, { "rdpmc" },
588 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
590 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
591 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
593 { "cmovo", Gv
,Ev
}, { "cmovno", Gv
,Ev
}, { "cmovb", Gv
,Ev
}, { "cmovae", Gv
,Ev
},
594 { "cmove", Gv
,Ev
}, { "cmovne", Gv
,Ev
}, { "cmovbe", Gv
,Ev
}, { "cmova", Gv
,Ev
},
596 { "cmovs", Gv
,Ev
}, { "cmovns", Gv
,Ev
}, { "cmovp", Gv
,Ev
}, { "cmovnp", Gv
,Ev
},
597 { "cmovl", Gv
,Ev
}, { "cmovge", Gv
,Ev
}, { "cmovle", Gv
,Ev
}, { "cmovg", Gv
,Ev
},
599 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
600 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
602 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
603 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
605 { "punpcklbw", MX
, EM
},
606 { "punpcklwd", MX
, EM
},
607 { "punpckldq", MX
, EM
},
608 { "packsswb", MX
, EM
},
609 { "pcmpgtb", MX
, EM
},
610 { "pcmpgtw", MX
, EM
},
611 { "pcmpgtd", MX
, EM
},
612 { "packuswb", MX
, EM
},
614 { "punpckhbw", MX
, EM
},
615 { "punpckhwd", MX
, EM
},
616 { "punpckhdq", MX
, EM
},
617 { "packssdw", MX
, EM
},
618 { "(bad)" }, { "(bad)" },
626 { "pcmpeqb", MX
, EM
},
627 { "pcmpeqw", MX
, EM
},
628 { "pcmpeqd", MX
, EM
},
631 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
632 { "(bad)" }, { "(bad)" },
676 { "shldS", Ev
, Gv
, Ib
},
677 { "shldS", Ev
, Gv
, CL
},
685 { "shrdS", Ev
, Gv
, Ib
},
686 { "shrdS", Ev
, Gv
, CL
},
690 { "cmpxchgb", Eb
, Gb
},
691 { "cmpxchgS", Ev
, Gv
},
692 { "lssS", Gv
, Mp
}, /* 386 lists only Mp */
694 { "lfsS", Gv
, Mp
}, /* 386 lists only Mp */
695 { "lgsS", Gv
, Mp
}, /* 386 lists only Mp */
696 { "movzbS", Gv
, Eb
},
697 { "movzwS", Gv
, Ew
},
705 { "movsbS", Gv
, Eb
},
706 { "movswS", Gv
, Ew
},
731 { "pmullw", MX
, EM
},
732 { "(bad)" }, { "(bad)" },
734 { "psubusb", MX
, EM
},
735 { "psubusw", MX
, EM
},
738 { "paddusb", MX
, EM
},
739 { "paddusw", MX
, EM
},
748 { "pmulhw", MX
, EM
},
749 { "(bad)" }, { "(bad)" },
751 { "psubsb", MX
, EM
},
752 { "psubsw", MX
, EM
},
755 { "paddsb", MX
, EM
},
756 { "paddsw", MX
, EM
},
765 { "pmaddwd", MX
, EM
},
766 { "(bad)" }, { "(bad)" },
778 static const unsigned char onebyte_has_modrm
[256] = {
779 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
780 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
781 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
782 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
783 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
784 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
785 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0,
786 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
787 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
788 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
789 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
790 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
791 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0,
792 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1,
793 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
794 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1
797 static const unsigned char twobyte_has_modrm
[256] = {
798 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
799 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
800 /* 20 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* 2f */
801 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
802 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
803 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
804 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1, /* 6f */
805 /* 70 */ 0,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */
806 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
807 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
808 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
809 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
810 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
811 /* d0 */ 0,1,1,1,0,1,0,0,1,1,0,1,1,1,0,1, /* df */
812 /* e0 */ 0,1,1,0,0,1,0,0,1,1,0,1,1,1,0,1, /* ef */
813 /* f0 */ 0,1,1,1,0,1,0,0,1,1,1,0,1,1,1,0 /* ff */
816 static char obuf
[100];
818 static char scratchbuf
[100];
819 static unsigned char *start_codep
;
820 static unsigned char *codep
;
821 static disassemble_info
*the_info
;
825 static void oappend
PARAMS ((char *s
));
827 static char *names32
[]={
828 "%eax","%ecx","%edx","%ebx", "%esp","%ebp","%esi","%edi",
830 static char *names16
[] = {
831 "%ax","%cx","%dx","%bx","%sp","%bp","%si","%di",
833 static char *names8
[] = {
834 "%al","%cl","%dl","%bl","%ah","%ch","%dh","%bh",
836 static char *names_seg
[] = {
837 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
839 static char *index16
[] = {
840 "bx+si","bx+di","bp+si","bp+di","si","di","bp","bx"
843 static struct dis386 grps
[][8] = {
961 { "imulS", eAX
, Ev
},
963 { "idivS", eAX
, Ev
},
981 { "lcall", indirEv
},
1023 { "cmpxchg8b", Ev
},
1035 { "psrlw", MS
, Ib
},
1037 { "psraw", MS
, Ib
},
1039 { "psllw", MS
, Ib
},
1046 { "psrld", MS
, Ib
},
1048 { "psrad", MS
, Ib
},
1050 { "pslld", MS
, Ib
},
1057 { "psrlq", MS
, Ib
},
1061 { "psllq", MS
, Ib
},
1066 #define PREFIX_REPZ 1
1067 #define PREFIX_REPNZ 2
1068 #define PREFIX_LOCK 4
1070 #define PREFIX_SS 0x10
1071 #define PREFIX_DS 0x20
1072 #define PREFIX_ES 0x40
1073 #define PREFIX_FS 0x80
1074 #define PREFIX_GS 0x100
1075 #define PREFIX_DATA 0x200
1076 #define PREFIX_ADR 0x400
1077 #define PREFIX_FWAIT 0x800
1079 static int prefixes
;
1087 FETCH_DATA (the_info
, codep
+ 1);
1091 prefixes
|= PREFIX_REPZ
;
1094 prefixes
|= PREFIX_REPNZ
;
1097 prefixes
|= PREFIX_LOCK
;
1100 prefixes
|= PREFIX_CS
;
1103 prefixes
|= PREFIX_SS
;
1106 prefixes
|= PREFIX_DS
;
1109 prefixes
|= PREFIX_ES
;
1112 prefixes
|= PREFIX_FS
;
1115 prefixes
|= PREFIX_GS
;
1118 prefixes
|= PREFIX_DATA
;
1121 prefixes
|= PREFIX_ADR
;
1124 prefixes
|= PREFIX_FWAIT
;
1133 static char op1out
[100], op2out
[100], op3out
[100];
1134 static int op_address
[3], op_ad
, op_index
[3];
1135 static int start_pc
;
1139 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1140 * (see topic "Redundant prefixes" in the "Differences from 8086"
1141 * section of the "Virtual 8086 Mode" chapter.)
1142 * 'pc' should be the address of this instruction, it will
1143 * be used to print the target address if this is a relative jump or call
1144 * The function returns the length of this instruction in bytes.
1147 int print_insn_x86
PARAMS ((bfd_vma pc
, disassemble_info
*info
, int aflag
,
1150 print_insn_i386 (pc
, info
)
1152 disassemble_info
*info
;
1154 if (info
->mach
== bfd_mach_i386_i386
)
1155 return print_insn_x86 (pc
, info
, 1, 1);
1156 else if (info
->mach
== bfd_mach_i386_i8086
)
1157 return print_insn_x86 (pc
, info
, 0, 0);
1163 print_insn_x86 (pc
, info
, aflag
, dflag
)
1165 disassemble_info
*info
;
1171 int enter_instruction
;
1172 char *first
, *second
, *third
;
1174 unsigned char need_modrm
;
1176 struct dis_private priv
;
1177 bfd_byte
*inbuf
= priv
.the_buffer
;
1179 /* The output looks better if we put 5 bytes on a line, since that
1180 puts long word instructions on a single line. */
1181 info
->bytes_per_line
= 5;
1183 info
->private_data
= (PTR
) &priv
;
1184 priv
.max_fetched
= priv
.the_buffer
;
1185 priv
.insn_start
= pc
;
1186 if (setjmp (priv
.bailout
) != 0)
1195 op_index
[0] = op_index
[1] = op_index
[2] = -1;
1199 start_codep
= inbuf
;
1204 FETCH_DATA (info
, codep
+ 1);
1206 enter_instruction
= 1;
1208 enter_instruction
= 0;
1212 if (prefixes
& PREFIX_REPZ
)
1214 if (prefixes
& PREFIX_REPNZ
)
1216 if (prefixes
& PREFIX_LOCK
)
1219 if ((prefixes
& PREFIX_FWAIT
)
1220 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
1222 /* fwait not followed by floating point instruction */
1223 (*info
->fprintf_func
) (info
->stream
, "fwait");
1227 if (prefixes
& PREFIX_DATA
)
1230 if (prefixes
& PREFIX_ADR
)
1234 oappend ("addr32 ");
1236 oappend ("addr16 ");
1241 FETCH_DATA (info
, codep
+ 2);
1242 dp
= &dis386_twobyte
[*++codep
];
1243 need_modrm
= twobyte_has_modrm
[*codep
];
1247 dp
= &dis386
[*codep
];
1248 need_modrm
= onebyte_has_modrm
[*codep
];
1254 FETCH_DATA (info
, codep
+ 1);
1255 mod
= (*codep
>> 6) & 3;
1256 reg
= (*codep
>> 3) & 7;
1260 if (dp
->name
== NULL
&& dp
->bytemode1
== FLOATCODE
)
1262 dofloat (aflag
, dflag
);
1266 if (dp
->name
== NULL
)
1267 dp
= &grps
[dp
->bytemode1
][reg
];
1269 putop (dp
->name
, aflag
, dflag
);
1274 (*dp
->op1
)(dp
->bytemode1
, aflag
, dflag
);
1279 (*dp
->op2
)(dp
->bytemode2
, aflag
, dflag
);
1284 (*dp
->op3
)(dp
->bytemode3
, aflag
, dflag
);
1287 obufp
= obuf
+ strlen (obuf
);
1288 for (i
= strlen (obuf
); i
< 6; i
++)
1291 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
1293 /* enter instruction is printed with operands in the
1294 * same order as the intel book; everything else
1295 * is printed in reverse order
1297 if (enter_instruction
)
1302 op_ad
= op_index
[0];
1303 op_index
[0] = op_index
[2];
1304 op_index
[2] = op_ad
;
1315 if (op_index
[0] != -1)
1316 (*info
->print_address_func
) (op_address
[op_index
[0]], info
);
1318 (*info
->fprintf_func
) (info
->stream
, "%s", first
);
1324 (*info
->fprintf_func
) (info
->stream
, ",");
1325 if (op_index
[1] != -1)
1326 (*info
->print_address_func
) (op_address
[op_index
[1]], info
);
1328 (*info
->fprintf_func
) (info
->stream
, "%s", second
);
1334 (*info
->fprintf_func
) (info
->stream
, ",");
1335 if (op_index
[2] != -1)
1336 (*info
->print_address_func
) (op_address
[op_index
[2]], info
);
1338 (*info
->fprintf_func
) (info
->stream
, "%s", third
);
1340 return (codep
- inbuf
);
1343 static char *float_mem
[] = {
1419 #define STi OP_STi, 0
1421 #define FGRPd9_2 NULL, NULL, 0
1422 #define FGRPd9_4 NULL, NULL, 1
1423 #define FGRPd9_5 NULL, NULL, 2
1424 #define FGRPd9_6 NULL, NULL, 3
1425 #define FGRPd9_7 NULL, NULL, 4
1426 #define FGRPda_5 NULL, NULL, 5
1427 #define FGRPdb_4 NULL, NULL, 6
1428 #define FGRPde_3 NULL, NULL, 7
1429 #define FGRPdf_4 NULL, NULL, 8
1431 static struct dis386 float_reg
[][8] = {
1434 { "fadd", ST
, STi
},
1435 { "fmul", ST
, STi
},
1438 { "fsub", ST
, STi
},
1439 { "fsubr", ST
, STi
},
1440 { "fdiv", ST
, STi
},
1441 { "fdivr", ST
, STi
},
1456 { "fcmovb", ST
, STi
},
1457 { "fcmove", ST
, STi
},
1458 { "fcmovbe",ST
, STi
},
1459 { "fcmovu", ST
, STi
},
1467 { "fcmovnb",ST
, STi
},
1468 { "fcmovne",ST
, STi
},
1469 { "fcmovnbe",ST
, STi
},
1470 { "fcmovnu",ST
, STi
},
1472 { "fucomi", ST
, STi
},
1473 { "fcomi", ST
, STi
},
1478 { "fadd", STi
, ST
},
1479 { "fmul", STi
, ST
},
1482 { "fsub", STi
, ST
},
1483 { "fsubr", STi
, ST
},
1484 { "fdiv", STi
, ST
},
1485 { "fdivr", STi
, ST
},
1500 { "faddp", STi
, ST
},
1501 { "fmulp", STi
, ST
},
1504 { "fsubp", STi
, ST
},
1505 { "fsubrp", STi
, ST
},
1506 { "fdivp", STi
, ST
},
1507 { "fdivrp", STi
, ST
},
1516 { "fucomip",ST
, STi
},
1517 { "fcomip", ST
, STi
},
1523 static char *fgrps
[][8] = {
1526 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1531 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
1536 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
1541 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
1546 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
1551 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1556 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
1557 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
1562 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1567 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1572 dofloat (aflag
, dflag
)
1577 unsigned char floatop
;
1579 floatop
= codep
[-1];
1583 putop (float_mem
[(floatop
- 0xd8) * 8 + reg
], aflag
, dflag
);
1585 OP_E (v_mode
, aflag
, dflag
);
1590 dp
= &float_reg
[floatop
- 0xd8][reg
];
1591 if (dp
->name
== NULL
)
1593 putop (fgrps
[dp
->bytemode1
][rm
], aflag
, dflag
);
1594 /* instruction fnstsw is only one with strange arg */
1596 && FETCH_DATA (the_info
, codep
+ 1)
1598 strcpy (op1out
, "%eax");
1602 putop (dp
->name
, aflag
, dflag
);
1605 (*dp
->op1
)(dp
->bytemode1
, aflag
, dflag
);
1608 (*dp
->op2
)(dp
->bytemode2
, aflag
, dflag
);
1614 OP_ST (ignore
, aflag
, dflag
)
1625 OP_STi (ignore
, aflag
, dflag
)
1630 sprintf (scratchbuf
, "%%st(%d)", rm
);
1631 oappend (scratchbuf
);
1636 /* capital letters in template are macros */
1638 putop (template, aflag
, dflag
)
1645 for (p
= template; *p
; p
++)
1652 case 'C': /* For jcxz/jecxz */
1657 if ((prefixes
& PREFIX_FWAIT
) == 0)
1661 /* operand size flag */
1668 /* operand size flag for cwtl, cbtw */
1684 obufp
+= strlen (s
);
1691 if (prefixes
& PREFIX_CS
)
1693 if (prefixes
& PREFIX_DS
)
1695 if (prefixes
& PREFIX_SS
)
1697 if (prefixes
& PREFIX_ES
)
1699 if (prefixes
& PREFIX_FS
)
1701 if (prefixes
& PREFIX_GS
)
1706 OP_indirE (bytemode
, aflag
, dflag
)
1712 return OP_E (bytemode
, aflag
, dflag
);
1716 OP_E (bytemode
, aflag
, dflag
)
1723 /* skip mod/rm byte */
1731 oappend (names8
[rm
]);
1734 oappend (names16
[rm
]);
1738 oappend (names32
[rm
]);
1740 oappend (names16
[rm
]);
1743 oappend ("<bad dis table>");
1752 if (aflag
) /* 32 bit address mode */
1767 FETCH_DATA (the_info
, codep
+ 1);
1768 scale
= (*codep
>> 6) & 3;
1769 index
= (*codep
>> 3) & 7;
1784 FETCH_DATA (the_info
, codep
+ 1);
1786 if ((disp
& 0x80) != 0)
1794 if (mod
!= 0 || base
== 5)
1796 sprintf (scratchbuf
, "0x%x", disp
);
1797 oappend (scratchbuf
);
1800 if (havebase
|| (havesib
&& (index
!= 4 || scale
!= 0)))
1804 oappend (names32
[base
]);
1809 sprintf (scratchbuf
, ",%s", names32
[index
]);
1810 oappend (scratchbuf
);
1812 sprintf (scratchbuf
, ",%d", 1 << scale
);
1813 oappend (scratchbuf
);
1819 { /* 16 bit address mode */
1826 if ((disp
& 0x8000) != 0)
1831 FETCH_DATA (the_info
, codep
+ 1);
1833 if ((disp
& 0x80) != 0)
1838 if ((disp
& 0x8000) != 0)
1843 if (mod
!= 0 || rm
== 6)
1845 sprintf (scratchbuf
, "0x%x", disp
);
1846 oappend (scratchbuf
);
1849 if (mod
!= 0 || rm
!= 6)
1852 oappend (index16
[rm
]);
1860 OP_G (bytemode
, aflag
, dflag
)
1868 oappend (names8
[reg
]);
1871 oappend (names16
[reg
]);
1874 oappend (names32
[reg
]);
1878 oappend (names32
[reg
]);
1880 oappend (names16
[reg
]);
1883 oappend ("<internal disassembler error>");
1894 FETCH_DATA (the_info
, codep
+ 4);
1895 x
= *codep
++ & 0xff;
1896 x
|= (*codep
++ & 0xff) << 8;
1897 x
|= (*codep
++ & 0xff) << 16;
1898 x
|= (*codep
++ & 0xff) << 24;
1907 FETCH_DATA (the_info
, codep
+ 2);
1908 x
= *codep
++ & 0xff;
1909 x
|= (*codep
++ & 0xff) << 8;
1917 op_index
[op_ad
] = op_ad
;
1918 op_address
[op_ad
] = op
;
1922 OP_REG (code
, aflag
, dflag
)
1931 case indir_dx_reg
: s
= "(%dx)"; break;
1932 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
1933 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
1934 s
= names16
[code
- ax_reg
];
1936 case es_reg
: case ss_reg
: case cs_reg
:
1937 case ds_reg
: case fs_reg
: case gs_reg
:
1938 s
= names_seg
[code
- es_reg
];
1940 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
1941 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
1942 s
= names8
[code
- al_reg
];
1944 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
1945 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
1947 s
= names32
[code
- eAX_reg
];
1949 s
= names16
[code
- eAX_reg
];
1952 s
= "<internal disassembler error>";
1960 OP_I (bytemode
, aflag
, dflag
)
1970 FETCH_DATA (the_info
, codep
+ 1);
1971 op
= *codep
++ & 0xff;
1983 oappend ("<internal disassembler error>");
1986 sprintf (scratchbuf
, "$0x%x", op
);
1987 oappend (scratchbuf
);
1992 OP_sI (bytemode
, aflag
, dflag
)
2002 FETCH_DATA (the_info
, codep
+ 1);
2004 if ((op
& 0x80) != 0)
2013 if ((op
& 0x8000) != 0)
2019 if ((op
& 0x8000) != 0)
2023 oappend ("<internal disassembler error>");
2026 sprintf (scratchbuf
, "$0x%x", op
);
2027 oappend (scratchbuf
);
2032 OP_J (bytemode
, aflag
, dflag
)
2043 FETCH_DATA (the_info
, codep
+ 1);
2045 if ((disp
& 0x80) != 0)
2054 if ((disp
& 0x8000) != 0)
2056 /* for some reason, a data16 prefix on a jump instruction
2057 means that the pc is masked to 16 bits after the
2058 displacement is added! */
2063 oappend ("<internal disassembler error>");
2066 disp
= (start_pc
+ codep
- start_codep
+ disp
) & mask
;
2068 sprintf (scratchbuf
, "0x%x", disp
);
2069 oappend (scratchbuf
);
2075 OP_SEG (dummy
, aflag
, dflag
)
2080 static char *sreg
[] = {
2081 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
2084 oappend (sreg
[reg
]);
2089 OP_DIR (size
, aflag
, dflag
)
2109 sprintf (scratchbuf
, "0x%x,0x%x", seg
, offset
);
2110 oappend (scratchbuf
);
2118 if ((offset
& 0x8000) != 0)
2122 offset
= start_pc
+ codep
- start_codep
+ offset
;
2124 sprintf (scratchbuf
, "0x%x", offset
);
2125 oappend (scratchbuf
);
2128 oappend ("<internal disassembler error>");
2136 OP_OFF (bytemode
, aflag
, dflag
)
2150 sprintf (scratchbuf
, "0x%x", off
);
2151 oappend (scratchbuf
);
2157 OP_ESDI (dummy
, aflag
, dflag
)
2163 oappend (aflag
? "%edi" : "%di");
2170 OP_DSSI (dummy
, aflag
, dflag
)
2182 prefixes
|= PREFIX_DS
;
2185 oappend (aflag
? "%esi" : "%si");
2195 OP_ONE (dummy
, aflag
, dflag
)
2208 OP_C (dummy
, aflag
, dflag
)
2213 codep
++; /* skip mod/rm */
2214 sprintf (scratchbuf
, "%%cr%d", reg
);
2215 oappend (scratchbuf
);
2221 OP_D (dummy
, aflag
, dflag
)
2226 codep
++; /* skip mod/rm */
2227 sprintf (scratchbuf
, "%%db%d", reg
);
2228 oappend (scratchbuf
);
2234 OP_T (dummy
, aflag
, dflag
)
2239 codep
++; /* skip mod/rm */
2240 sprintf (scratchbuf
, "%%tr%d", reg
);
2241 oappend (scratchbuf
);
2246 OP_rm (bytemode
, aflag
, dflag
)
2254 oappend (names32
[rm
]);
2257 oappend (names16
[rm
]);
2264 OP_MMX (bytemode
, aflag
, dflag
)
2269 sprintf (scratchbuf
, "%%mm%d", reg
);
2270 oappend (scratchbuf
);
2275 OP_EM (bytemode
, aflag
, dflag
)
2281 return OP_E (bytemode
, aflag
, dflag
);
2284 sprintf (scratchbuf
, "%%mm%d", rm
);
2285 oappend (scratchbuf
);
2290 OP_MS (bytemode
, aflag
, dflag
)
2296 sprintf (scratchbuf
, "%%mm%d", rm
);
2297 oappend (scratchbuf
);