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1 /******************************************************************************
2 *
3 * Name: actbl2.h - ACPI Specification Revision 2.0 Tables
4 *
5 *****************************************************************************/
6
7 /*
8 * Copyright (C) 2000 - 2005, R. Byron Moore
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions, and the following disclaimer,
16 * without modification.
17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
18 * substantially similar to the "NO WARRANTY" disclaimer below
19 * ("Disclaimer") and any redistribution must be conditioned upon
20 * including a substantially similar Disclaimer requirement for further
21 * binary redistribution.
22 * 3. Neither the names of the above-listed copyright holders nor the names
23 * of any contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * Alternatively, this software may be distributed under the terms of the
27 * GNU General Public License ("GPL") version 2 as published by the Free
28 * Software Foundation.
29 *
30 * NO WARRANTY
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
41 * POSSIBILITY OF SUCH DAMAGES.
42 */
43
44 #ifndef __ACTBL2_H__
45 #define __ACTBL2_H__
46
47 /*
48 * Prefered Power Management Profiles
49 */
50 #define PM_UNSPECIFIED 0
51 #define PM_DESKTOP 1
52 #define PM_MOBILE 2
53 #define PM_WORKSTATION 3
54 #define PM_ENTERPRISE_SERVER 4
55 #define PM_SOHO_SERVER 5
56 #define PM_APPLIANCE_PC 6
57
58 /*
59 * ACPI Boot Arch Flags
60 */
61 #define BAF_LEGACY_DEVICES 0x0001
62 #define BAF_8042_KEYBOARD_CONTROLLER 0x0002
63
64 #define FADT2_REVISION_ID 3
65 #define FADT2_MINUS_REVISION_ID 2
66
67
68 #pragma pack(1)
69
70 /*
71 * ACPI 2.0 Root System Description Table (RSDT)
72 */
73 struct rsdt_descriptor_rev2
74 {
75 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
76 u32 table_offset_entry [1]; /* Array of pointers to */
77 /* ACPI table headers */
78 };
79
80
81 /*
82 * ACPI 2.0 Extended System Description Table (XSDT)
83 */
84 struct xsdt_descriptor_rev2
85 {
86 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
87 u64 table_offset_entry [1]; /* Array of pointers to */
88 /* ACPI table headers */
89 };
90
91
92 /*
93 * ACPI 2.0 Firmware ACPI Control Structure (FACS)
94 */
95 struct facs_descriptor_rev2
96 {
97 char signature[4]; /* ACPI signature */
98 u32 length; /* Length of structure, in bytes */
99 u32 hardware_signature; /* Hardware configuration signature */
100 u32 firmware_waking_vector; /* 32bit physical address of the Firmware Waking Vector. */
101 u32 global_lock; /* Global Lock used to synchronize access to shared hardware resources */
102 u32 S4bios_f : 1; /* S4Bios_f - Indicates if S4BIOS support is present */
103 u32 reserved1 : 31; /* Must be 0 */
104 u64 xfirmware_waking_vector; /* 64bit physical address of the Firmware Waking Vector. */
105 u8 version; /* Version of this table */
106 u8 reserved3 [31]; /* Reserved - must be zero */
107 };
108
109
110 /*
111 * ACPI 2.0+ Generic Address Structure (GAS)
112 */
113 struct acpi_generic_address
114 {
115 u8 address_space_id; /* Address space where struct or register exists. */
116 u8 register_bit_width; /* Size in bits of given register */
117 u8 register_bit_offset; /* Bit offset within the register */
118 u8 access_width; /* Minimum Access size (ACPI 3.0) */
119 u64 address; /* 64-bit address of struct or register */
120 };
121
122
123 #define FADT_REV2_COMMON \
124 u32 V1_firmware_ctrl; /* 32-bit physical address of FACS */ \
125 u32 V1_dsdt; /* 32-bit physical address of DSDT */ \
126 u8 reserved1; /* System Interrupt Model isn't used in ACPI 2.0*/ \
127 u8 prefer_PM_profile; /* Conveys preferred power management profile to OSPM. */ \
128 u16 sci_int; /* System vector of SCI interrupt */ \
129 u32 smi_cmd; /* Port address of SMI command port */ \
130 u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */ \
131 u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */ \
132 u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */ \
133 u8 pstate_cnt; /* Processor performance state control*/ \
134 u32 V1_pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */ \
135 u32 V1_pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */ \
136 u32 V1_pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */ \
137 u32 V1_pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */ \
138 u32 V1_pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */ \
139 u32 V1_pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */ \
140 u32 V1_gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */ \
141 u32 V1_gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */ \
142 u8 pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */ \
143 u8 pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */ \
144 u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */ \
145 u8 pm_tm_len; /* Byte Length of ports at pm_tm_blk */ \
146 u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */ \
147 u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */ \
148 u8 gpe1_base; /* Offset in gpe model where gpe1 events start */ \
149 u8 cst_cnt; /* Support for the _CST object and C States change notification.*/ \
150 u16 plvl2_lat; /* Worst case HW latency to enter/exit C2 state */ \
151 u16 plvl3_lat; /* Worst case HW latency to enter/exit C3 state */ \
152 u16 flush_size; /* Number of flush strides that need to be read */ \
153 u16 flush_stride; /* Processor's memory cache line width, in bytes */ \
154 u8 duty_offset; /* Processor's duty cycle index in processor's P_CNT reg*/ \
155 u8 duty_width; /* Processor's duty cycle value bit width in P_CNT register.*/ \
156 u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */ \
157 u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */ \
158 u8 century; /* Index to century in RTC CMOS RAM */ \
159 u16 iapc_boot_arch; /* IA-PC Boot Architecture Flags. See Table 5-10 for description*/
160
161 /*
162 * ACPI 2.0+ Fixed ACPI Description Table (FADT)
163 */
164 struct fadt_descriptor_rev2
165 {
166 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
167 FADT_REV2_COMMON
168 u8 reserved2; /* Reserved */
169 u32 wb_invd : 1; /* The wbinvd instruction works properly */
170 u32 wb_invd_flush : 1; /* The wbinvd flushes but does not invalidate */
171 u32 proc_c1 : 1; /* All processors support C1 state */
172 u32 plvl2_up : 1; /* C2 state works on MP system */
173 u32 pwr_button : 1; /* Power button is handled as a generic feature */
174 u32 sleep_button : 1; /* Sleep button is handled as a generic feature, or not present */
175 u32 fixed_rTC : 1; /* RTC wakeup stat not in fixed register space */
176 u32 rtcs4 : 1; /* RTC wakeup stat not possible from S4 */
177 u32 tmr_val_ext : 1; /* Indicates tmr_val is 32 bits 0=24-bits */
178 u32 dock_cap : 1; /* Supports Docking */
179 u32 reset_reg_sup : 1; /* Indicates system supports system reset via the FADT RESET_REG */
180 u32 sealed_case : 1; /* Indicates system has no internal expansion capabilities and case is sealed */
181 u32 headless : 1; /* Indicates system does not have local video capabilities or local input devices */
182 u32 cpu_sw_sleep : 1; /* Indicates to OSPM that a processor native instruction */
183 /* must be executed after writing the SLP_TYPx register */
184 /* ACPI 3.0 flag bits */
185
186 u32 pci_exp_wak : 1; /* System supports PCIEXP_WAKE (STS/EN) bits */
187 u32 use_platform_clock : 1; /* OSPM should use platform-provided timer */
188 u32 S4rtc_sts_valid : 1; /* Contents of RTC_STS valid after S4 wake */
189 u32 remote_power_on_capable : 1; /* System is compatible with remote power on */
190 u32 force_apic_cluster_model : 1; /* All local APICs must use cluster model */
191 u32 force_apic_physical_destination_mode : 1; /* all local x_aPICs must use physical dest mode */
192 u32 reserved6 : 12;/* Reserved - must be zero */
193
194 struct acpi_generic_address reset_register; /* Reset register address in GAS format */
195 u8 reset_value; /* Value to write to the reset_register port to reset the system */
196 u8 reserved7[3]; /* These three bytes must be zero */
197 u64 xfirmware_ctrl; /* 64-bit physical address of FACS */
198 u64 Xdsdt; /* 64-bit physical address of DSDT */
199 struct acpi_generic_address xpm1a_evt_blk; /* Extended Power Mgt 1a acpi_event Reg Blk address */
200 struct acpi_generic_address xpm1b_evt_blk; /* Extended Power Mgt 1b acpi_event Reg Blk address */
201 struct acpi_generic_address xpm1a_cnt_blk; /* Extended Power Mgt 1a Control Reg Blk address */
202 struct acpi_generic_address xpm1b_cnt_blk; /* Extended Power Mgt 1b Control Reg Blk address */
203 struct acpi_generic_address xpm2_cnt_blk; /* Extended Power Mgt 2 Control Reg Blk address */
204 struct acpi_generic_address xpm_tmr_blk; /* Extended Power Mgt Timer Ctrl Reg Blk address */
205 struct acpi_generic_address xgpe0_blk; /* Extended General Purpose acpi_event 0 Reg Blk address */
206 struct acpi_generic_address xgpe1_blk; /* Extended General Purpose acpi_event 1 Reg Blk address */
207 };
208
209
210 /* "Down-revved" ACPI 2.0 FADT descriptor */
211
212 struct fadt_descriptor_rev2_minus
213 {
214 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
215 FADT_REV2_COMMON
216 u8 reserved2; /* Reserved */
217 u32 flags;
218 struct acpi_generic_address reset_register; /* Reset register address in GAS format */
219 u8 reset_value; /* Value to write to the reset_register port to reset the system. */
220 u8 reserved7[3]; /* These three bytes must be zero */
221 };
222
223
224 /* ECDT - Embedded Controller Boot Resources Table */
225
226 struct ec_boot_resources
227 {
228 ACPI_TABLE_HEADER_DEF
229 struct acpi_generic_address ec_control; /* Address of EC command/status register */
230 struct acpi_generic_address ec_data; /* Address of EC data register */
231 u32 uid; /* Unique ID - must be same as the EC _UID method */
232 u8 gpe_bit; /* The GPE for the EC */
233 u8 ec_id[1]; /* Full namepath of the EC in the ACPI namespace */
234 };
235
236
237 /* SRAT - System Resource Affinity Table */
238
239 struct static_resource_alloc
240 {
241 u8 type;
242 u8 length;
243 u8 proximity_domain_lo;
244 u8 apic_id;
245 u32 enabled :1;
246 u32 reserved3 :31;
247 u8 local_sapic_eid;
248 u8 proximity_domain_hi[3];
249 u32 reserved4;
250 };
251
252 struct memory_affinity
253 {
254 u8 type;
255 u8 length;
256 u32 proximity_domain;
257 u16 reserved3;
258 u64 base_address;
259 u64 address_length;
260 u32 reserved4;
261 u32 enabled :1;
262 u32 hot_pluggable :1;
263 u32 non_volatile :1;
264 u32 reserved5 :29;
265 u64 reserved6;
266 };
267
268 struct system_resource_affinity
269 {
270 ACPI_TABLE_HEADER_DEF
271 u32 reserved1; /* Must be value '1' */
272 u64 reserved2;
273 };
274
275
276 /* SLIT - System Locality Distance Information Table */
277
278 struct system_locality_info
279 {
280 ACPI_TABLE_HEADER_DEF
281 u64 locality_count;
282 u8 entry[1][1];
283 };
284
285
286 #pragma pack()
287
288 #endif /* __ACTBL2_H__ */
289