include/asm-arm/arch-clps711x/uncompress.h

   1 /*
   2  *  linux/include/asm-arm/arch-clps711x/uncompress.h
   3  *
   4  *  Copyright (C) 2000 Deep Blue Solutions Ltd
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #include <linux/config.h>
  21 #include <asm/arch/io.h>
  22 #include <asm/arch/hardware.h>
  23 #include <asm/hardware/clps7111.h>
  24
  25 #undef CLPS7111_BASE
  26 #define CLPS7111_BASE CLPS7111_PHYS_BASE
  27
  28 #define barrier()               __asm__ __volatile__("": : :"memory")
  29 #define __raw_readl(p)          (*(unsigned long *)(p))
  30 #define __raw_writel(v,p)       (*(unsigned long *)(p) = (v))
  31
  32 #ifdef CONFIG_DEBUG_CLPS711X_UART2
  33 #define SYSFLGx SYSFLG2
  34 #define UARTDRx UARTDR2
  35 #else
  36 #define SYSFLGx SYSFLG1
  37 #define UARTDRx UARTDR1
  38 #endif
  39
  40 /*
  41  * This does not append a newline
  42  */
  43 static void putstr(const char *s)
  44 {
  45         char c;
  46
  47         while ((c = *s++) != '\0') {
  48                 while (clps_readl(SYSFLGx) & SYSFLG_UTXFF)
  49                         barrier();
  50                 clps_writel(c, UARTDRx);
  51
  52                 if (c == '\n') {
  53                         while (clps_readl(SYSFLGx) & SYSFLG_UTXFF)
  54                                 barrier();
  55                         clps_writel('\r', UARTDRx);
  56                 }
  57         }
  58         while (clps_readl(SYSFLGx) & SYSFLG_UBUSY)
  59                 barrier();
  60 }
  61
  62 /*
  63  * nothing to do
  64  */
  65 #define arch_decomp_setup()
  66
  67 #define arch_decomp_wdog()