include/asm-arm/arch-s3c2410/regs-gpioj.h

   1 /* linux/include/asm/hardware/s3c2410/regs-gpioj.h
   2  *
   3  * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk>
   4  *                    http://www.simtec.co.uk/products/SWLINUX/
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * S3C2440 GPIO J register definitions
  11  *
  12  *  Changelog:
  13  *    11-Aug-2004     BJD     Created file
  14  *    10-Feb-2005     BJD     Fix GPJ12 definition (Guillaume Gourat)
  15 */
  16
  17
  18 #ifndef __ASM_ARCH_REGS_GPIOJ_H
  19 #define __ASM_ARCH_REGS_GPIOJ_H "gpioj"
  20
  21 /* Port J consists of 13 GPIO/Camera pins
  22  *
  23  * GPJCON has 2 bits for each of the input pins on port F
  24  *   00 = 0 input, 1 output, 2 Camera
  25  *
  26  * pull up works like all other ports.
  27 */
  28
  29 #define S3C2440_GPIO_BANKJ  (416)
  30
  31 #define S3C2440_GPJCON      S3C2410_GPIOREG(0xd0)
  32 #define S3C2440_GPJDAT      S3C2410_GPIOREG(0xd4)
  33 #define S3C2440_GPJUP       S3C2410_GPIOREG(0xd8)
  34
  35 #define S3C2413_GPJCON          S3C2410_GPIOREG(0x80)
  36 #define S3C2413_GPJDAT          S3C2410_GPIOREG(0x84)
  37 #define S3C2413_GPJUP           S3C2410_GPIOREG(0x88)
  38 #define S3C2413_GPJSLPCON       S3C2410_GPIOREG(0x8C)
  39
  40 #define S3C2440_GPJ0            S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 0)
  41 #define S3C2440_GPJ0_INP        (0x00 << 0)
  42 #define S3C2440_GPJ0_OUTP       (0x01 << 0)
  43 #define S3C2440_GPJ0_CAMDATA0   (0x02 << 0)
  44
  45 #define S3C2440_GPJ1            S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 1)
  46 #define S3C2440_GPJ1_INP        (0x00 << 2)
  47 #define S3C2440_GPJ1_OUTP       (0x01 << 2)
  48 #define S3C2440_GPJ1_CAMDATA1   (0x02 << 2)
  49
  50 #define S3C2440_GPJ2            S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 2)
  51 #define S3C2440_GPJ2_INP        (0x00 << 4)
  52 #define S3C2440_GPJ2_OUTP       (0x01 << 4)
  53 #define S3C2440_GPJ2_CAMDATA2   (0x02 << 4)
  54
  55 #define S3C2440_GPJ3            S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 3)
  56 #define S3C2440_GPJ3_INP        (0x00 << 6)
  57 #define S3C2440_GPJ3_OUTP       (0x01 << 6)
  58 #define S3C2440_GPJ3_CAMDATA3   (0x02 << 6)
  59
  60 #define S3C2440_GPJ4            S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 4)
  61 #define S3C2440_GPJ4_INP        (0x00 << 8)
  62 #define S3C2440_GPJ4_OUTP       (0x01 << 8)
  63 #define S3C2440_GPJ4_CAMDATA4   (0x02 << 8)
  64
  65 #define S3C2440_GPJ5            S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 5)
  66 #define S3C2440_GPJ5_INP        (0x00 << 10)
  67 #define S3C2440_GPJ5_OUTP       (0x01 << 10)
  68 #define S3C2440_GPJ5_CAMDATA5   (0x02 << 10)
  69
  70 #define S3C2440_GPJ6            S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 6)
  71 #define S3C2440_GPJ6_INP        (0x00 << 12)
  72 #define S3C2440_GPJ6_OUTP       (0x01 << 12)
  73 #define S3C2440_GPJ6_CAMDATA6   (0x02 << 12)
  74
  75 #define S3C2440_GPJ7            S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 7)
  76 #define S3C2440_GPJ7_INP        (0x00 << 14)
  77 #define S3C2440_GPJ7_OUTP       (0x01 << 14)
  78 #define S3C2440_GPJ7_CAMDATA7   (0x02 << 14)
  79
  80 #define S3C2440_GPJ8            S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 8)
  81 #define S3C2440_GPJ8_INP        (0x00 << 16)
  82 #define S3C2440_GPJ8_OUTP       (0x01 << 16)
  83 #define S3C2440_GPJ8_CAMPCLK    (0x02 << 16)
  84
  85 #define S3C2440_GPJ9            S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 9)
  86 #define S3C2440_GPJ9_INP        (0x00 << 18)
  87 #define S3C2440_GPJ9_OUTP       (0x01 << 18)
  88 #define S3C2440_GPJ9_CAMVSYNC   (0x02 << 18)
  89
  90 #define S3C2440_GPJ10           S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 10)
  91 #define S3C2440_GPJ10_INP       (0x00 << 20)
  92 #define S3C2440_GPJ10_OUTP      (0x01 << 20)
  93 #define S3C2440_GPJ10_CAMHREF   (0x02 << 20)
  94
  95 #define S3C2440_GPJ11           S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 11)
  96 #define S3C2440_GPJ11_INP       (0x00 << 22)
  97 #define S3C2440_GPJ11_OUTP      (0x01 << 22)
  98 #define S3C2440_GPJ11_CAMCLKOUT (0x02 << 22)
  99
 100 #define S3C2440_GPJ12           S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 12)
 101 #define S3C2440_GPJ12_INP       (0x00 << 24)
 102 #define S3C2440_GPJ12_OUTP      (0x01 << 24)
 103 #define S3C2440_GPJ12_CAMRESET  (0x02 << 24)
 104
 105 #endif  /* __ASM_ARCH_REGS_GPIOJ_H */
 106