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1 /* Generic I/O port emulation, based on MN10300 code
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
11 #ifndef __ASM_GENERIC_IO_H
12 #define __ASM_GENERIC_IO_H
14 #include <asm/page.h> /* I/O is all done through memory accesses */
15 #include <linux/string.h> /* for memset() and memcpy() */
16 #include <linux/types.h>
18 #ifdef CONFIG_GENERIC_IOMAP
19 #include <asm-generic/iomap.h>
22 #include <asm-generic/pci_iomap.h>
25 #define mmiowb() do {} while (0)
29 * __raw_{read,write}{b,w,l,q}() access memory in native endianness.
31 * On some architectures memory mapped IO needs to be accessed differently.
32 * On the simple architectures, we just read/write the memory location
37 #define __raw_readb __raw_readb
38 static inline u8
__raw_readb(const volatile void __iomem
*addr
)
40 return *(const volatile u8 __force
*)addr
;
45 #define __raw_readw __raw_readw
46 static inline u16
__raw_readw(const volatile void __iomem
*addr
)
48 return *(const volatile u16 __force
*)addr
;
53 #define __raw_readl __raw_readl
54 static inline u32
__raw_readl(const volatile void __iomem
*addr
)
56 return *(const volatile u32 __force
*)addr
;
62 #define __raw_readq __raw_readq
63 static inline u64
__raw_readq(const volatile void __iomem
*addr
)
65 return *(const volatile u64 __force
*)addr
;
68 #endif /* CONFIG_64BIT */
71 #define __raw_writeb __raw_writeb
72 static inline void __raw_writeb(u8 value
, volatile void __iomem
*addr
)
74 *(volatile u8 __force
*)addr
= value
;
79 #define __raw_writew __raw_writew
80 static inline void __raw_writew(u16 value
, volatile void __iomem
*addr
)
82 *(volatile u16 __force
*)addr
= value
;
87 #define __raw_writel __raw_writel
88 static inline void __raw_writel(u32 value
, volatile void __iomem
*addr
)
90 *(volatile u32 __force
*)addr
= value
;
96 #define __raw_writeq __raw_writeq
97 static inline void __raw_writeq(u64 value
, volatile void __iomem
*addr
)
99 *(volatile u64 __force
*)addr
= value
;
102 #endif /* CONFIG_64BIT */
105 * {read,write}{b,w,l,q}() access little endian memory and return result in
111 static inline u8
readb(const volatile void __iomem
*addr
)
113 return __raw_readb(addr
);
119 static inline u16
readw(const volatile void __iomem
*addr
)
121 return __le16_to_cpu(__raw_readw(addr
));
127 static inline u32
readl(const volatile void __iomem
*addr
)
129 return __le32_to_cpu(__raw_readl(addr
));
136 static inline u64
readq(const volatile void __iomem
*addr
)
138 return __le64_to_cpu(__raw_readq(addr
));
141 #endif /* CONFIG_64BIT */
144 #define writeb writeb
145 static inline void writeb(u8 value
, volatile void __iomem
*addr
)
147 __raw_writeb(value
, addr
);
152 #define writew writew
153 static inline void writew(u16 value
, volatile void __iomem
*addr
)
155 __raw_writew(cpu_to_le16(value
), addr
);
160 #define writel writel
161 static inline void writel(u32 value
, volatile void __iomem
*addr
)
163 __raw_writel(__cpu_to_le32(value
), addr
);
169 #define writeq writeq
170 static inline void writeq(u64 value
, volatile void __iomem
*addr
)
172 __raw_writeq(__cpu_to_le64(value
), addr
);
175 #endif /* CONFIG_64BIT */
178 * {read,write}{b,w,l,q}_relaxed() are like the regular version, but
179 * are not guaranteed to provide ordering against spinlocks or memory
182 #ifndef readb_relaxed
183 #define readb_relaxed readb
186 #ifndef readw_relaxed
187 #define readw_relaxed readw
190 #ifndef readl_relaxed
191 #define readl_relaxed readl
194 #if defined(readq) && !defined(readq_relaxed)
195 #define readq_relaxed readq
198 #ifndef writeb_relaxed
199 #define writeb_relaxed writeb
202 #ifndef writew_relaxed
203 #define writew_relaxed writew
206 #ifndef writel_relaxed
207 #define writel_relaxed writel
210 #if defined(writeq) && !defined(writeq_relaxed)
211 #define writeq_relaxed writeq
215 * {read,write}s{b,w,l,q}() repeatedly access the same memory address in
216 * native endianness in 8-, 16-, 32- or 64-bit chunks (@count times).
219 #define readsb readsb
220 static inline void readsb(const volatile void __iomem
*addr
, void *buffer
,
227 u8 x
= __raw_readb(addr
);
235 #define readsw readsw
236 static inline void readsw(const volatile void __iomem
*addr
, void *buffer
,
243 u16 x
= __raw_readw(addr
);
251 #define readsl readsl
252 static inline void readsl(const volatile void __iomem
*addr
, void *buffer
,
259 u32 x
= __raw_readl(addr
);
268 #define readsq readsq
269 static inline void readsq(const volatile void __iomem
*addr
, void *buffer
,
276 u64 x
= __raw_readq(addr
);
282 #endif /* CONFIG_64BIT */
285 #define writesb writesb
286 static inline void writesb(volatile void __iomem
*addr
, const void *buffer
,
290 const u8
*buf
= buffer
;
293 __raw_writeb(*buf
++, addr
);
300 #define writesw writesw
301 static inline void writesw(volatile void __iomem
*addr
, const void *buffer
,
305 const u16
*buf
= buffer
;
308 __raw_writew(*buf
++, addr
);
315 #define writesl writesl
316 static inline void writesl(volatile void __iomem
*addr
, const void *buffer
,
320 const u32
*buf
= buffer
;
323 __raw_writel(*buf
++, addr
);
331 #define writesq writesq
332 static inline void writesq(volatile void __iomem
*addr
, const void *buffer
,
336 const u64
*buf
= buffer
;
339 __raw_writeq(*buf
++, addr
);
344 #endif /* CONFIG_64BIT */
347 #define PCI_IOBASE ((void __iomem *)0)
350 #ifndef IO_SPACE_LIMIT
351 #define IO_SPACE_LIMIT 0xffff
354 #include <linux/libio.h>
357 * {in,out}{b,w,l}() access little endian I/O. {in,out}{b,w,l}_p() can be
358 * implemented on hardware that needs an additional delay for I/O accesses to
364 #define inb libio_inb
367 static inline u8
inb(unsigned long addr
)
369 return readb(PCI_IOBASE
+ addr
);
371 #endif /* CONFIG_LIBIO */
376 #define inw libio_inw
379 static inline u16
inw(unsigned long addr
)
381 return readw(PCI_IOBASE
+ addr
);
383 #endif /* CONFIG_LIBIO */
388 #define inl libio_inl
391 static inline u32
inl(unsigned long addr
)
393 return readl(PCI_IOBASE
+ addr
);
395 #endif /* CONFIG_LIBIO */
400 #define outb libio_outb
403 static inline void outb(u8 value
, unsigned long addr
)
405 writeb(value
, PCI_IOBASE
+ addr
);
407 #endif /* CONFIG_LIBIO */
412 #define outw libio_outw
415 static inline void outw(u16 value
, unsigned long addr
)
417 writew(value
, PCI_IOBASE
+ addr
);
419 #endif /* CONFIG_LIBIO */
424 #define outl libio_outl
427 static inline void outl(u32 value
, unsigned long addr
)
429 writel(value
, PCI_IOBASE
+ addr
);
431 #endif /* CONFIG_LIBIO */
436 static inline u8
inb_p(unsigned long addr
)
444 static inline u16
inw_p(unsigned long addr
)
452 static inline u32
inl_p(unsigned long addr
)
459 #define outb_p outb_p
460 static inline void outb_p(u8 value
, unsigned long addr
)
467 #define outw_p outw_p
468 static inline void outw_p(u16 value
, unsigned long addr
)
475 #define outl_p outl_p
476 static inline void outl_p(u32 value
, unsigned long addr
)
483 * {in,out}s{b,w,l}{,_p}() are variants of the above that repeatedly access a
484 * single I/O port multiple times.
489 #define insb libio_insb
492 static inline void insb(unsigned long addr
, void *buffer
, unsigned int count
)
494 readsb(PCI_IOBASE
+ addr
, buffer
, count
);
496 #endif /* CONFIG_LIBIO */
501 #define insw libio_insw
504 static inline void insw(unsigned long addr
, void *buffer
, unsigned int count
)
506 readsw(PCI_IOBASE
+ addr
, buffer
, count
);
508 #endif /* CONFIG_LIBIO */
513 #define insl libio_insl
516 static inline void insl(unsigned long addr
, void *buffer
, unsigned int count
)
518 readsl(PCI_IOBASE
+ addr
, buffer
, count
);
520 #endif /* CONFIG_LIBIO */
525 #define outsb libio_outsb
528 static inline void outsb(unsigned long addr
, const void *buffer
,
531 writesb(PCI_IOBASE
+ addr
, buffer
, count
);
533 #endif /* CONFIG_LIBIO */
538 #define outsw libio_outsw
541 static inline void outsw(unsigned long addr
, const void *buffer
,
544 writesw(PCI_IOBASE
+ addr
, buffer
, count
);
546 #endif /* CONFIG_LIBIO */
551 #define outsl libio_outsl
554 static inline void outsl(unsigned long addr
, const void *buffer
,
557 writesl(PCI_IOBASE
+ addr
, buffer
, count
);
559 #endif /* CONFIG_LIBIO */
563 #define insb_p insb_p
564 static inline void insb_p(unsigned long addr
, void *buffer
, unsigned int count
)
566 insb(addr
, buffer
, count
);
571 #define insw_p insw_p
572 static inline void insw_p(unsigned long addr
, void *buffer
, unsigned int count
)
574 insw(addr
, buffer
, count
);
579 #define insl_p insl_p
580 static inline void insl_p(unsigned long addr
, void *buffer
, unsigned int count
)
582 insl(addr
, buffer
, count
);
587 #define outsb_p outsb_p
588 static inline void outsb_p(unsigned long addr
, const void *buffer
,
591 outsb(addr
, buffer
, count
);
596 #define outsw_p outsw_p
597 static inline void outsw_p(unsigned long addr
, const void *buffer
,
600 outsw(addr
, buffer
, count
);
605 #define outsl_p outsl_p
606 static inline void outsl_p(unsigned long addr
, const void *buffer
,
609 outsl(addr
, buffer
, count
);
613 #ifndef CONFIG_GENERIC_IOMAP
615 #define ioread8 ioread8
616 static inline u8
ioread8(const volatile void __iomem
*addr
)
623 #define ioread16 ioread16
624 static inline u16
ioread16(const volatile void __iomem
*addr
)
631 #define ioread32 ioread32
632 static inline u32
ioread32(const volatile void __iomem
*addr
)
640 #define ioread64 ioread64
641 static inline u64
ioread64(const volatile void __iomem
*addr
)
646 #endif /* CONFIG_64BIT */
649 #define iowrite8 iowrite8
650 static inline void iowrite8(u8 value
, volatile void __iomem
*addr
)
657 #define iowrite16 iowrite16
658 static inline void iowrite16(u16 value
, volatile void __iomem
*addr
)
665 #define iowrite32 iowrite32
666 static inline void iowrite32(u32 value
, volatile void __iomem
*addr
)
674 #define iowrite64 iowrite64
675 static inline void iowrite64(u64 value
, volatile void __iomem
*addr
)
680 #endif /* CONFIG_64BIT */
683 #define ioread16be ioread16be
684 static inline u16
ioread16be(const volatile void __iomem
*addr
)
686 return swab16(readw(addr
));
691 #define ioread32be ioread32be
692 static inline u32
ioread32be(const volatile void __iomem
*addr
)
694 return swab32(readl(addr
));
700 #define ioread64be ioread64be
701 static inline u64
ioread64be(const volatile void __iomem
*addr
)
703 return swab64(readq(addr
));
706 #endif /* CONFIG_64BIT */
709 #define iowrite16be iowrite16be
710 static inline void iowrite16be(u16 value
, void volatile __iomem
*addr
)
712 writew(swab16(value
), addr
);
717 #define iowrite32be iowrite32be
718 static inline void iowrite32be(u32 value
, volatile void __iomem
*addr
)
720 writel(swab32(value
), addr
);
726 #define iowrite64be iowrite64be
727 static inline void iowrite64be(u64 value
, volatile void __iomem
*addr
)
729 writeq(swab64(value
), addr
);
732 #endif /* CONFIG_64BIT */
735 #define ioread8_rep ioread8_rep
736 static inline void ioread8_rep(const volatile void __iomem
*addr
, void *buffer
,
739 readsb(addr
, buffer
, count
);
744 #define ioread16_rep ioread16_rep
745 static inline void ioread16_rep(const volatile void __iomem
*addr
,
746 void *buffer
, unsigned int count
)
748 readsw(addr
, buffer
, count
);
753 #define ioread32_rep ioread32_rep
754 static inline void ioread32_rep(const volatile void __iomem
*addr
,
755 void *buffer
, unsigned int count
)
757 readsl(addr
, buffer
, count
);
763 #define ioread64_rep ioread64_rep
764 static inline void ioread64_rep(const volatile void __iomem
*addr
,
765 void *buffer
, unsigned int count
)
767 readsq(addr
, buffer
, count
);
770 #endif /* CONFIG_64BIT */
773 #define iowrite8_rep iowrite8_rep
774 static inline void iowrite8_rep(volatile void __iomem
*addr
,
778 writesb(addr
, buffer
, count
);
782 #ifndef iowrite16_rep
783 #define iowrite16_rep iowrite16_rep
784 static inline void iowrite16_rep(volatile void __iomem
*addr
,
788 writesw(addr
, buffer
, count
);
792 #ifndef iowrite32_rep
793 #define iowrite32_rep iowrite32_rep
794 static inline void iowrite32_rep(volatile void __iomem
*addr
,
798 writesl(addr
, buffer
, count
);
803 #ifndef iowrite64_rep
804 #define iowrite64_rep iowrite64_rep
805 static inline void iowrite64_rep(volatile void __iomem
*addr
,
809 writesq(addr
, buffer
, count
);
812 #endif /* CONFIG_64BIT */
813 #endif /* CONFIG_GENERIC_IOMAP */
817 #include <linux/vmalloc.h>
818 #define __io_virt(x) ((void __force *)(x))
820 #ifndef CONFIG_GENERIC_IOMAP
822 extern void __iomem
*pci_iomap(struct pci_dev
*dev
, int bar
, unsigned long max
);
825 #define pci_iounmap pci_iounmap
826 static inline void pci_iounmap(struct pci_dev
*dev
, void __iomem
*p
)
830 #endif /* CONFIG_GENERIC_IOMAP */
833 * Change virtual addresses to physical addresses and vv.
834 * These are pretty trivial
837 #define virt_to_phys virt_to_phys
838 static inline unsigned long virt_to_phys(volatile void *address
)
840 return __pa((unsigned long)address
);
845 #define phys_to_virt phys_to_virt
846 static inline void *phys_to_virt(unsigned long address
)
848 return __va(address
);
853 * DOC: ioremap() and ioremap_*() variants
855 * If you have an IOMMU your architecture is expected to have both ioremap()
856 * and iounmap() implemented otherwise the asm-generic helpers will provide a
859 * There are ioremap_*() call variants, if you have no IOMMU we naturally will
860 * default to direct mapping for all of them, you can override these defaults.
861 * If you have an IOMMU you are highly encouraged to provide your own
862 * ioremap variant implementation as there currently is no safe architecture
863 * agnostic default. To avoid possible improper behaviour default asm-generic
864 * ioremap_*() variants all return NULL when an IOMMU is available. If you've
865 * defined your own ioremap_*() variant you must then declare your own
866 * ioremap_*() variant as defined to itself to avoid the default NULL return.
872 #define ioremap_uc ioremap_uc
873 static inline void __iomem
*ioremap_uc(phys_addr_t offset
, size_t size
)
879 #else /* !CONFIG_MMU */
882 * Change "struct page" to physical address.
884 * This implementation is for the no-MMU case only... if you have an MMU
885 * you'll need to provide your own definitions.
889 #define ioremap ioremap
890 static inline void __iomem
*ioremap(phys_addr_t offset
, size_t size
)
892 return (void __iomem
*)(unsigned long)offset
;
897 #define __ioremap __ioremap
898 static inline void __iomem
*__ioremap(phys_addr_t offset
, size_t size
,
901 return ioremap(offset
, size
);
905 #ifndef ioremap_nocache
906 #define ioremap_nocache ioremap_nocache
907 static inline void __iomem
*ioremap_nocache(phys_addr_t offset
, size_t size
)
909 return ioremap(offset
, size
);
914 #define ioremap_uc ioremap_uc
915 static inline void __iomem
*ioremap_uc(phys_addr_t offset
, size_t size
)
917 return ioremap_nocache(offset
, size
);
922 #define ioremap_wc ioremap_wc
923 static inline void __iomem
*ioremap_wc(phys_addr_t offset
, size_t size
)
925 return ioremap_nocache(offset
, size
);
930 #define ioremap_wt ioremap_wt
931 static inline void __iomem
*ioremap_wt(phys_addr_t offset
, size_t size
)
933 return ioremap_nocache(offset
, size
);
938 #define iounmap iounmap
940 static inline void iounmap(void __iomem
*addr
)
944 #endif /* CONFIG_MMU */
946 #ifdef CONFIG_HAS_IOPORT_MAP
947 #ifndef CONFIG_GENERIC_IOMAP
949 #define ioport_map ioport_map
950 static inline void __iomem
*ioport_map(unsigned long port
, unsigned int nr
)
952 return PCI_IOBASE
+ (port
& IO_SPACE_LIMIT
);
957 #define ioport_unmap ioport_unmap
958 static inline void ioport_unmap(void __iomem
*p
)
962 #else /* CONFIG_GENERIC_IOMAP */
963 extern void __iomem
*ioport_map(unsigned long port
, unsigned int nr
);
964 extern void ioport_unmap(void __iomem
*p
);
965 #endif /* CONFIG_GENERIC_IOMAP */
966 #endif /* CONFIG_HAS_IOPORT_MAP */
968 #ifndef xlate_dev_kmem_ptr
969 #define xlate_dev_kmem_ptr xlate_dev_kmem_ptr
970 static inline void *xlate_dev_kmem_ptr(void *addr
)
976 #ifndef xlate_dev_mem_ptr
977 #define xlate_dev_mem_ptr xlate_dev_mem_ptr
978 static inline void *xlate_dev_mem_ptr(phys_addr_t addr
)
984 #ifndef unxlate_dev_mem_ptr
985 #define unxlate_dev_mem_ptr unxlate_dev_mem_ptr
986 static inline void unxlate_dev_mem_ptr(phys_addr_t phys
, void *addr
)
991 #ifdef CONFIG_VIRT_TO_BUS
993 static inline unsigned long virt_to_bus(void *address
)
995 return (unsigned long)address
;
998 static inline void *bus_to_virt(unsigned long address
)
1000 return (void *)address
;
1006 #define memset_io memset_io
1007 static inline void memset_io(volatile void __iomem
*addr
, int value
,
1010 memset(__io_virt(addr
), value
, size
);
1014 #ifndef memcpy_fromio
1015 #define memcpy_fromio memcpy_fromio
1016 static inline void memcpy_fromio(void *buffer
,
1017 const volatile void __iomem
*addr
,
1020 memcpy(buffer
, __io_virt(addr
), size
);
1025 #define memcpy_toio memcpy_toio
1026 static inline void memcpy_toio(volatile void __iomem
*addr
, const void *buffer
,
1029 memcpy(__io_virt(addr
), buffer
, size
);
1033 #endif /* __KERNEL__ */
1035 #endif /* __ASM_GENERIC_IO_H */