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1 /* Generic I/O port emulation, based on MN10300 code
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
11 #ifndef __ASM_GENERIC_IO_H
12 #define __ASM_GENERIC_IO_H
14 #include <asm/page.h> /* I/O is all done through memory accesses */
15 #include <linux/string.h> /* for memset() and memcpy() */
16 #include <linux/types.h>
18 #ifdef CONFIG_GENERIC_IOMAP
19 #include <asm-generic/iomap.h>
22 #include <asm-generic/pci_iomap.h>
25 #define mmiowb() do {} while (0)
29 * __raw_{read,write}{b,w,l,q}() access memory in native endianness.
31 * On some architectures memory mapped IO needs to be accessed differently.
32 * On the simple architectures, we just read/write the memory location
37 #define __raw_readb __raw_readb
38 static inline u8
__raw_readb(const volatile void __iomem
*addr
)
40 return *(const volatile u8 __force
*)addr
;
45 #define __raw_readw __raw_readw
46 static inline u16
__raw_readw(const volatile void __iomem
*addr
)
48 return *(const volatile u16 __force
*)addr
;
53 #define __raw_readl __raw_readl
54 static inline u32
__raw_readl(const volatile void __iomem
*addr
)
56 return *(const volatile u32 __force
*)addr
;
62 #define __raw_readq __raw_readq
63 static inline u64
__raw_readq(const volatile void __iomem
*addr
)
65 return *(const volatile u64 __force
*)addr
;
68 #endif /* CONFIG_64BIT */
71 #define __raw_writeb __raw_writeb
72 static inline void __raw_writeb(u8 value
, volatile void __iomem
*addr
)
74 *(volatile u8 __force
*)addr
= value
;
79 #define __raw_writew __raw_writew
80 static inline void __raw_writew(u16 value
, volatile void __iomem
*addr
)
82 *(volatile u16 __force
*)addr
= value
;
87 #define __raw_writel __raw_writel
88 static inline void __raw_writel(u32 value
, volatile void __iomem
*addr
)
90 *(volatile u32 __force
*)addr
= value
;
96 #define __raw_writeq __raw_writeq
97 static inline void __raw_writeq(u64 value
, volatile void __iomem
*addr
)
99 *(volatile u64 __force
*)addr
= value
;
102 #endif /* CONFIG_64BIT */
105 * {read,write}{b,w,l,q}() access little endian memory and return result in
111 static inline u8
readb(const volatile void __iomem
*addr
)
113 return __raw_readb(addr
);
119 static inline u16
readw(const volatile void __iomem
*addr
)
121 return __le16_to_cpu(__raw_readw(addr
));
127 static inline u32
readl(const volatile void __iomem
*addr
)
129 return __le32_to_cpu(__raw_readl(addr
));
136 static inline u64
readq(const volatile void __iomem
*addr
)
138 return __le64_to_cpu(__raw_readq(addr
));
141 #endif /* CONFIG_64BIT */
144 #define writeb writeb
145 static inline void writeb(u8 value
, volatile void __iomem
*addr
)
147 __raw_writeb(value
, addr
);
152 #define writew writew
153 static inline void writew(u16 value
, volatile void __iomem
*addr
)
155 __raw_writew(cpu_to_le16(value
), addr
);
160 #define writel writel
161 static inline void writel(u32 value
, volatile void __iomem
*addr
)
163 __raw_writel(__cpu_to_le32(value
), addr
);
169 #define writeq writeq
170 static inline void writeq(u64 value
, volatile void __iomem
*addr
)
172 __raw_writeq(__cpu_to_le64(value
), addr
);
175 #endif /* CONFIG_64BIT */
178 * {read,write}{b,w,l,q}_relaxed() are like the regular version, but
179 * are not guaranteed to provide ordering against spinlocks or memory
182 #ifndef readb_relaxed
183 #define readb_relaxed readb
186 #ifndef readw_relaxed
187 #define readw_relaxed readw
190 #ifndef readl_relaxed
191 #define readl_relaxed readl
194 #if defined(readq) && !defined(readq_relaxed)
195 #define readq_relaxed readq
198 #ifndef writeb_relaxed
199 #define writeb_relaxed writeb
202 #ifndef writew_relaxed
203 #define writew_relaxed writew
206 #ifndef writel_relaxed
207 #define writel_relaxed writel
210 #if defined(writeq) && !defined(writeq_relaxed)
211 #define writeq_relaxed writeq
215 * {read,write}s{b,w,l,q}() repeatedly access the same memory address in
216 * native endianness in 8-, 16-, 32- or 64-bit chunks (@count times).
219 #define readsb readsb
220 static inline void readsb(const volatile void __iomem
*addr
, void *buffer
,
227 u8 x
= __raw_readb(addr
);
235 #define readsw readsw
236 static inline void readsw(const volatile void __iomem
*addr
, void *buffer
,
243 u16 x
= __raw_readw(addr
);
251 #define readsl readsl
252 static inline void readsl(const volatile void __iomem
*addr
, void *buffer
,
259 u32 x
= __raw_readl(addr
);
268 #define readsq readsq
269 static inline void readsq(const volatile void __iomem
*addr
, void *buffer
,
276 u64 x
= __raw_readq(addr
);
282 #endif /* CONFIG_64BIT */
285 #define writesb writesb
286 static inline void writesb(volatile void __iomem
*addr
, const void *buffer
,
290 const u8
*buf
= buffer
;
293 __raw_writeb(*buf
++, addr
);
300 #define writesw writesw
301 static inline void writesw(volatile void __iomem
*addr
, const void *buffer
,
305 const u16
*buf
= buffer
;
308 __raw_writew(*buf
++, addr
);
315 #define writesl writesl
316 static inline void writesl(volatile void __iomem
*addr
, const void *buffer
,
320 const u32
*buf
= buffer
;
323 __raw_writel(*buf
++, addr
);
331 #define writesq writesq
332 static inline void writesq(volatile void __iomem
*addr
, const void *buffer
,
336 const u64
*buf
= buffer
;
339 __raw_writeq(*buf
++, addr
);
344 #endif /* CONFIG_64BIT */
347 #define PCI_IOBASE ((void __iomem *)0)
350 #ifndef IO_SPACE_LIMIT
351 #define IO_SPACE_LIMIT 0xffff
354 #include <linux/logic_pio.h>
357 * {in,out}{b,w,l}() access little endian I/O. {in,out}{b,w,l}_p() can be
358 * implemented on hardware that needs an additional delay for I/O accesses to
364 static inline u8
inb(unsigned long addr
)
366 return readb(PCI_IOBASE
+ addr
);
372 static inline u16
inw(unsigned long addr
)
374 return readw(PCI_IOBASE
+ addr
);
380 static inline u32
inl(unsigned long addr
)
382 return readl(PCI_IOBASE
+ addr
);
388 static inline void outb(u8 value
, unsigned long addr
)
390 writeb(value
, PCI_IOBASE
+ addr
);
396 static inline void outw(u16 value
, unsigned long addr
)
398 writew(value
, PCI_IOBASE
+ addr
);
404 static inline void outl(u32 value
, unsigned long addr
)
406 writel(value
, PCI_IOBASE
+ addr
);
412 static inline u8
inb_p(unsigned long addr
)
420 static inline u16
inw_p(unsigned long addr
)
428 static inline u32
inl_p(unsigned long addr
)
435 #define outb_p outb_p
436 static inline void outb_p(u8 value
, unsigned long addr
)
443 #define outw_p outw_p
444 static inline void outw_p(u16 value
, unsigned long addr
)
451 #define outl_p outl_p
452 static inline void outl_p(u32 value
, unsigned long addr
)
459 * {in,out}s{b,w,l}{,_p}() are variants of the above that repeatedly access a
460 * single I/O port multiple times.
465 static inline void insb(unsigned long addr
, void *buffer
, unsigned int count
)
467 readsb(PCI_IOBASE
+ addr
, buffer
, count
);
473 static inline void insw(unsigned long addr
, void *buffer
, unsigned int count
)
475 readsw(PCI_IOBASE
+ addr
, buffer
, count
);
481 static inline void insl(unsigned long addr
, void *buffer
, unsigned int count
)
483 readsl(PCI_IOBASE
+ addr
, buffer
, count
);
489 static inline void outsb(unsigned long addr
, const void *buffer
,
492 writesb(PCI_IOBASE
+ addr
, buffer
, count
);
498 static inline void outsw(unsigned long addr
, const void *buffer
,
501 writesw(PCI_IOBASE
+ addr
, buffer
, count
);
507 static inline void outsl(unsigned long addr
, const void *buffer
,
510 writesl(PCI_IOBASE
+ addr
, buffer
, count
);
515 #define insb_p insb_p
516 static inline void insb_p(unsigned long addr
, void *buffer
, unsigned int count
)
518 insb(addr
, buffer
, count
);
523 #define insw_p insw_p
524 static inline void insw_p(unsigned long addr
, void *buffer
, unsigned int count
)
526 insw(addr
, buffer
, count
);
531 #define insl_p insl_p
532 static inline void insl_p(unsigned long addr
, void *buffer
, unsigned int count
)
534 insl(addr
, buffer
, count
);
539 #define outsb_p outsb_p
540 static inline void outsb_p(unsigned long addr
, const void *buffer
,
543 outsb(addr
, buffer
, count
);
548 #define outsw_p outsw_p
549 static inline void outsw_p(unsigned long addr
, const void *buffer
,
552 outsw(addr
, buffer
, count
);
557 #define outsl_p outsl_p
558 static inline void outsl_p(unsigned long addr
, const void *buffer
,
561 outsl(addr
, buffer
, count
);
565 #ifndef CONFIG_GENERIC_IOMAP
567 #define ioread8 ioread8
568 static inline u8
ioread8(const volatile void __iomem
*addr
)
575 #define ioread16 ioread16
576 static inline u16
ioread16(const volatile void __iomem
*addr
)
583 #define ioread32 ioread32
584 static inline u32
ioread32(const volatile void __iomem
*addr
)
592 #define ioread64 ioread64
593 static inline u64
ioread64(const volatile void __iomem
*addr
)
598 #endif /* CONFIG_64BIT */
601 #define iowrite8 iowrite8
602 static inline void iowrite8(u8 value
, volatile void __iomem
*addr
)
609 #define iowrite16 iowrite16
610 static inline void iowrite16(u16 value
, volatile void __iomem
*addr
)
617 #define iowrite32 iowrite32
618 static inline void iowrite32(u32 value
, volatile void __iomem
*addr
)
626 #define iowrite64 iowrite64
627 static inline void iowrite64(u64 value
, volatile void __iomem
*addr
)
632 #endif /* CONFIG_64BIT */
635 #define ioread16be ioread16be
636 static inline u16
ioread16be(const volatile void __iomem
*addr
)
638 return swab16(readw(addr
));
643 #define ioread32be ioread32be
644 static inline u32
ioread32be(const volatile void __iomem
*addr
)
646 return swab32(readl(addr
));
652 #define ioread64be ioread64be
653 static inline u64
ioread64be(const volatile void __iomem
*addr
)
655 return swab64(readq(addr
));
658 #endif /* CONFIG_64BIT */
661 #define iowrite16be iowrite16be
662 static inline void iowrite16be(u16 value
, void volatile __iomem
*addr
)
664 writew(swab16(value
), addr
);
669 #define iowrite32be iowrite32be
670 static inline void iowrite32be(u32 value
, volatile void __iomem
*addr
)
672 writel(swab32(value
), addr
);
678 #define iowrite64be iowrite64be
679 static inline void iowrite64be(u64 value
, volatile void __iomem
*addr
)
681 writeq(swab64(value
), addr
);
684 #endif /* CONFIG_64BIT */
687 #define ioread8_rep ioread8_rep
688 static inline void ioread8_rep(const volatile void __iomem
*addr
, void *buffer
,
691 readsb(addr
, buffer
, count
);
696 #define ioread16_rep ioread16_rep
697 static inline void ioread16_rep(const volatile void __iomem
*addr
,
698 void *buffer
, unsigned int count
)
700 readsw(addr
, buffer
, count
);
705 #define ioread32_rep ioread32_rep
706 static inline void ioread32_rep(const volatile void __iomem
*addr
,
707 void *buffer
, unsigned int count
)
709 readsl(addr
, buffer
, count
);
715 #define ioread64_rep ioread64_rep
716 static inline void ioread64_rep(const volatile void __iomem
*addr
,
717 void *buffer
, unsigned int count
)
719 readsq(addr
, buffer
, count
);
722 #endif /* CONFIG_64BIT */
725 #define iowrite8_rep iowrite8_rep
726 static inline void iowrite8_rep(volatile void __iomem
*addr
,
730 writesb(addr
, buffer
, count
);
734 #ifndef iowrite16_rep
735 #define iowrite16_rep iowrite16_rep
736 static inline void iowrite16_rep(volatile void __iomem
*addr
,
740 writesw(addr
, buffer
, count
);
744 #ifndef iowrite32_rep
745 #define iowrite32_rep iowrite32_rep
746 static inline void iowrite32_rep(volatile void __iomem
*addr
,
750 writesl(addr
, buffer
, count
);
755 #ifndef iowrite64_rep
756 #define iowrite64_rep iowrite64_rep
757 static inline void iowrite64_rep(volatile void __iomem
*addr
,
761 writesq(addr
, buffer
, count
);
764 #endif /* CONFIG_64BIT */
765 #endif /* CONFIG_GENERIC_IOMAP */
769 #include <linux/vmalloc.h>
770 #define __io_virt(x) ((void __force *)(x))
772 #ifndef CONFIG_GENERIC_IOMAP
774 extern void __iomem
*pci_iomap(struct pci_dev
*dev
, int bar
, unsigned long max
);
777 #define pci_iounmap pci_iounmap
778 static inline void pci_iounmap(struct pci_dev
*dev
, void __iomem
*p
)
782 #endif /* CONFIG_GENERIC_IOMAP */
785 * Change virtual addresses to physical addresses and vv.
786 * These are pretty trivial
789 #define virt_to_phys virt_to_phys
790 static inline unsigned long virt_to_phys(volatile void *address
)
792 return __pa((unsigned long)address
);
797 #define phys_to_virt phys_to_virt
798 static inline void *phys_to_virt(unsigned long address
)
800 return __va(address
);
805 * DOC: ioremap() and ioremap_*() variants
807 * If you have an IOMMU your architecture is expected to have both ioremap()
808 * and iounmap() implemented otherwise the asm-generic helpers will provide a
811 * There are ioremap_*() call variants, if you have no IOMMU we naturally will
812 * default to direct mapping for all of them, you can override these defaults.
813 * If you have an IOMMU you are highly encouraged to provide your own
814 * ioremap variant implementation as there currently is no safe architecture
815 * agnostic default. To avoid possible improper behaviour default asm-generic
816 * ioremap_*() variants all return NULL when an IOMMU is available. If you've
817 * defined your own ioremap_*() variant you must then declare your own
818 * ioremap_*() variant as defined to itself to avoid the default NULL return.
824 #define ioremap_uc ioremap_uc
825 static inline void __iomem
*ioremap_uc(phys_addr_t offset
, size_t size
)
831 #else /* !CONFIG_MMU */
834 * Change "struct page" to physical address.
836 * This implementation is for the no-MMU case only... if you have an MMU
837 * you'll need to provide your own definitions.
841 #define ioremap ioremap
842 static inline void __iomem
*ioremap(phys_addr_t offset
, size_t size
)
844 return (void __iomem
*)(unsigned long)offset
;
849 #define __ioremap __ioremap
850 static inline void __iomem
*__ioremap(phys_addr_t offset
, size_t size
,
853 return ioremap(offset
, size
);
857 #ifndef ioremap_nocache
858 #define ioremap_nocache ioremap_nocache
859 static inline void __iomem
*ioremap_nocache(phys_addr_t offset
, size_t size
)
861 return ioremap(offset
, size
);
866 #define ioremap_uc ioremap_uc
867 static inline void __iomem
*ioremap_uc(phys_addr_t offset
, size_t size
)
869 return ioremap_nocache(offset
, size
);
874 #define ioremap_wc ioremap_wc
875 static inline void __iomem
*ioremap_wc(phys_addr_t offset
, size_t size
)
877 return ioremap_nocache(offset
, size
);
882 #define ioremap_wt ioremap_wt
883 static inline void __iomem
*ioremap_wt(phys_addr_t offset
, size_t size
)
885 return ioremap_nocache(offset
, size
);
890 #define iounmap iounmap
892 static inline void iounmap(void __iomem
*addr
)
896 #endif /* CONFIG_MMU */
898 #ifdef CONFIG_HAS_IOPORT_MAP
899 #ifndef CONFIG_GENERIC_IOMAP
901 #define ioport_map ioport_map
902 static inline void __iomem
*ioport_map(unsigned long port
, unsigned int nr
)
904 port
&= IO_SPACE_LIMIT
;
905 return (port
> MMIO_UPPER_LIMIT
) ? NULL
: PCI_IOBASE
+ port
;
910 #define ioport_unmap ioport_unmap
911 static inline void ioport_unmap(void __iomem
*p
)
915 #else /* CONFIG_GENERIC_IOMAP */
916 extern void __iomem
*ioport_map(unsigned long port
, unsigned int nr
);
917 extern void ioport_unmap(void __iomem
*p
);
918 #endif /* CONFIG_GENERIC_IOMAP */
919 #endif /* CONFIG_HAS_IOPORT_MAP */
922 * Convert a virtual cached pointer to an uncached pointer
924 #ifndef xlate_dev_kmem_ptr
925 #define xlate_dev_kmem_ptr xlate_dev_kmem_ptr
926 static inline void *xlate_dev_kmem_ptr(void *addr
)
932 #ifndef xlate_dev_mem_ptr
933 #define xlate_dev_mem_ptr xlate_dev_mem_ptr
934 static inline void *xlate_dev_mem_ptr(phys_addr_t addr
)
940 #ifndef unxlate_dev_mem_ptr
941 #define unxlate_dev_mem_ptr unxlate_dev_mem_ptr
942 static inline void unxlate_dev_mem_ptr(phys_addr_t phys
, void *addr
)
947 #ifdef CONFIG_VIRT_TO_BUS
949 static inline unsigned long virt_to_bus(void *address
)
951 return (unsigned long)address
;
954 static inline void *bus_to_virt(unsigned long address
)
956 return (void *)address
;
962 #define memset_io memset_io
964 * memset_io Set a range of I/O memory to a constant value
965 * @addr: The beginning of the I/O-memory range to set
966 * @val: The value to set the memory to
967 * @count: The number of bytes to set
969 * Set a range of I/O memory to a given value.
971 static inline void memset_io(volatile void __iomem
*addr
, int value
,
974 memset(__io_virt(addr
), value
, size
);
978 #ifndef memcpy_fromio
979 #define memcpy_fromio memcpy_fromio
981 * memcpy_fromio Copy a block of data from I/O memory
982 * @dst: The (RAM) destination for the copy
983 * @src: The (I/O memory) source for the data
984 * @count: The number of bytes to copy
986 * Copy a block of data from I/O memory.
988 static inline void memcpy_fromio(void *buffer
,
989 const volatile void __iomem
*addr
,
992 memcpy(buffer
, __io_virt(addr
), size
);
997 #define memcpy_toio memcpy_toio
999 * memcpy_toio Copy a block of data into I/O memory
1000 * @dst: The (I/O memory) destination for the copy
1001 * @src: The (RAM) source for the data
1002 * @count: The number of bytes to copy
1004 * Copy a block of data to I/O memory.
1006 static inline void memcpy_toio(volatile void __iomem
*addr
, const void *buffer
,
1009 memcpy(__io_virt(addr
), buffer
, size
);
1013 #endif /* __KERNEL__ */
1015 #endif /* __ASM_GENERIC_IO_H */