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1 #ifndef _ASM_GENERIC_PGTABLE_H
2 #define _ASM_GENERIC_PGTABLE_H
3
4 #include <linux/pfn.h>
5
6 #ifndef __ASSEMBLY__
7 #ifdef CONFIG_MMU
8
9 #include <linux/mm_types.h>
10 #include <linux/bug.h>
11 #include <linux/errno.h>
12
13 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \
14 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS
15 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
16 #endif
17
18 /*
19 * On almost all architectures and configurations, 0 can be used as the
20 * upper ceiling to free_pgtables(): on many architectures it has the same
21 * effect as using TASK_SIZE. However, there is one configuration which
22 * must impose a more careful limit, to avoid freeing kernel pgtables.
23 */
24 #ifndef USER_PGTABLES_CEILING
25 #define USER_PGTABLES_CEILING 0UL
26 #endif
27
28 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
29 extern int ptep_set_access_flags(struct vm_area_struct *vma,
30 unsigned long address, pte_t *ptep,
31 pte_t entry, int dirty);
32 #endif
33
34 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
35 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
36 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
37 unsigned long address, pmd_t *pmdp,
38 pmd_t entry, int dirty);
39 extern int pudp_set_access_flags(struct vm_area_struct *vma,
40 unsigned long address, pud_t *pudp,
41 pud_t entry, int dirty);
42 #else
43 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
44 unsigned long address, pmd_t *pmdp,
45 pmd_t entry, int dirty)
46 {
47 BUILD_BUG();
48 return 0;
49 }
50 static inline int pudp_set_access_flags(struct vm_area_struct *vma,
51 unsigned long address, pud_t *pudp,
52 pud_t entry, int dirty)
53 {
54 BUILD_BUG();
55 return 0;
56 }
57 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
58 #endif
59
60 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
61 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
62 unsigned long address,
63 pte_t *ptep)
64 {
65 pte_t pte = *ptep;
66 int r = 1;
67 if (!pte_young(pte))
68 r = 0;
69 else
70 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
71 return r;
72 }
73 #endif
74
75 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
76 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
77 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
78 unsigned long address,
79 pmd_t *pmdp)
80 {
81 pmd_t pmd = *pmdp;
82 int r = 1;
83 if (!pmd_young(pmd))
84 r = 0;
85 else
86 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
87 return r;
88 }
89 #else
90 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
91 unsigned long address,
92 pmd_t *pmdp)
93 {
94 BUILD_BUG();
95 return 0;
96 }
97 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
98 #endif
99
100 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
101 int ptep_clear_flush_young(struct vm_area_struct *vma,
102 unsigned long address, pte_t *ptep);
103 #endif
104
105 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
106 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
107 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
108 unsigned long address, pmd_t *pmdp);
109 #else
110 /*
111 * Despite relevant to THP only, this API is called from generic rmap code
112 * under PageTransHuge(), hence needs a dummy implementation for !THP
113 */
114 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
115 unsigned long address, pmd_t *pmdp)
116 {
117 BUILD_BUG();
118 return 0;
119 }
120 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
121 #endif
122
123 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
124 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
125 unsigned long address,
126 pte_t *ptep)
127 {
128 pte_t pte = *ptep;
129 pte_clear(mm, address, ptep);
130 return pte;
131 }
132 #endif
133
134 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
135 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
136 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
137 unsigned long address,
138 pmd_t *pmdp)
139 {
140 pmd_t pmd = *pmdp;
141 pmd_clear(pmdp);
142 return pmd;
143 }
144 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */
145 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
146 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
147 unsigned long address,
148 pud_t *pudp)
149 {
150 pud_t pud = *pudp;
151
152 pud_clear(pudp);
153 return pud;
154 }
155 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */
156 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
157
158 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
159 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
160 static inline pmd_t pmdp_huge_get_and_clear_full(struct mm_struct *mm,
161 unsigned long address, pmd_t *pmdp,
162 int full)
163 {
164 return pmdp_huge_get_and_clear(mm, address, pmdp);
165 }
166 #endif
167
168 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
169 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm,
170 unsigned long address, pud_t *pudp,
171 int full)
172 {
173 return pudp_huge_get_and_clear(mm, address, pudp);
174 }
175 #endif
176 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
177
178 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
179 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
180 unsigned long address, pte_t *ptep,
181 int full)
182 {
183 pte_t pte;
184 pte = ptep_get_and_clear(mm, address, ptep);
185 return pte;
186 }
187 #endif
188
189 /*
190 * Some architectures may be able to avoid expensive synchronization
191 * primitives when modifications are made to PTE's which are already
192 * not present, or in the process of an address space destruction.
193 */
194 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
195 static inline void pte_clear_not_present_full(struct mm_struct *mm,
196 unsigned long address,
197 pte_t *ptep,
198 int full)
199 {
200 pte_clear(mm, address, ptep);
201 }
202 #endif
203
204 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
205 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
206 unsigned long address,
207 pte_t *ptep);
208 #endif
209
210 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
211 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
212 unsigned long address,
213 pmd_t *pmdp);
214 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma,
215 unsigned long address,
216 pud_t *pudp);
217 #endif
218
219 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
220 struct mm_struct;
221 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
222 {
223 pte_t old_pte = *ptep;
224 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
225 }
226 #endif
227
228 #ifndef pte_savedwrite
229 #define pte_savedwrite pte_write
230 #endif
231
232 #ifndef pte_mk_savedwrite
233 #define pte_mk_savedwrite pte_mkwrite
234 #endif
235
236 #ifndef pte_clear_savedwrite
237 #define pte_clear_savedwrite pte_wrprotect
238 #endif
239
240 #ifndef pmd_savedwrite
241 #define pmd_savedwrite pmd_write
242 #endif
243
244 #ifndef pmd_mk_savedwrite
245 #define pmd_mk_savedwrite pmd_mkwrite
246 #endif
247
248 #ifndef pmd_clear_savedwrite
249 #define pmd_clear_savedwrite pmd_wrprotect
250 #endif
251
252 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
253 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
254 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
255 unsigned long address, pmd_t *pmdp)
256 {
257 pmd_t old_pmd = *pmdp;
258 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
259 }
260 #else
261 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
262 unsigned long address, pmd_t *pmdp)
263 {
264 BUILD_BUG();
265 }
266 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
267 #endif
268 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT
269 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
270 static inline void pudp_set_wrprotect(struct mm_struct *mm,
271 unsigned long address, pud_t *pudp)
272 {
273 pud_t old_pud = *pudp;
274
275 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud));
276 }
277 #else
278 static inline void pudp_set_wrprotect(struct mm_struct *mm,
279 unsigned long address, pud_t *pudp)
280 {
281 BUILD_BUG();
282 }
283 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
284 #endif
285
286 #ifndef pmdp_collapse_flush
287 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
288 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
289 unsigned long address, pmd_t *pmdp);
290 #else
291 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
292 unsigned long address,
293 pmd_t *pmdp)
294 {
295 BUILD_BUG();
296 return *pmdp;
297 }
298 #define pmdp_collapse_flush pmdp_collapse_flush
299 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
300 #endif
301
302 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
303 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
304 pgtable_t pgtable);
305 #endif
306
307 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
308 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
309 #endif
310
311 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
312 extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
313 pmd_t *pmdp);
314 #endif
315
316 #ifndef __HAVE_ARCH_PMDP_HUGE_SPLIT_PREPARE
317 static inline void pmdp_huge_split_prepare(struct vm_area_struct *vma,
318 unsigned long address, pmd_t *pmdp)
319 {
320
321 }
322 #endif
323
324 #ifndef __HAVE_ARCH_PTE_SAME
325 static inline int pte_same(pte_t pte_a, pte_t pte_b)
326 {
327 return pte_val(pte_a) == pte_val(pte_b);
328 }
329 #endif
330
331 #ifndef __HAVE_ARCH_PTE_UNUSED
332 /*
333 * Some architectures provide facilities to virtualization guests
334 * so that they can flag allocated pages as unused. This allows the
335 * host to transparently reclaim unused pages. This function returns
336 * whether the pte's page is unused.
337 */
338 static inline int pte_unused(pte_t pte)
339 {
340 return 0;
341 }
342 #endif
343
344 #ifndef pte_access_permitted
345 #define pte_access_permitted(pte, write) \
346 (pte_present(pte) && (!(write) || pte_write(pte)))
347 #endif
348
349 #ifndef pmd_access_permitted
350 #define pmd_access_permitted(pmd, write) \
351 (pmd_present(pmd) && (!(write) || pmd_write(pmd)))
352 #endif
353
354 #ifndef pud_access_permitted
355 #define pud_access_permitted(pud, write) \
356 (pud_present(pud) && (!(write) || pud_write(pud)))
357 #endif
358
359 #ifndef p4d_access_permitted
360 #define p4d_access_permitted(p4d, write) \
361 (p4d_present(p4d) && (!(write) || p4d_write(p4d)))
362 #endif
363
364 #ifndef pgd_access_permitted
365 #define pgd_access_permitted(pgd, write) \
366 (pgd_present(pgd) && (!(write) || pgd_write(pgd)))
367 #endif
368
369 #ifndef __HAVE_ARCH_PMD_SAME
370 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
371 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
372 {
373 return pmd_val(pmd_a) == pmd_val(pmd_b);
374 }
375
376 static inline int pud_same(pud_t pud_a, pud_t pud_b)
377 {
378 return pud_val(pud_a) == pud_val(pud_b);
379 }
380 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
381 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
382 {
383 BUILD_BUG();
384 return 0;
385 }
386
387 static inline int pud_same(pud_t pud_a, pud_t pud_b)
388 {
389 BUILD_BUG();
390 return 0;
391 }
392 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
393 #endif
394
395 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
396 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
397 #endif
398
399 #ifndef __HAVE_ARCH_MOVE_PTE
400 #define move_pte(pte, prot, old_addr, new_addr) (pte)
401 #endif
402
403 #ifndef pte_accessible
404 # define pte_accessible(mm, pte) ((void)(pte), 1)
405 #endif
406
407 #ifndef flush_tlb_fix_spurious_fault
408 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
409 #endif
410
411 #ifndef pgprot_noncached
412 #define pgprot_noncached(prot) (prot)
413 #endif
414
415 #ifndef pgprot_writecombine
416 #define pgprot_writecombine pgprot_noncached
417 #endif
418
419 #ifndef pgprot_writethrough
420 #define pgprot_writethrough pgprot_noncached
421 #endif
422
423 #ifndef pgprot_device
424 #define pgprot_device pgprot_noncached
425 #endif
426
427 #ifndef pgprot_modify
428 #define pgprot_modify pgprot_modify
429 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
430 {
431 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
432 newprot = pgprot_noncached(newprot);
433 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
434 newprot = pgprot_writecombine(newprot);
435 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
436 newprot = pgprot_device(newprot);
437 return newprot;
438 }
439 #endif
440
441 /*
442 * When walking page tables, get the address of the next boundary,
443 * or the end address of the range if that comes earlier. Although no
444 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
445 */
446
447 #define pgd_addr_end(addr, end) \
448 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
449 (__boundary - 1 < (end) - 1)? __boundary: (end); \
450 })
451
452 #ifndef p4d_addr_end
453 #define p4d_addr_end(addr, end) \
454 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \
455 (__boundary - 1 < (end) - 1)? __boundary: (end); \
456 })
457 #endif
458
459 #ifndef pud_addr_end
460 #define pud_addr_end(addr, end) \
461 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
462 (__boundary - 1 < (end) - 1)? __boundary: (end); \
463 })
464 #endif
465
466 #ifndef pmd_addr_end
467 #define pmd_addr_end(addr, end) \
468 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
469 (__boundary - 1 < (end) - 1)? __boundary: (end); \
470 })
471 #endif
472
473 /*
474 * When walking page tables, we usually want to skip any p?d_none entries;
475 * and any p?d_bad entries - reporting the error before resetting to none.
476 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
477 */
478 void pgd_clear_bad(pgd_t *);
479 void p4d_clear_bad(p4d_t *);
480 void pud_clear_bad(pud_t *);
481 void pmd_clear_bad(pmd_t *);
482
483 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
484 {
485 if (pgd_none(*pgd))
486 return 1;
487 if (unlikely(pgd_bad(*pgd))) {
488 pgd_clear_bad(pgd);
489 return 1;
490 }
491 return 0;
492 }
493
494 static inline int p4d_none_or_clear_bad(p4d_t *p4d)
495 {
496 if (p4d_none(*p4d))
497 return 1;
498 if (unlikely(p4d_bad(*p4d))) {
499 p4d_clear_bad(p4d);
500 return 1;
501 }
502 return 0;
503 }
504
505 static inline int pud_none_or_clear_bad(pud_t *pud)
506 {
507 if (pud_none(*pud))
508 return 1;
509 if (unlikely(pud_bad(*pud))) {
510 pud_clear_bad(pud);
511 return 1;
512 }
513 return 0;
514 }
515
516 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
517 {
518 if (pmd_none(*pmd))
519 return 1;
520 if (unlikely(pmd_bad(*pmd))) {
521 pmd_clear_bad(pmd);
522 return 1;
523 }
524 return 0;
525 }
526
527 static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,
528 unsigned long addr,
529 pte_t *ptep)
530 {
531 /*
532 * Get the current pte state, but zero it out to make it
533 * non-present, preventing the hardware from asynchronously
534 * updating it.
535 */
536 return ptep_get_and_clear(mm, addr, ptep);
537 }
538
539 static inline void __ptep_modify_prot_commit(struct mm_struct *mm,
540 unsigned long addr,
541 pte_t *ptep, pte_t pte)
542 {
543 /*
544 * The pte is non-present, so there's no hardware state to
545 * preserve.
546 */
547 set_pte_at(mm, addr, ptep, pte);
548 }
549
550 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
551 /*
552 * Start a pte protection read-modify-write transaction, which
553 * protects against asynchronous hardware modifications to the pte.
554 * The intention is not to prevent the hardware from making pte
555 * updates, but to prevent any updates it may make from being lost.
556 *
557 * This does not protect against other software modifications of the
558 * pte; the appropriate pte lock must be held over the transation.
559 *
560 * Note that this interface is intended to be batchable, meaning that
561 * ptep_modify_prot_commit may not actually update the pte, but merely
562 * queue the update to be done at some later time. The update must be
563 * actually committed before the pte lock is released, however.
564 */
565 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
566 unsigned long addr,
567 pte_t *ptep)
568 {
569 return __ptep_modify_prot_start(mm, addr, ptep);
570 }
571
572 /*
573 * Commit an update to a pte, leaving any hardware-controlled bits in
574 * the PTE unmodified.
575 */
576 static inline void ptep_modify_prot_commit(struct mm_struct *mm,
577 unsigned long addr,
578 pte_t *ptep, pte_t pte)
579 {
580 __ptep_modify_prot_commit(mm, addr, ptep, pte);
581 }
582 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
583 #endif /* CONFIG_MMU */
584
585 /*
586 * A facility to provide lazy MMU batching. This allows PTE updates and
587 * page invalidations to be delayed until a call to leave lazy MMU mode
588 * is issued. Some architectures may benefit from doing this, and it is
589 * beneficial for both shadow and direct mode hypervisors, which may batch
590 * the PTE updates which happen during this window. Note that using this
591 * interface requires that read hazards be removed from the code. A read
592 * hazard could result in the direct mode hypervisor case, since the actual
593 * write to the page tables may not yet have taken place, so reads though
594 * a raw PTE pointer after it has been modified are not guaranteed to be
595 * up to date. This mode can only be entered and left under the protection of
596 * the page table locks for all page tables which may be modified. In the UP
597 * case, this is required so that preemption is disabled, and in the SMP case,
598 * it must synchronize the delayed page table writes properly on other CPUs.
599 */
600 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
601 #define arch_enter_lazy_mmu_mode() do {} while (0)
602 #define arch_leave_lazy_mmu_mode() do {} while (0)
603 #define arch_flush_lazy_mmu_mode() do {} while (0)
604 #endif
605
606 /*
607 * A facility to provide batching of the reload of page tables and
608 * other process state with the actual context switch code for
609 * paravirtualized guests. By convention, only one of the batched
610 * update (lazy) modes (CPU, MMU) should be active at any given time,
611 * entry should never be nested, and entry and exits should always be
612 * paired. This is for sanity of maintaining and reasoning about the
613 * kernel code. In this case, the exit (end of the context switch) is
614 * in architecture-specific code, and so doesn't need a generic
615 * definition.
616 */
617 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
618 #define arch_start_context_switch(prev) do {} while (0)
619 #endif
620
621 #ifndef CONFIG_HAVE_ARCH_SOFT_DIRTY
622 static inline int pte_soft_dirty(pte_t pte)
623 {
624 return 0;
625 }
626
627 static inline int pmd_soft_dirty(pmd_t pmd)
628 {
629 return 0;
630 }
631
632 static inline pte_t pte_mksoft_dirty(pte_t pte)
633 {
634 return pte;
635 }
636
637 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
638 {
639 return pmd;
640 }
641
642 static inline pte_t pte_clear_soft_dirty(pte_t pte)
643 {
644 return pte;
645 }
646
647 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
648 {
649 return pmd;
650 }
651
652 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
653 {
654 return pte;
655 }
656
657 static inline int pte_swp_soft_dirty(pte_t pte)
658 {
659 return 0;
660 }
661
662 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
663 {
664 return pte;
665 }
666 #endif
667
668 #ifndef __HAVE_PFNMAP_TRACKING
669 /*
670 * Interfaces that can be used by architecture code to keep track of
671 * memory type of pfn mappings specified by the remap_pfn_range,
672 * vm_insert_pfn.
673 */
674
675 /*
676 * track_pfn_remap is called when a _new_ pfn mapping is being established
677 * by remap_pfn_range() for physical range indicated by pfn and size.
678 */
679 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
680 unsigned long pfn, unsigned long addr,
681 unsigned long size)
682 {
683 return 0;
684 }
685
686 /*
687 * track_pfn_insert is called when a _new_ single pfn is established
688 * by vm_insert_pfn().
689 */
690 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
691 pfn_t pfn)
692 {
693 }
694
695 /*
696 * track_pfn_copy is called when vma that is covering the pfnmap gets
697 * copied through copy_page_range().
698 */
699 static inline int track_pfn_copy(struct vm_area_struct *vma)
700 {
701 return 0;
702 }
703
704 /*
705 * untrack_pfn is called while unmapping a pfnmap for a region.
706 * untrack can be called for a specific region indicated by pfn and size or
707 * can be for the entire vma (in which case pfn, size are zero).
708 */
709 static inline void untrack_pfn(struct vm_area_struct *vma,
710 unsigned long pfn, unsigned long size)
711 {
712 }
713
714 /*
715 * untrack_pfn_moved is called while mremapping a pfnmap for a new region.
716 */
717 static inline void untrack_pfn_moved(struct vm_area_struct *vma)
718 {
719 }
720 #else
721 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
722 unsigned long pfn, unsigned long addr,
723 unsigned long size);
724 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
725 pfn_t pfn);
726 extern int track_pfn_copy(struct vm_area_struct *vma);
727 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
728 unsigned long size);
729 extern void untrack_pfn_moved(struct vm_area_struct *vma);
730 #endif
731
732 #ifdef __HAVE_COLOR_ZERO_PAGE
733 static inline int is_zero_pfn(unsigned long pfn)
734 {
735 extern unsigned long zero_pfn;
736 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
737 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
738 }
739
740 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
741
742 #else
743 static inline int is_zero_pfn(unsigned long pfn)
744 {
745 extern unsigned long zero_pfn;
746 return pfn == zero_pfn;
747 }
748
749 static inline unsigned long my_zero_pfn(unsigned long addr)
750 {
751 extern unsigned long zero_pfn;
752 return zero_pfn;
753 }
754 #endif
755
756 #ifdef CONFIG_MMU
757
758 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
759 static inline int pmd_trans_huge(pmd_t pmd)
760 {
761 return 0;
762 }
763 #ifndef __HAVE_ARCH_PMD_WRITE
764 static inline int pmd_write(pmd_t pmd)
765 {
766 BUG();
767 return 0;
768 }
769 #endif /* __HAVE_ARCH_PMD_WRITE */
770 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
771
772 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \
773 (defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
774 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD))
775 static inline int pud_trans_huge(pud_t pud)
776 {
777 return 0;
778 }
779 #endif
780
781 #ifndef pmd_read_atomic
782 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
783 {
784 /*
785 * Depend on compiler for an atomic pmd read. NOTE: this is
786 * only going to work, if the pmdval_t isn't larger than
787 * an unsigned long.
788 */
789 return *pmdp;
790 }
791 #endif
792
793 #ifndef arch_needs_pgtable_deposit
794 #define arch_needs_pgtable_deposit() (false)
795 #endif
796 /*
797 * This function is meant to be used by sites walking pagetables with
798 * the mmap_sem hold in read mode to protect against MADV_DONTNEED and
799 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
800 * into a null pmd and the transhuge page fault can convert a null pmd
801 * into an hugepmd or into a regular pmd (if the hugepage allocation
802 * fails). While holding the mmap_sem in read mode the pmd becomes
803 * stable and stops changing under us only if it's not null and not a
804 * transhuge pmd. When those races occurs and this function makes a
805 * difference vs the standard pmd_none_or_clear_bad, the result is
806 * undefined so behaving like if the pmd was none is safe (because it
807 * can return none anyway). The compiler level barrier() is critically
808 * important to compute the two checks atomically on the same pmdval.
809 *
810 * For 32bit kernels with a 64bit large pmd_t this automatically takes
811 * care of reading the pmd atomically to avoid SMP race conditions
812 * against pmd_populate() when the mmap_sem is hold for reading by the
813 * caller (a special atomic read not done by "gcc" as in the generic
814 * version above, is also needed when THP is disabled because the page
815 * fault can populate the pmd from under us).
816 */
817 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
818 {
819 pmd_t pmdval = pmd_read_atomic(pmd);
820 /*
821 * The barrier will stabilize the pmdval in a register or on
822 * the stack so that it will stop changing under the code.
823 *
824 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
825 * pmd_read_atomic is allowed to return a not atomic pmdval
826 * (for example pointing to an hugepage that has never been
827 * mapped in the pmd). The below checks will only care about
828 * the low part of the pmd with 32bit PAE x86 anyway, with the
829 * exception of pmd_none(). So the important thing is that if
830 * the low part of the pmd is found null, the high part will
831 * be also null or the pmd_none() check below would be
832 * confused.
833 */
834 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
835 barrier();
836 #endif
837 if (pmd_none(pmdval) || pmd_trans_huge(pmdval))
838 return 1;
839 if (unlikely(pmd_bad(pmdval))) {
840 pmd_clear_bad(pmd);
841 return 1;
842 }
843 return 0;
844 }
845
846 /*
847 * This is a noop if Transparent Hugepage Support is not built into
848 * the kernel. Otherwise it is equivalent to
849 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
850 * places that already verified the pmd is not none and they want to
851 * walk ptes while holding the mmap sem in read mode (write mode don't
852 * need this). If THP is not enabled, the pmd can't go away under the
853 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
854 * run a pmd_trans_unstable before walking the ptes after
855 * split_huge_page_pmd returns (because it may have run when the pmd
856 * become null, but then a page fault can map in a THP and not a
857 * regular page).
858 */
859 static inline int pmd_trans_unstable(pmd_t *pmd)
860 {
861 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
862 return pmd_none_or_trans_huge_or_clear_bad(pmd);
863 #else
864 return 0;
865 #endif
866 }
867
868 #ifndef CONFIG_NUMA_BALANCING
869 /*
870 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
871 * the only case the kernel cares is for NUMA balancing and is only ever set
872 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
873 * _PAGE_PROTNONE so by by default, implement the helper as "always no". It
874 * is the responsibility of the caller to distinguish between PROT_NONE
875 * protections and NUMA hinting fault protections.
876 */
877 static inline int pte_protnone(pte_t pte)
878 {
879 return 0;
880 }
881
882 static inline int pmd_protnone(pmd_t pmd)
883 {
884 return 0;
885 }
886 #endif /* CONFIG_NUMA_BALANCING */
887
888 #endif /* CONFIG_MMU */
889
890 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
891
892 #ifndef __PAGETABLE_P4D_FOLDED
893 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot);
894 int p4d_clear_huge(p4d_t *p4d);
895 #else
896 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
897 {
898 return 0;
899 }
900 static inline int p4d_clear_huge(p4d_t *p4d)
901 {
902 return 0;
903 }
904 #endif /* !__PAGETABLE_P4D_FOLDED */
905
906 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
907 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
908 int pud_clear_huge(pud_t *pud);
909 int pmd_clear_huge(pmd_t *pmd);
910 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
911 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
912 {
913 return 0;
914 }
915 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
916 {
917 return 0;
918 }
919 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
920 {
921 return 0;
922 }
923 static inline int p4d_clear_huge(p4d_t *p4d)
924 {
925 return 0;
926 }
927 static inline int pud_clear_huge(pud_t *pud)
928 {
929 return 0;
930 }
931 static inline int pmd_clear_huge(pmd_t *pmd)
932 {
933 return 0;
934 }
935 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
936
937 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
938 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
939 /*
940 * ARCHes with special requirements for evicting THP backing TLB entries can
941 * implement this. Otherwise also, it can help optimize normal TLB flush in
942 * THP regime. stock flush_tlb_range() typically has optimization to nuke the
943 * entire TLB TLB if flush span is greater than a threshold, which will
944 * likely be true for a single huge page. Thus a single thp flush will
945 * invalidate the entire TLB which is not desitable.
946 * e.g. see arch/arc: flush_pmd_tlb_range
947 */
948 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
949 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
950 #else
951 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
952 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
953 #endif
954 #endif
955
956 struct file;
957 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
958 unsigned long size, pgprot_t *vma_prot);
959
960 #ifndef CONFIG_X86_ESPFIX64
961 static inline void init_espfix_bsp(void) { }
962 #endif
963
964 #endif /* !__ASSEMBLY__ */
965
966 #ifndef io_remap_pfn_range
967 #define io_remap_pfn_range remap_pfn_range
968 #endif
969
970 #ifndef has_transparent_hugepage
971 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
972 #define has_transparent_hugepage() 1
973 #else
974 #define has_transparent_hugepage() 0
975 #endif
976 #endif
977
978 #endif /* _ASM_GENERIC_PGTABLE_H */