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1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_GENERIC_PGTABLE_H
3 #define _ASM_GENERIC_PGTABLE_H
4
5 #include <linux/pfn.h>
6
7 #ifndef __ASSEMBLY__
8 #ifdef CONFIG_MMU
9
10 #include <linux/mm_types.h>
11 #include <linux/bug.h>
12 #include <linux/errno.h>
13
14 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \
15 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS
16 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
17 #endif
18
19 /*
20 * On almost all architectures and configurations, 0 can be used as the
21 * upper ceiling to free_pgtables(): on many architectures it has the same
22 * effect as using TASK_SIZE. However, there is one configuration which
23 * must impose a more careful limit, to avoid freeing kernel pgtables.
24 */
25 #ifndef USER_PGTABLES_CEILING
26 #define USER_PGTABLES_CEILING 0UL
27 #endif
28
29 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
30 extern int ptep_set_access_flags(struct vm_area_struct *vma,
31 unsigned long address, pte_t *ptep,
32 pte_t entry, int dirty);
33 #endif
34
35 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
36 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
37 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
38 unsigned long address, pmd_t *pmdp,
39 pmd_t entry, int dirty);
40 extern int pudp_set_access_flags(struct vm_area_struct *vma,
41 unsigned long address, pud_t *pudp,
42 pud_t entry, int dirty);
43 #else
44 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
45 unsigned long address, pmd_t *pmdp,
46 pmd_t entry, int dirty)
47 {
48 BUILD_BUG();
49 return 0;
50 }
51 static inline int pudp_set_access_flags(struct vm_area_struct *vma,
52 unsigned long address, pud_t *pudp,
53 pud_t entry, int dirty)
54 {
55 BUILD_BUG();
56 return 0;
57 }
58 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
59 #endif
60
61 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
62 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
63 unsigned long address,
64 pte_t *ptep)
65 {
66 pte_t pte = *ptep;
67 int r = 1;
68 if (!pte_young(pte))
69 r = 0;
70 else
71 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
72 return r;
73 }
74 #endif
75
76 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
77 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
78 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
79 unsigned long address,
80 pmd_t *pmdp)
81 {
82 pmd_t pmd = *pmdp;
83 int r = 1;
84 if (!pmd_young(pmd))
85 r = 0;
86 else
87 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
88 return r;
89 }
90 #else
91 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
92 unsigned long address,
93 pmd_t *pmdp)
94 {
95 BUILD_BUG();
96 return 0;
97 }
98 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
99 #endif
100
101 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
102 int ptep_clear_flush_young(struct vm_area_struct *vma,
103 unsigned long address, pte_t *ptep);
104 #endif
105
106 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
107 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
108 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
109 unsigned long address, pmd_t *pmdp);
110 #else
111 /*
112 * Despite relevant to THP only, this API is called from generic rmap code
113 * under PageTransHuge(), hence needs a dummy implementation for !THP
114 */
115 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
116 unsigned long address, pmd_t *pmdp)
117 {
118 BUILD_BUG();
119 return 0;
120 }
121 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
122 #endif
123
124 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
125 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
126 unsigned long address,
127 pte_t *ptep)
128 {
129 pte_t pte = *ptep;
130 pte_clear(mm, address, ptep);
131 return pte;
132 }
133 #endif
134
135 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
136 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
137 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
138 unsigned long address,
139 pmd_t *pmdp)
140 {
141 pmd_t pmd = *pmdp;
142 pmd_clear(pmdp);
143 return pmd;
144 }
145 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */
146 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
147 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
148 unsigned long address,
149 pud_t *pudp)
150 {
151 pud_t pud = *pudp;
152
153 pud_clear(pudp);
154 return pud;
155 }
156 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */
157 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
158
159 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
160 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
161 static inline pmd_t pmdp_huge_get_and_clear_full(struct mm_struct *mm,
162 unsigned long address, pmd_t *pmdp,
163 int full)
164 {
165 return pmdp_huge_get_and_clear(mm, address, pmdp);
166 }
167 #endif
168
169 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
170 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm,
171 unsigned long address, pud_t *pudp,
172 int full)
173 {
174 return pudp_huge_get_and_clear(mm, address, pudp);
175 }
176 #endif
177 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
178
179 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
180 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
181 unsigned long address, pte_t *ptep,
182 int full)
183 {
184 pte_t pte;
185 pte = ptep_get_and_clear(mm, address, ptep);
186 return pte;
187 }
188 #endif
189
190 /*
191 * Some architectures may be able to avoid expensive synchronization
192 * primitives when modifications are made to PTE's which are already
193 * not present, or in the process of an address space destruction.
194 */
195 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
196 static inline void pte_clear_not_present_full(struct mm_struct *mm,
197 unsigned long address,
198 pte_t *ptep,
199 int full)
200 {
201 pte_clear(mm, address, ptep);
202 }
203 #endif
204
205 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
206 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
207 unsigned long address,
208 pte_t *ptep);
209 #endif
210
211 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
212 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
213 unsigned long address,
214 pmd_t *pmdp);
215 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma,
216 unsigned long address,
217 pud_t *pudp);
218 #endif
219
220 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
221 struct mm_struct;
222 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
223 {
224 pte_t old_pte = *ptep;
225 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
226 }
227 #endif
228
229 #ifndef pte_savedwrite
230 #define pte_savedwrite pte_write
231 #endif
232
233 #ifndef pte_mk_savedwrite
234 #define pte_mk_savedwrite pte_mkwrite
235 #endif
236
237 #ifndef pte_clear_savedwrite
238 #define pte_clear_savedwrite pte_wrprotect
239 #endif
240
241 #ifndef pmd_savedwrite
242 #define pmd_savedwrite pmd_write
243 #endif
244
245 #ifndef pmd_mk_savedwrite
246 #define pmd_mk_savedwrite pmd_mkwrite
247 #endif
248
249 #ifndef pmd_clear_savedwrite
250 #define pmd_clear_savedwrite pmd_wrprotect
251 #endif
252
253 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
254 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
255 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
256 unsigned long address, pmd_t *pmdp)
257 {
258 pmd_t old_pmd = *pmdp;
259 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
260 }
261 #else
262 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
263 unsigned long address, pmd_t *pmdp)
264 {
265 BUILD_BUG();
266 }
267 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
268 #endif
269 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT
270 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
271 static inline void pudp_set_wrprotect(struct mm_struct *mm,
272 unsigned long address, pud_t *pudp)
273 {
274 pud_t old_pud = *pudp;
275
276 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud));
277 }
278 #else
279 static inline void pudp_set_wrprotect(struct mm_struct *mm,
280 unsigned long address, pud_t *pudp)
281 {
282 BUILD_BUG();
283 }
284 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
285 #endif
286
287 #ifndef pmdp_collapse_flush
288 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
289 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
290 unsigned long address, pmd_t *pmdp);
291 #else
292 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
293 unsigned long address,
294 pmd_t *pmdp)
295 {
296 BUILD_BUG();
297 return *pmdp;
298 }
299 #define pmdp_collapse_flush pmdp_collapse_flush
300 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
301 #endif
302
303 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
304 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
305 pgtable_t pgtable);
306 #endif
307
308 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
309 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
310 #endif
311
312 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
313 extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
314 pmd_t *pmdp);
315 #endif
316
317 #ifndef __HAVE_ARCH_PMDP_HUGE_SPLIT_PREPARE
318 static inline void pmdp_huge_split_prepare(struct vm_area_struct *vma,
319 unsigned long address, pmd_t *pmdp)
320 {
321
322 }
323 #endif
324
325 #ifndef __HAVE_ARCH_PTE_SAME
326 static inline int pte_same(pte_t pte_a, pte_t pte_b)
327 {
328 return pte_val(pte_a) == pte_val(pte_b);
329 }
330 #endif
331
332 #ifndef __HAVE_ARCH_PTE_UNUSED
333 /*
334 * Some architectures provide facilities to virtualization guests
335 * so that they can flag allocated pages as unused. This allows the
336 * host to transparently reclaim unused pages. This function returns
337 * whether the pte's page is unused.
338 */
339 static inline int pte_unused(pte_t pte)
340 {
341 return 0;
342 }
343 #endif
344
345 #ifndef pte_access_permitted
346 #define pte_access_permitted(pte, write) \
347 (pte_present(pte) && (!(write) || pte_write(pte)))
348 #endif
349
350 #ifndef pmd_access_permitted
351 #define pmd_access_permitted(pmd, write) \
352 (pmd_present(pmd) && (!(write) || pmd_write(pmd)))
353 #endif
354
355 #ifndef pud_access_permitted
356 #define pud_access_permitted(pud, write) \
357 (pud_present(pud) && (!(write) || pud_write(pud)))
358 #endif
359
360 #ifndef p4d_access_permitted
361 #define p4d_access_permitted(p4d, write) \
362 (p4d_present(p4d) && (!(write) || p4d_write(p4d)))
363 #endif
364
365 #ifndef pgd_access_permitted
366 #define pgd_access_permitted(pgd, write) \
367 (pgd_present(pgd) && (!(write) || pgd_write(pgd)))
368 #endif
369
370 #ifndef __HAVE_ARCH_PMD_SAME
371 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
372 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
373 {
374 return pmd_val(pmd_a) == pmd_val(pmd_b);
375 }
376
377 static inline int pud_same(pud_t pud_a, pud_t pud_b)
378 {
379 return pud_val(pud_a) == pud_val(pud_b);
380 }
381 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
382 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
383 {
384 BUILD_BUG();
385 return 0;
386 }
387
388 static inline int pud_same(pud_t pud_a, pud_t pud_b)
389 {
390 BUILD_BUG();
391 return 0;
392 }
393 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
394 #endif
395
396 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
397 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
398 #endif
399
400 #ifndef __HAVE_ARCH_MOVE_PTE
401 #define move_pte(pte, prot, old_addr, new_addr) (pte)
402 #endif
403
404 #ifndef pte_accessible
405 # define pte_accessible(mm, pte) ((void)(pte), 1)
406 #endif
407
408 #ifndef flush_tlb_fix_spurious_fault
409 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
410 #endif
411
412 #ifndef pgprot_noncached
413 #define pgprot_noncached(prot) (prot)
414 #endif
415
416 #ifndef pgprot_writecombine
417 #define pgprot_writecombine pgprot_noncached
418 #endif
419
420 #ifndef pgprot_writethrough
421 #define pgprot_writethrough pgprot_noncached
422 #endif
423
424 #ifndef pgprot_device
425 #define pgprot_device pgprot_noncached
426 #endif
427
428 #ifndef pgprot_modify
429 #define pgprot_modify pgprot_modify
430 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
431 {
432 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
433 newprot = pgprot_noncached(newprot);
434 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
435 newprot = pgprot_writecombine(newprot);
436 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
437 newprot = pgprot_device(newprot);
438 return newprot;
439 }
440 #endif
441
442 /*
443 * When walking page tables, get the address of the next boundary,
444 * or the end address of the range if that comes earlier. Although no
445 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
446 */
447
448 #define pgd_addr_end(addr, end) \
449 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
450 (__boundary - 1 < (end) - 1)? __boundary: (end); \
451 })
452
453 #ifndef p4d_addr_end
454 #define p4d_addr_end(addr, end) \
455 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \
456 (__boundary - 1 < (end) - 1)? __boundary: (end); \
457 })
458 #endif
459
460 #ifndef pud_addr_end
461 #define pud_addr_end(addr, end) \
462 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
463 (__boundary - 1 < (end) - 1)? __boundary: (end); \
464 })
465 #endif
466
467 #ifndef pmd_addr_end
468 #define pmd_addr_end(addr, end) \
469 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
470 (__boundary - 1 < (end) - 1)? __boundary: (end); \
471 })
472 #endif
473
474 /*
475 * When walking page tables, we usually want to skip any p?d_none entries;
476 * and any p?d_bad entries - reporting the error before resetting to none.
477 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
478 */
479 void pgd_clear_bad(pgd_t *);
480 void p4d_clear_bad(p4d_t *);
481 void pud_clear_bad(pud_t *);
482 void pmd_clear_bad(pmd_t *);
483
484 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
485 {
486 if (pgd_none(*pgd))
487 return 1;
488 if (unlikely(pgd_bad(*pgd))) {
489 pgd_clear_bad(pgd);
490 return 1;
491 }
492 return 0;
493 }
494
495 static inline int p4d_none_or_clear_bad(p4d_t *p4d)
496 {
497 if (p4d_none(*p4d))
498 return 1;
499 if (unlikely(p4d_bad(*p4d))) {
500 p4d_clear_bad(p4d);
501 return 1;
502 }
503 return 0;
504 }
505
506 static inline int pud_none_or_clear_bad(pud_t *pud)
507 {
508 if (pud_none(*pud))
509 return 1;
510 if (unlikely(pud_bad(*pud))) {
511 pud_clear_bad(pud);
512 return 1;
513 }
514 return 0;
515 }
516
517 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
518 {
519 if (pmd_none(*pmd))
520 return 1;
521 if (unlikely(pmd_bad(*pmd))) {
522 pmd_clear_bad(pmd);
523 return 1;
524 }
525 return 0;
526 }
527
528 static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,
529 unsigned long addr,
530 pte_t *ptep)
531 {
532 /*
533 * Get the current pte state, but zero it out to make it
534 * non-present, preventing the hardware from asynchronously
535 * updating it.
536 */
537 return ptep_get_and_clear(mm, addr, ptep);
538 }
539
540 static inline void __ptep_modify_prot_commit(struct mm_struct *mm,
541 unsigned long addr,
542 pte_t *ptep, pte_t pte)
543 {
544 /*
545 * The pte is non-present, so there's no hardware state to
546 * preserve.
547 */
548 set_pte_at(mm, addr, ptep, pte);
549 }
550
551 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
552 /*
553 * Start a pte protection read-modify-write transaction, which
554 * protects against asynchronous hardware modifications to the pte.
555 * The intention is not to prevent the hardware from making pte
556 * updates, but to prevent any updates it may make from being lost.
557 *
558 * This does not protect against other software modifications of the
559 * pte; the appropriate pte lock must be held over the transation.
560 *
561 * Note that this interface is intended to be batchable, meaning that
562 * ptep_modify_prot_commit may not actually update the pte, but merely
563 * queue the update to be done at some later time. The update must be
564 * actually committed before the pte lock is released, however.
565 */
566 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
567 unsigned long addr,
568 pte_t *ptep)
569 {
570 return __ptep_modify_prot_start(mm, addr, ptep);
571 }
572
573 /*
574 * Commit an update to a pte, leaving any hardware-controlled bits in
575 * the PTE unmodified.
576 */
577 static inline void ptep_modify_prot_commit(struct mm_struct *mm,
578 unsigned long addr,
579 pte_t *ptep, pte_t pte)
580 {
581 __ptep_modify_prot_commit(mm, addr, ptep, pte);
582 }
583 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
584 #endif /* CONFIG_MMU */
585
586 /*
587 * No-op macros that just return the current protection value. Defined here
588 * because these macros can be used used even if CONFIG_MMU is not defined.
589 */
590 #ifndef pgprot_encrypted
591 #define pgprot_encrypted(prot) (prot)
592 #endif
593
594 #ifndef pgprot_decrypted
595 #define pgprot_decrypted(prot) (prot)
596 #endif
597
598 /*
599 * A facility to provide lazy MMU batching. This allows PTE updates and
600 * page invalidations to be delayed until a call to leave lazy MMU mode
601 * is issued. Some architectures may benefit from doing this, and it is
602 * beneficial for both shadow and direct mode hypervisors, which may batch
603 * the PTE updates which happen during this window. Note that using this
604 * interface requires that read hazards be removed from the code. A read
605 * hazard could result in the direct mode hypervisor case, since the actual
606 * write to the page tables may not yet have taken place, so reads though
607 * a raw PTE pointer after it has been modified are not guaranteed to be
608 * up to date. This mode can only be entered and left under the protection of
609 * the page table locks for all page tables which may be modified. In the UP
610 * case, this is required so that preemption is disabled, and in the SMP case,
611 * it must synchronize the delayed page table writes properly on other CPUs.
612 */
613 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
614 #define arch_enter_lazy_mmu_mode() do {} while (0)
615 #define arch_leave_lazy_mmu_mode() do {} while (0)
616 #define arch_flush_lazy_mmu_mode() do {} while (0)
617 #endif
618
619 /*
620 * A facility to provide batching of the reload of page tables and
621 * other process state with the actual context switch code for
622 * paravirtualized guests. By convention, only one of the batched
623 * update (lazy) modes (CPU, MMU) should be active at any given time,
624 * entry should never be nested, and entry and exits should always be
625 * paired. This is for sanity of maintaining and reasoning about the
626 * kernel code. In this case, the exit (end of the context switch) is
627 * in architecture-specific code, and so doesn't need a generic
628 * definition.
629 */
630 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
631 #define arch_start_context_switch(prev) do {} while (0)
632 #endif
633
634 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
635 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION
636 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
637 {
638 return pmd;
639 }
640
641 static inline int pmd_swp_soft_dirty(pmd_t pmd)
642 {
643 return 0;
644 }
645
646 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
647 {
648 return pmd;
649 }
650 #endif
651 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */
652 static inline int pte_soft_dirty(pte_t pte)
653 {
654 return 0;
655 }
656
657 static inline int pmd_soft_dirty(pmd_t pmd)
658 {
659 return 0;
660 }
661
662 static inline pte_t pte_mksoft_dirty(pte_t pte)
663 {
664 return pte;
665 }
666
667 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
668 {
669 return pmd;
670 }
671
672 static inline pte_t pte_clear_soft_dirty(pte_t pte)
673 {
674 return pte;
675 }
676
677 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
678 {
679 return pmd;
680 }
681
682 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
683 {
684 return pte;
685 }
686
687 static inline int pte_swp_soft_dirty(pte_t pte)
688 {
689 return 0;
690 }
691
692 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
693 {
694 return pte;
695 }
696
697 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
698 {
699 return pmd;
700 }
701
702 static inline int pmd_swp_soft_dirty(pmd_t pmd)
703 {
704 return 0;
705 }
706
707 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
708 {
709 return pmd;
710 }
711 #endif
712
713 #ifndef __HAVE_PFNMAP_TRACKING
714 /*
715 * Interfaces that can be used by architecture code to keep track of
716 * memory type of pfn mappings specified by the remap_pfn_range,
717 * vm_insert_pfn.
718 */
719
720 /*
721 * track_pfn_remap is called when a _new_ pfn mapping is being established
722 * by remap_pfn_range() for physical range indicated by pfn and size.
723 */
724 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
725 unsigned long pfn, unsigned long addr,
726 unsigned long size)
727 {
728 return 0;
729 }
730
731 /*
732 * track_pfn_insert is called when a _new_ single pfn is established
733 * by vm_insert_pfn().
734 */
735 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
736 pfn_t pfn)
737 {
738 }
739
740 /*
741 * track_pfn_copy is called when vma that is covering the pfnmap gets
742 * copied through copy_page_range().
743 */
744 static inline int track_pfn_copy(struct vm_area_struct *vma)
745 {
746 return 0;
747 }
748
749 /*
750 * untrack_pfn is called while unmapping a pfnmap for a region.
751 * untrack can be called for a specific region indicated by pfn and size or
752 * can be for the entire vma (in which case pfn, size are zero).
753 */
754 static inline void untrack_pfn(struct vm_area_struct *vma,
755 unsigned long pfn, unsigned long size)
756 {
757 }
758
759 /*
760 * untrack_pfn_moved is called while mremapping a pfnmap for a new region.
761 */
762 static inline void untrack_pfn_moved(struct vm_area_struct *vma)
763 {
764 }
765 #else
766 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
767 unsigned long pfn, unsigned long addr,
768 unsigned long size);
769 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
770 pfn_t pfn);
771 extern int track_pfn_copy(struct vm_area_struct *vma);
772 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
773 unsigned long size);
774 extern void untrack_pfn_moved(struct vm_area_struct *vma);
775 #endif
776
777 #ifdef __HAVE_COLOR_ZERO_PAGE
778 static inline int is_zero_pfn(unsigned long pfn)
779 {
780 extern unsigned long zero_pfn;
781 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
782 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
783 }
784
785 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
786
787 #else
788 static inline int is_zero_pfn(unsigned long pfn)
789 {
790 extern unsigned long zero_pfn;
791 return pfn == zero_pfn;
792 }
793
794 static inline unsigned long my_zero_pfn(unsigned long addr)
795 {
796 extern unsigned long zero_pfn;
797 return zero_pfn;
798 }
799 #endif
800
801 #ifdef CONFIG_MMU
802
803 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
804 static inline int pmd_trans_huge(pmd_t pmd)
805 {
806 return 0;
807 }
808 #ifndef pmd_write
809 static inline int pmd_write(pmd_t pmd)
810 {
811 BUG();
812 return 0;
813 }
814 #endif /* pmd_write */
815 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
816
817 #ifndef pud_write
818 static inline int pud_write(pud_t pud)
819 {
820 BUG();
821 return 0;
822 }
823 #endif /* pud_write */
824
825 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \
826 (defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
827 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD))
828 static inline int pud_trans_huge(pud_t pud)
829 {
830 return 0;
831 }
832 #endif
833
834 #ifndef pmd_read_atomic
835 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
836 {
837 /*
838 * Depend on compiler for an atomic pmd read. NOTE: this is
839 * only going to work, if the pmdval_t isn't larger than
840 * an unsigned long.
841 */
842 return *pmdp;
843 }
844 #endif
845
846 #ifndef arch_needs_pgtable_deposit
847 #define arch_needs_pgtable_deposit() (false)
848 #endif
849 /*
850 * This function is meant to be used by sites walking pagetables with
851 * the mmap_sem hold in read mode to protect against MADV_DONTNEED and
852 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
853 * into a null pmd and the transhuge page fault can convert a null pmd
854 * into an hugepmd or into a regular pmd (if the hugepage allocation
855 * fails). While holding the mmap_sem in read mode the pmd becomes
856 * stable and stops changing under us only if it's not null and not a
857 * transhuge pmd. When those races occurs and this function makes a
858 * difference vs the standard pmd_none_or_clear_bad, the result is
859 * undefined so behaving like if the pmd was none is safe (because it
860 * can return none anyway). The compiler level barrier() is critically
861 * important to compute the two checks atomically on the same pmdval.
862 *
863 * For 32bit kernels with a 64bit large pmd_t this automatically takes
864 * care of reading the pmd atomically to avoid SMP race conditions
865 * against pmd_populate() when the mmap_sem is hold for reading by the
866 * caller (a special atomic read not done by "gcc" as in the generic
867 * version above, is also needed when THP is disabled because the page
868 * fault can populate the pmd from under us).
869 */
870 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
871 {
872 pmd_t pmdval = pmd_read_atomic(pmd);
873 /*
874 * The barrier will stabilize the pmdval in a register or on
875 * the stack so that it will stop changing under the code.
876 *
877 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
878 * pmd_read_atomic is allowed to return a not atomic pmdval
879 * (for example pointing to an hugepage that has never been
880 * mapped in the pmd). The below checks will only care about
881 * the low part of the pmd with 32bit PAE x86 anyway, with the
882 * exception of pmd_none(). So the important thing is that if
883 * the low part of the pmd is found null, the high part will
884 * be also null or the pmd_none() check below would be
885 * confused.
886 */
887 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
888 barrier();
889 #endif
890 /*
891 * !pmd_present() checks for pmd migration entries
892 *
893 * The complete check uses is_pmd_migration_entry() in linux/swapops.h
894 * But using that requires moving current function and pmd_trans_unstable()
895 * to linux/swapops.h to resovle dependency, which is too much code move.
896 *
897 * !pmd_present() is equivalent to is_pmd_migration_entry() currently,
898 * because !pmd_present() pages can only be under migration not swapped
899 * out.
900 *
901 * pmd_none() is preseved for future condition checks on pmd migration
902 * entries and not confusing with this function name, although it is
903 * redundant with !pmd_present().
904 */
905 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) ||
906 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval)))
907 return 1;
908 if (unlikely(pmd_bad(pmdval))) {
909 pmd_clear_bad(pmd);
910 return 1;
911 }
912 return 0;
913 }
914
915 /*
916 * This is a noop if Transparent Hugepage Support is not built into
917 * the kernel. Otherwise it is equivalent to
918 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
919 * places that already verified the pmd is not none and they want to
920 * walk ptes while holding the mmap sem in read mode (write mode don't
921 * need this). If THP is not enabled, the pmd can't go away under the
922 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
923 * run a pmd_trans_unstable before walking the ptes after
924 * split_huge_page_pmd returns (because it may have run when the pmd
925 * become null, but then a page fault can map in a THP and not a
926 * regular page).
927 */
928 static inline int pmd_trans_unstable(pmd_t *pmd)
929 {
930 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
931 return pmd_none_or_trans_huge_or_clear_bad(pmd);
932 #else
933 return 0;
934 #endif
935 }
936
937 #ifndef CONFIG_NUMA_BALANCING
938 /*
939 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
940 * the only case the kernel cares is for NUMA balancing and is only ever set
941 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
942 * _PAGE_PROTNONE so by by default, implement the helper as "always no". It
943 * is the responsibility of the caller to distinguish between PROT_NONE
944 * protections and NUMA hinting fault protections.
945 */
946 static inline int pte_protnone(pte_t pte)
947 {
948 return 0;
949 }
950
951 static inline int pmd_protnone(pmd_t pmd)
952 {
953 return 0;
954 }
955 #endif /* CONFIG_NUMA_BALANCING */
956
957 #endif /* CONFIG_MMU */
958
959 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
960
961 #ifndef __PAGETABLE_P4D_FOLDED
962 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot);
963 int p4d_clear_huge(p4d_t *p4d);
964 #else
965 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
966 {
967 return 0;
968 }
969 static inline int p4d_clear_huge(p4d_t *p4d)
970 {
971 return 0;
972 }
973 #endif /* !__PAGETABLE_P4D_FOLDED */
974
975 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
976 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
977 int pud_clear_huge(pud_t *pud);
978 int pmd_clear_huge(pmd_t *pmd);
979 int pud_free_pmd_page(pud_t *pud);
980 int pmd_free_pte_page(pmd_t *pmd);
981 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
982 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
983 {
984 return 0;
985 }
986 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
987 {
988 return 0;
989 }
990 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
991 {
992 return 0;
993 }
994 static inline int p4d_clear_huge(p4d_t *p4d)
995 {
996 return 0;
997 }
998 static inline int pud_clear_huge(pud_t *pud)
999 {
1000 return 0;
1001 }
1002 static inline int pmd_clear_huge(pmd_t *pmd)
1003 {
1004 return 0;
1005 }
1006 static inline int pud_free_pmd_page(pud_t *pud)
1007 {
1008 return 0;
1009 }
1010 static inline int pmd_free_pte_page(pmd_t *pmd)
1011 {
1012 return 0;
1013 }
1014 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
1015
1016 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
1017 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1018 /*
1019 * ARCHes with special requirements for evicting THP backing TLB entries can
1020 * implement this. Otherwise also, it can help optimize normal TLB flush in
1021 * THP regime. stock flush_tlb_range() typically has optimization to nuke the
1022 * entire TLB TLB if flush span is greater than a threshold, which will
1023 * likely be true for a single huge page. Thus a single thp flush will
1024 * invalidate the entire TLB which is not desitable.
1025 * e.g. see arch/arc: flush_pmd_tlb_range
1026 */
1027 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1028 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1029 #else
1030 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
1031 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
1032 #endif
1033 #endif
1034
1035 struct file;
1036 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
1037 unsigned long size, pgprot_t *vma_prot);
1038
1039 #ifndef CONFIG_X86_ESPFIX64
1040 static inline void init_espfix_bsp(void) { }
1041 #endif
1042
1043 #endif /* !__ASSEMBLY__ */
1044
1045 #ifndef io_remap_pfn_range
1046 #define io_remap_pfn_range remap_pfn_range
1047 #endif
1048
1049 #ifndef has_transparent_hugepage
1050 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1051 #define has_transparent_hugepage() 1
1052 #else
1053 #define has_transparent_hugepage() 0
1054 #endif
1055 #endif
1056
1057 #endif /* _ASM_GENERIC_PGTABLE_H */