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1 #ifndef _ASM_GENERIC_PGTABLE_H
2 #define _ASM_GENERIC_PGTABLE_H
3
4 #include <linux/pfn.h>
5
6 #ifndef __ASSEMBLY__
7 #ifdef CONFIG_MMU
8
9 #include <linux/mm_types.h>
10 #include <linux/bug.h>
11 #include <linux/errno.h>
12
13 #if 4 - defined(__PAGETABLE_PUD_FOLDED) - defined(__PAGETABLE_PMD_FOLDED) != \
14 CONFIG_PGTABLE_LEVELS
15 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{PUD,PMD}_FOLDED
16 #endif
17
18 /*
19 * On almost all architectures and configurations, 0 can be used as the
20 * upper ceiling to free_pgtables(): on many architectures it has the same
21 * effect as using TASK_SIZE. However, there is one configuration which
22 * must impose a more careful limit, to avoid freeing kernel pgtables.
23 */
24 #ifndef USER_PGTABLES_CEILING
25 #define USER_PGTABLES_CEILING 0UL
26 #endif
27
28 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
29 extern int ptep_set_access_flags(struct vm_area_struct *vma,
30 unsigned long address, pte_t *ptep,
31 pte_t entry, int dirty);
32 #endif
33
34 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
35 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
36 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
37 unsigned long address, pmd_t *pmdp,
38 pmd_t entry, int dirty);
39 extern int pudp_set_access_flags(struct vm_area_struct *vma,
40 unsigned long address, pud_t *pudp,
41 pud_t entry, int dirty);
42 #else
43 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
44 unsigned long address, pmd_t *pmdp,
45 pmd_t entry, int dirty)
46 {
47 BUILD_BUG();
48 return 0;
49 }
50 static inline int pudp_set_access_flags(struct vm_area_struct *vma,
51 unsigned long address, pud_t *pudp,
52 pud_t entry, int dirty)
53 {
54 BUILD_BUG();
55 return 0;
56 }
57 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
58 #endif
59
60 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
61 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
62 unsigned long address,
63 pte_t *ptep)
64 {
65 pte_t pte = *ptep;
66 int r = 1;
67 if (!pte_young(pte))
68 r = 0;
69 else
70 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
71 return r;
72 }
73 #endif
74
75 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
76 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
77 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
78 unsigned long address,
79 pmd_t *pmdp)
80 {
81 pmd_t pmd = *pmdp;
82 int r = 1;
83 if (!pmd_young(pmd))
84 r = 0;
85 else
86 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
87 return r;
88 }
89 #else
90 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
91 unsigned long address,
92 pmd_t *pmdp)
93 {
94 BUILD_BUG();
95 return 0;
96 }
97 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
98 #endif
99
100 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
101 int ptep_clear_flush_young(struct vm_area_struct *vma,
102 unsigned long address, pte_t *ptep);
103 #endif
104
105 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
106 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
107 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
108 unsigned long address, pmd_t *pmdp);
109 #else
110 /*
111 * Despite relevant to THP only, this API is called from generic rmap code
112 * under PageTransHuge(), hence needs a dummy implementation for !THP
113 */
114 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
115 unsigned long address, pmd_t *pmdp)
116 {
117 BUILD_BUG();
118 return 0;
119 }
120 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
121 #endif
122
123 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
124 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
125 unsigned long address,
126 pte_t *ptep)
127 {
128 pte_t pte = *ptep;
129 pte_clear(mm, address, ptep);
130 return pte;
131 }
132 #endif
133
134 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
135 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
136 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
137 unsigned long address,
138 pmd_t *pmdp)
139 {
140 pmd_t pmd = *pmdp;
141 pmd_clear(pmdp);
142 return pmd;
143 }
144 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */
145 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
146 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
147 unsigned long address,
148 pud_t *pudp)
149 {
150 pud_t pud = *pudp;
151
152 pud_clear(pudp);
153 return pud;
154 }
155 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */
156 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
157
158 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
159 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
160 static inline pmd_t pmdp_huge_get_and_clear_full(struct mm_struct *mm,
161 unsigned long address, pmd_t *pmdp,
162 int full)
163 {
164 return pmdp_huge_get_and_clear(mm, address, pmdp);
165 }
166 #endif
167
168 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
169 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm,
170 unsigned long address, pud_t *pudp,
171 int full)
172 {
173 return pudp_huge_get_and_clear(mm, address, pudp);
174 }
175 #endif
176 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
177
178 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
179 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
180 unsigned long address, pte_t *ptep,
181 int full)
182 {
183 pte_t pte;
184 pte = ptep_get_and_clear(mm, address, ptep);
185 return pte;
186 }
187 #endif
188
189 /*
190 * Some architectures may be able to avoid expensive synchronization
191 * primitives when modifications are made to PTE's which are already
192 * not present, or in the process of an address space destruction.
193 */
194 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
195 static inline void pte_clear_not_present_full(struct mm_struct *mm,
196 unsigned long address,
197 pte_t *ptep,
198 int full)
199 {
200 pte_clear(mm, address, ptep);
201 }
202 #endif
203
204 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
205 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
206 unsigned long address,
207 pte_t *ptep);
208 #endif
209
210 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
211 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
212 unsigned long address,
213 pmd_t *pmdp);
214 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma,
215 unsigned long address,
216 pud_t *pudp);
217 #endif
218
219 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
220 struct mm_struct;
221 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
222 {
223 pte_t old_pte = *ptep;
224 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
225 }
226 #endif
227
228 #ifndef pte_savedwrite
229 #define pte_savedwrite pte_write
230 #endif
231
232 #ifndef pte_mk_savedwrite
233 #define pte_mk_savedwrite pte_mkwrite
234 #endif
235
236 #ifndef pte_clear_savedwrite
237 #define pte_clear_savedwrite pte_wrprotect
238 #endif
239
240 #ifndef pmd_savedwrite
241 #define pmd_savedwrite pmd_write
242 #endif
243
244 #ifndef pmd_mk_savedwrite
245 #define pmd_mk_savedwrite pmd_mkwrite
246 #endif
247
248 #ifndef pmd_clear_savedwrite
249 #define pmd_clear_savedwrite pmd_wrprotect
250 #endif
251
252 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
253 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
254 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
255 unsigned long address, pmd_t *pmdp)
256 {
257 pmd_t old_pmd = *pmdp;
258 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
259 }
260 #else
261 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
262 unsigned long address, pmd_t *pmdp)
263 {
264 BUILD_BUG();
265 }
266 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
267 #endif
268 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT
269 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
270 static inline void pudp_set_wrprotect(struct mm_struct *mm,
271 unsigned long address, pud_t *pudp)
272 {
273 pud_t old_pud = *pudp;
274
275 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud));
276 }
277 #else
278 static inline void pudp_set_wrprotect(struct mm_struct *mm,
279 unsigned long address, pud_t *pudp)
280 {
281 BUILD_BUG();
282 }
283 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
284 #endif
285
286 #ifndef pmdp_collapse_flush
287 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
288 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
289 unsigned long address, pmd_t *pmdp);
290 #else
291 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
292 unsigned long address,
293 pmd_t *pmdp)
294 {
295 BUILD_BUG();
296 return *pmdp;
297 }
298 #define pmdp_collapse_flush pmdp_collapse_flush
299 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
300 #endif
301
302 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
303 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
304 pgtable_t pgtable);
305 #endif
306
307 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
308 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
309 #endif
310
311 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
312 extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
313 pmd_t *pmdp);
314 #endif
315
316 #ifndef __HAVE_ARCH_PMDP_HUGE_SPLIT_PREPARE
317 static inline void pmdp_huge_split_prepare(struct vm_area_struct *vma,
318 unsigned long address, pmd_t *pmdp)
319 {
320
321 }
322 #endif
323
324 #ifndef __HAVE_ARCH_PTE_SAME
325 static inline int pte_same(pte_t pte_a, pte_t pte_b)
326 {
327 return pte_val(pte_a) == pte_val(pte_b);
328 }
329 #endif
330
331 #ifndef __HAVE_ARCH_PTE_UNUSED
332 /*
333 * Some architectures provide facilities to virtualization guests
334 * so that they can flag allocated pages as unused. This allows the
335 * host to transparently reclaim unused pages. This function returns
336 * whether the pte's page is unused.
337 */
338 static inline int pte_unused(pte_t pte)
339 {
340 return 0;
341 }
342 #endif
343
344 #ifndef __HAVE_ARCH_PMD_SAME
345 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
346 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
347 {
348 return pmd_val(pmd_a) == pmd_val(pmd_b);
349 }
350
351 static inline int pud_same(pud_t pud_a, pud_t pud_b)
352 {
353 return pud_val(pud_a) == pud_val(pud_b);
354 }
355 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
356 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
357 {
358 BUILD_BUG();
359 return 0;
360 }
361
362 static inline int pud_same(pud_t pud_a, pud_t pud_b)
363 {
364 BUILD_BUG();
365 return 0;
366 }
367 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
368 #endif
369
370 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
371 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
372 #endif
373
374 #ifndef __HAVE_ARCH_MOVE_PTE
375 #define move_pte(pte, prot, old_addr, new_addr) (pte)
376 #endif
377
378 #ifndef pte_accessible
379 # define pte_accessible(mm, pte) ((void)(pte), 1)
380 #endif
381
382 #ifndef flush_tlb_fix_spurious_fault
383 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
384 #endif
385
386 #ifndef pgprot_noncached
387 #define pgprot_noncached(prot) (prot)
388 #endif
389
390 #ifndef pgprot_writecombine
391 #define pgprot_writecombine pgprot_noncached
392 #endif
393
394 #ifndef pgprot_writethrough
395 #define pgprot_writethrough pgprot_noncached
396 #endif
397
398 #ifndef pgprot_device
399 #define pgprot_device pgprot_noncached
400 #endif
401
402 #ifndef pgprot_modify
403 #define pgprot_modify pgprot_modify
404 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
405 {
406 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
407 newprot = pgprot_noncached(newprot);
408 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
409 newprot = pgprot_writecombine(newprot);
410 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
411 newprot = pgprot_device(newprot);
412 return newprot;
413 }
414 #endif
415
416 /*
417 * When walking page tables, get the address of the next boundary,
418 * or the end address of the range if that comes earlier. Although no
419 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
420 */
421
422 #define pgd_addr_end(addr, end) \
423 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
424 (__boundary - 1 < (end) - 1)? __boundary: (end); \
425 })
426
427 #ifndef pud_addr_end
428 #define pud_addr_end(addr, end) \
429 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
430 (__boundary - 1 < (end) - 1)? __boundary: (end); \
431 })
432 #endif
433
434 #ifndef pmd_addr_end
435 #define pmd_addr_end(addr, end) \
436 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
437 (__boundary - 1 < (end) - 1)? __boundary: (end); \
438 })
439 #endif
440
441 /*
442 * When walking page tables, we usually want to skip any p?d_none entries;
443 * and any p?d_bad entries - reporting the error before resetting to none.
444 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
445 */
446 void pgd_clear_bad(pgd_t *);
447 void pud_clear_bad(pud_t *);
448 void pmd_clear_bad(pmd_t *);
449
450 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
451 {
452 if (pgd_none(*pgd))
453 return 1;
454 if (unlikely(pgd_bad(*pgd))) {
455 pgd_clear_bad(pgd);
456 return 1;
457 }
458 return 0;
459 }
460
461 static inline int pud_none_or_clear_bad(pud_t *pud)
462 {
463 if (pud_none(*pud))
464 return 1;
465 if (unlikely(pud_bad(*pud))) {
466 pud_clear_bad(pud);
467 return 1;
468 }
469 return 0;
470 }
471
472 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
473 {
474 if (pmd_none(*pmd))
475 return 1;
476 if (unlikely(pmd_bad(*pmd))) {
477 pmd_clear_bad(pmd);
478 return 1;
479 }
480 return 0;
481 }
482
483 static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,
484 unsigned long addr,
485 pte_t *ptep)
486 {
487 /*
488 * Get the current pte state, but zero it out to make it
489 * non-present, preventing the hardware from asynchronously
490 * updating it.
491 */
492 return ptep_get_and_clear(mm, addr, ptep);
493 }
494
495 static inline void __ptep_modify_prot_commit(struct mm_struct *mm,
496 unsigned long addr,
497 pte_t *ptep, pte_t pte)
498 {
499 /*
500 * The pte is non-present, so there's no hardware state to
501 * preserve.
502 */
503 set_pte_at(mm, addr, ptep, pte);
504 }
505
506 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
507 /*
508 * Start a pte protection read-modify-write transaction, which
509 * protects against asynchronous hardware modifications to the pte.
510 * The intention is not to prevent the hardware from making pte
511 * updates, but to prevent any updates it may make from being lost.
512 *
513 * This does not protect against other software modifications of the
514 * pte; the appropriate pte lock must be held over the transation.
515 *
516 * Note that this interface is intended to be batchable, meaning that
517 * ptep_modify_prot_commit may not actually update the pte, but merely
518 * queue the update to be done at some later time. The update must be
519 * actually committed before the pte lock is released, however.
520 */
521 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
522 unsigned long addr,
523 pte_t *ptep)
524 {
525 return __ptep_modify_prot_start(mm, addr, ptep);
526 }
527
528 /*
529 * Commit an update to a pte, leaving any hardware-controlled bits in
530 * the PTE unmodified.
531 */
532 static inline void ptep_modify_prot_commit(struct mm_struct *mm,
533 unsigned long addr,
534 pte_t *ptep, pte_t pte)
535 {
536 __ptep_modify_prot_commit(mm, addr, ptep, pte);
537 }
538 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
539 #endif /* CONFIG_MMU */
540
541 /*
542 * A facility to provide lazy MMU batching. This allows PTE updates and
543 * page invalidations to be delayed until a call to leave lazy MMU mode
544 * is issued. Some architectures may benefit from doing this, and it is
545 * beneficial for both shadow and direct mode hypervisors, which may batch
546 * the PTE updates which happen during this window. Note that using this
547 * interface requires that read hazards be removed from the code. A read
548 * hazard could result in the direct mode hypervisor case, since the actual
549 * write to the page tables may not yet have taken place, so reads though
550 * a raw PTE pointer after it has been modified are not guaranteed to be
551 * up to date. This mode can only be entered and left under the protection of
552 * the page table locks for all page tables which may be modified. In the UP
553 * case, this is required so that preemption is disabled, and in the SMP case,
554 * it must synchronize the delayed page table writes properly on other CPUs.
555 */
556 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
557 #define arch_enter_lazy_mmu_mode() do {} while (0)
558 #define arch_leave_lazy_mmu_mode() do {} while (0)
559 #define arch_flush_lazy_mmu_mode() do {} while (0)
560 #endif
561
562 /*
563 * A facility to provide batching of the reload of page tables and
564 * other process state with the actual context switch code for
565 * paravirtualized guests. By convention, only one of the batched
566 * update (lazy) modes (CPU, MMU) should be active at any given time,
567 * entry should never be nested, and entry and exits should always be
568 * paired. This is for sanity of maintaining and reasoning about the
569 * kernel code. In this case, the exit (end of the context switch) is
570 * in architecture-specific code, and so doesn't need a generic
571 * definition.
572 */
573 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
574 #define arch_start_context_switch(prev) do {} while (0)
575 #endif
576
577 #ifndef CONFIG_HAVE_ARCH_SOFT_DIRTY
578 static inline int pte_soft_dirty(pte_t pte)
579 {
580 return 0;
581 }
582
583 static inline int pmd_soft_dirty(pmd_t pmd)
584 {
585 return 0;
586 }
587
588 static inline pte_t pte_mksoft_dirty(pte_t pte)
589 {
590 return pte;
591 }
592
593 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
594 {
595 return pmd;
596 }
597
598 static inline pte_t pte_clear_soft_dirty(pte_t pte)
599 {
600 return pte;
601 }
602
603 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
604 {
605 return pmd;
606 }
607
608 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
609 {
610 return pte;
611 }
612
613 static inline int pte_swp_soft_dirty(pte_t pte)
614 {
615 return 0;
616 }
617
618 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
619 {
620 return pte;
621 }
622 #endif
623
624 #ifndef __HAVE_PFNMAP_TRACKING
625 /*
626 * Interfaces that can be used by architecture code to keep track of
627 * memory type of pfn mappings specified by the remap_pfn_range,
628 * vm_insert_pfn.
629 */
630
631 /*
632 * track_pfn_remap is called when a _new_ pfn mapping is being established
633 * by remap_pfn_range() for physical range indicated by pfn and size.
634 */
635 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
636 unsigned long pfn, unsigned long addr,
637 unsigned long size)
638 {
639 return 0;
640 }
641
642 /*
643 * track_pfn_insert is called when a _new_ single pfn is established
644 * by vm_insert_pfn().
645 */
646 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
647 pfn_t pfn)
648 {
649 }
650
651 /*
652 * track_pfn_copy is called when vma that is covering the pfnmap gets
653 * copied through copy_page_range().
654 */
655 static inline int track_pfn_copy(struct vm_area_struct *vma)
656 {
657 return 0;
658 }
659
660 /*
661 * untrack_pfn is called while unmapping a pfnmap for a region.
662 * untrack can be called for a specific region indicated by pfn and size or
663 * can be for the entire vma (in which case pfn, size are zero).
664 */
665 static inline void untrack_pfn(struct vm_area_struct *vma,
666 unsigned long pfn, unsigned long size)
667 {
668 }
669
670 /*
671 * untrack_pfn_moved is called while mremapping a pfnmap for a new region.
672 */
673 static inline void untrack_pfn_moved(struct vm_area_struct *vma)
674 {
675 }
676 #else
677 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
678 unsigned long pfn, unsigned long addr,
679 unsigned long size);
680 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
681 pfn_t pfn);
682 extern int track_pfn_copy(struct vm_area_struct *vma);
683 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
684 unsigned long size);
685 extern void untrack_pfn_moved(struct vm_area_struct *vma);
686 #endif
687
688 #ifdef __HAVE_COLOR_ZERO_PAGE
689 static inline int is_zero_pfn(unsigned long pfn)
690 {
691 extern unsigned long zero_pfn;
692 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
693 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
694 }
695
696 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
697
698 #else
699 static inline int is_zero_pfn(unsigned long pfn)
700 {
701 extern unsigned long zero_pfn;
702 return pfn == zero_pfn;
703 }
704
705 static inline unsigned long my_zero_pfn(unsigned long addr)
706 {
707 extern unsigned long zero_pfn;
708 return zero_pfn;
709 }
710 #endif
711
712 #ifdef CONFIG_MMU
713
714 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
715 static inline int pmd_trans_huge(pmd_t pmd)
716 {
717 return 0;
718 }
719 #ifndef __HAVE_ARCH_PMD_WRITE
720 static inline int pmd_write(pmd_t pmd)
721 {
722 BUG();
723 return 0;
724 }
725 #endif /* __HAVE_ARCH_PMD_WRITE */
726 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
727
728 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \
729 (defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
730 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD))
731 static inline int pud_trans_huge(pud_t pud)
732 {
733 return 0;
734 }
735 #endif
736
737 #ifndef pmd_read_atomic
738 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
739 {
740 /*
741 * Depend on compiler for an atomic pmd read. NOTE: this is
742 * only going to work, if the pmdval_t isn't larger than
743 * an unsigned long.
744 */
745 return *pmdp;
746 }
747 #endif
748
749 #ifndef arch_needs_pgtable_deposit
750 #define arch_needs_pgtable_deposit() (false)
751 #endif
752 /*
753 * This function is meant to be used by sites walking pagetables with
754 * the mmap_sem hold in read mode to protect against MADV_DONTNEED and
755 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
756 * into a null pmd and the transhuge page fault can convert a null pmd
757 * into an hugepmd or into a regular pmd (if the hugepage allocation
758 * fails). While holding the mmap_sem in read mode the pmd becomes
759 * stable and stops changing under us only if it's not null and not a
760 * transhuge pmd. When those races occurs and this function makes a
761 * difference vs the standard pmd_none_or_clear_bad, the result is
762 * undefined so behaving like if the pmd was none is safe (because it
763 * can return none anyway). The compiler level barrier() is critically
764 * important to compute the two checks atomically on the same pmdval.
765 *
766 * For 32bit kernels with a 64bit large pmd_t this automatically takes
767 * care of reading the pmd atomically to avoid SMP race conditions
768 * against pmd_populate() when the mmap_sem is hold for reading by the
769 * caller (a special atomic read not done by "gcc" as in the generic
770 * version above, is also needed when THP is disabled because the page
771 * fault can populate the pmd from under us).
772 */
773 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
774 {
775 pmd_t pmdval = pmd_read_atomic(pmd);
776 /*
777 * The barrier will stabilize the pmdval in a register or on
778 * the stack so that it will stop changing under the code.
779 *
780 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
781 * pmd_read_atomic is allowed to return a not atomic pmdval
782 * (for example pointing to an hugepage that has never been
783 * mapped in the pmd). The below checks will only care about
784 * the low part of the pmd with 32bit PAE x86 anyway, with the
785 * exception of pmd_none(). So the important thing is that if
786 * the low part of the pmd is found null, the high part will
787 * be also null or the pmd_none() check below would be
788 * confused.
789 */
790 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
791 barrier();
792 #endif
793 if (pmd_none(pmdval) || pmd_trans_huge(pmdval))
794 return 1;
795 if (unlikely(pmd_bad(pmdval))) {
796 pmd_clear_bad(pmd);
797 return 1;
798 }
799 return 0;
800 }
801
802 /*
803 * This is a noop if Transparent Hugepage Support is not built into
804 * the kernel. Otherwise it is equivalent to
805 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
806 * places that already verified the pmd is not none and they want to
807 * walk ptes while holding the mmap sem in read mode (write mode don't
808 * need this). If THP is not enabled, the pmd can't go away under the
809 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
810 * run a pmd_trans_unstable before walking the ptes after
811 * split_huge_page_pmd returns (because it may have run when the pmd
812 * become null, but then a page fault can map in a THP and not a
813 * regular page).
814 */
815 static inline int pmd_trans_unstable(pmd_t *pmd)
816 {
817 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
818 return pmd_none_or_trans_huge_or_clear_bad(pmd);
819 #else
820 return 0;
821 #endif
822 }
823
824 #ifndef CONFIG_NUMA_BALANCING
825 /*
826 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
827 * the only case the kernel cares is for NUMA balancing and is only ever set
828 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
829 * _PAGE_PROTNONE so by by default, implement the helper as "always no". It
830 * is the responsibility of the caller to distinguish between PROT_NONE
831 * protections and NUMA hinting fault protections.
832 */
833 static inline int pte_protnone(pte_t pte)
834 {
835 return 0;
836 }
837
838 static inline int pmd_protnone(pmd_t pmd)
839 {
840 return 0;
841 }
842 #endif /* CONFIG_NUMA_BALANCING */
843
844 #endif /* CONFIG_MMU */
845
846 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
847 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
848 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
849 int pud_clear_huge(pud_t *pud);
850 int pmd_clear_huge(pmd_t *pmd);
851 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
852 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
853 {
854 return 0;
855 }
856 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
857 {
858 return 0;
859 }
860 static inline int pud_clear_huge(pud_t *pud)
861 {
862 return 0;
863 }
864 static inline int pmd_clear_huge(pmd_t *pmd)
865 {
866 return 0;
867 }
868 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
869
870 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
871 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
872 /*
873 * ARCHes with special requirements for evicting THP backing TLB entries can
874 * implement this. Otherwise also, it can help optimize normal TLB flush in
875 * THP regime. stock flush_tlb_range() typically has optimization to nuke the
876 * entire TLB TLB if flush span is greater than a threshold, which will
877 * likely be true for a single huge page. Thus a single thp flush will
878 * invalidate the entire TLB which is not desitable.
879 * e.g. see arch/arc: flush_pmd_tlb_range
880 */
881 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
882 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
883 #else
884 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
885 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
886 #endif
887 #endif
888
889 struct file;
890 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
891 unsigned long size, pgprot_t *vma_prot);
892 #endif /* !__ASSEMBLY__ */
893
894 #ifndef io_remap_pfn_range
895 #define io_remap_pfn_range remap_pfn_range
896 #endif
897
898 #ifndef has_transparent_hugepage
899 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
900 #define has_transparent_hugepage() 1
901 #else
902 #define has_transparent_hugepage() 0
903 #endif
904 #endif
905
906 #endif /* _ASM_GENERIC_PGTABLE_H */