]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - include/asm-generic/pgtable.h
Merge tag 'efi-urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/mfleming...
[mirror_ubuntu-artful-kernel.git] / include / asm-generic / pgtable.h
1 #ifndef _ASM_GENERIC_PGTABLE_H
2 #define _ASM_GENERIC_PGTABLE_H
3
4 #ifndef __ASSEMBLY__
5 #ifdef CONFIG_MMU
6
7 #include <linux/mm_types.h>
8 #include <linux/bug.h>
9
10 /*
11 * On almost all architectures and configurations, 0 can be used as the
12 * upper ceiling to free_pgtables(): on many architectures it has the same
13 * effect as using TASK_SIZE. However, there is one configuration which
14 * must impose a more careful limit, to avoid freeing kernel pgtables.
15 */
16 #ifndef USER_PGTABLES_CEILING
17 #define USER_PGTABLES_CEILING 0UL
18 #endif
19
20 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
21 extern int ptep_set_access_flags(struct vm_area_struct *vma,
22 unsigned long address, pte_t *ptep,
23 pte_t entry, int dirty);
24 #endif
25
26 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
27 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
28 unsigned long address, pmd_t *pmdp,
29 pmd_t entry, int dirty);
30 #endif
31
32 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
33 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
34 unsigned long address,
35 pte_t *ptep)
36 {
37 pte_t pte = *ptep;
38 int r = 1;
39 if (!pte_young(pte))
40 r = 0;
41 else
42 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
43 return r;
44 }
45 #endif
46
47 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
48 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
49 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
50 unsigned long address,
51 pmd_t *pmdp)
52 {
53 pmd_t pmd = *pmdp;
54 int r = 1;
55 if (!pmd_young(pmd))
56 r = 0;
57 else
58 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
59 return r;
60 }
61 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
62 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
63 unsigned long address,
64 pmd_t *pmdp)
65 {
66 BUG();
67 return 0;
68 }
69 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
70 #endif
71
72 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
73 int ptep_clear_flush_young(struct vm_area_struct *vma,
74 unsigned long address, pte_t *ptep);
75 #endif
76
77 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
78 int pmdp_clear_flush_young(struct vm_area_struct *vma,
79 unsigned long address, pmd_t *pmdp);
80 #endif
81
82 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
83 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
84 unsigned long address,
85 pte_t *ptep)
86 {
87 pte_t pte = *ptep;
88 pte_clear(mm, address, ptep);
89 return pte;
90 }
91 #endif
92
93 #ifndef __HAVE_ARCH_PMDP_GET_AND_CLEAR
94 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
95 static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
96 unsigned long address,
97 pmd_t *pmdp)
98 {
99 pmd_t pmd = *pmdp;
100 pmd_clear(pmdp);
101 return pmd;
102 }
103 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
104 #endif
105
106 #ifndef __HAVE_ARCH_PMDP_GET_AND_CLEAR_FULL
107 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
108 static inline pmd_t pmdp_get_and_clear_full(struct mm_struct *mm,
109 unsigned long address, pmd_t *pmdp,
110 int full)
111 {
112 return pmdp_get_and_clear(mm, address, pmdp);
113 }
114 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
115 #endif
116
117 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
118 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
119 unsigned long address, pte_t *ptep,
120 int full)
121 {
122 pte_t pte;
123 pte = ptep_get_and_clear(mm, address, ptep);
124 return pte;
125 }
126 #endif
127
128 /*
129 * Some architectures may be able to avoid expensive synchronization
130 * primitives when modifications are made to PTE's which are already
131 * not present, or in the process of an address space destruction.
132 */
133 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
134 static inline void pte_clear_not_present_full(struct mm_struct *mm,
135 unsigned long address,
136 pte_t *ptep,
137 int full)
138 {
139 pte_clear(mm, address, ptep);
140 }
141 #endif
142
143 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
144 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
145 unsigned long address,
146 pte_t *ptep);
147 #endif
148
149 #ifndef __HAVE_ARCH_PMDP_CLEAR_FLUSH
150 extern pmd_t pmdp_clear_flush(struct vm_area_struct *vma,
151 unsigned long address,
152 pmd_t *pmdp);
153 #endif
154
155 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
156 struct mm_struct;
157 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
158 {
159 pte_t old_pte = *ptep;
160 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
161 }
162 #endif
163
164 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
165 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
166 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
167 unsigned long address, pmd_t *pmdp)
168 {
169 pmd_t old_pmd = *pmdp;
170 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
171 }
172 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
173 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
174 unsigned long address, pmd_t *pmdp)
175 {
176 BUG();
177 }
178 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
179 #endif
180
181 #ifndef __HAVE_ARCH_PMDP_SPLITTING_FLUSH
182 extern void pmdp_splitting_flush(struct vm_area_struct *vma,
183 unsigned long address, pmd_t *pmdp);
184 #endif
185
186 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
187 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
188 pgtable_t pgtable);
189 #endif
190
191 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
192 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
193 #endif
194
195 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
196 extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
197 pmd_t *pmdp);
198 #endif
199
200 #ifndef __HAVE_ARCH_PTE_SAME
201 static inline int pte_same(pte_t pte_a, pte_t pte_b)
202 {
203 return pte_val(pte_a) == pte_val(pte_b);
204 }
205 #endif
206
207 #ifndef __HAVE_ARCH_PTE_UNUSED
208 /*
209 * Some architectures provide facilities to virtualization guests
210 * so that they can flag allocated pages as unused. This allows the
211 * host to transparently reclaim unused pages. This function returns
212 * whether the pte's page is unused.
213 */
214 static inline int pte_unused(pte_t pte)
215 {
216 return 0;
217 }
218 #endif
219
220 #ifndef __HAVE_ARCH_PMD_SAME
221 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
222 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
223 {
224 return pmd_val(pmd_a) == pmd_val(pmd_b);
225 }
226 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
227 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
228 {
229 BUG();
230 return 0;
231 }
232 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
233 #endif
234
235 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
236 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
237 #endif
238
239 #ifndef __HAVE_ARCH_MOVE_PTE
240 #define move_pte(pte, prot, old_addr, new_addr) (pte)
241 #endif
242
243 #ifndef pte_accessible
244 # define pte_accessible(mm, pte) ((void)(pte), 1)
245 #endif
246
247 #ifndef flush_tlb_fix_spurious_fault
248 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
249 #endif
250
251 #ifndef pgprot_noncached
252 #define pgprot_noncached(prot) (prot)
253 #endif
254
255 #ifndef pgprot_writecombine
256 #define pgprot_writecombine pgprot_noncached
257 #endif
258
259 #ifndef pgprot_device
260 #define pgprot_device pgprot_noncached
261 #endif
262
263 #ifndef pgprot_modify
264 #define pgprot_modify pgprot_modify
265 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
266 {
267 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
268 newprot = pgprot_noncached(newprot);
269 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
270 newprot = pgprot_writecombine(newprot);
271 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
272 newprot = pgprot_device(newprot);
273 return newprot;
274 }
275 #endif
276
277 /*
278 * When walking page tables, get the address of the next boundary,
279 * or the end address of the range if that comes earlier. Although no
280 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
281 */
282
283 #define pgd_addr_end(addr, end) \
284 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
285 (__boundary - 1 < (end) - 1)? __boundary: (end); \
286 })
287
288 #ifndef pud_addr_end
289 #define pud_addr_end(addr, end) \
290 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
291 (__boundary - 1 < (end) - 1)? __boundary: (end); \
292 })
293 #endif
294
295 #ifndef pmd_addr_end
296 #define pmd_addr_end(addr, end) \
297 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
298 (__boundary - 1 < (end) - 1)? __boundary: (end); \
299 })
300 #endif
301
302 /*
303 * When walking page tables, we usually want to skip any p?d_none entries;
304 * and any p?d_bad entries - reporting the error before resetting to none.
305 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
306 */
307 void pgd_clear_bad(pgd_t *);
308 void pud_clear_bad(pud_t *);
309 void pmd_clear_bad(pmd_t *);
310
311 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
312 {
313 if (pgd_none(*pgd))
314 return 1;
315 if (unlikely(pgd_bad(*pgd))) {
316 pgd_clear_bad(pgd);
317 return 1;
318 }
319 return 0;
320 }
321
322 static inline int pud_none_or_clear_bad(pud_t *pud)
323 {
324 if (pud_none(*pud))
325 return 1;
326 if (unlikely(pud_bad(*pud))) {
327 pud_clear_bad(pud);
328 return 1;
329 }
330 return 0;
331 }
332
333 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
334 {
335 if (pmd_none(*pmd))
336 return 1;
337 if (unlikely(pmd_bad(*pmd))) {
338 pmd_clear_bad(pmd);
339 return 1;
340 }
341 return 0;
342 }
343
344 static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,
345 unsigned long addr,
346 pte_t *ptep)
347 {
348 /*
349 * Get the current pte state, but zero it out to make it
350 * non-present, preventing the hardware from asynchronously
351 * updating it.
352 */
353 return ptep_get_and_clear(mm, addr, ptep);
354 }
355
356 static inline void __ptep_modify_prot_commit(struct mm_struct *mm,
357 unsigned long addr,
358 pte_t *ptep, pte_t pte)
359 {
360 /*
361 * The pte is non-present, so there's no hardware state to
362 * preserve.
363 */
364 set_pte_at(mm, addr, ptep, pte);
365 }
366
367 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
368 /*
369 * Start a pte protection read-modify-write transaction, which
370 * protects against asynchronous hardware modifications to the pte.
371 * The intention is not to prevent the hardware from making pte
372 * updates, but to prevent any updates it may make from being lost.
373 *
374 * This does not protect against other software modifications of the
375 * pte; the appropriate pte lock must be held over the transation.
376 *
377 * Note that this interface is intended to be batchable, meaning that
378 * ptep_modify_prot_commit may not actually update the pte, but merely
379 * queue the update to be done at some later time. The update must be
380 * actually committed before the pte lock is released, however.
381 */
382 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
383 unsigned long addr,
384 pte_t *ptep)
385 {
386 return __ptep_modify_prot_start(mm, addr, ptep);
387 }
388
389 /*
390 * Commit an update to a pte, leaving any hardware-controlled bits in
391 * the PTE unmodified.
392 */
393 static inline void ptep_modify_prot_commit(struct mm_struct *mm,
394 unsigned long addr,
395 pte_t *ptep, pte_t pte)
396 {
397 __ptep_modify_prot_commit(mm, addr, ptep, pte);
398 }
399 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
400 #endif /* CONFIG_MMU */
401
402 /*
403 * A facility to provide lazy MMU batching. This allows PTE updates and
404 * page invalidations to be delayed until a call to leave lazy MMU mode
405 * is issued. Some architectures may benefit from doing this, and it is
406 * beneficial for both shadow and direct mode hypervisors, which may batch
407 * the PTE updates which happen during this window. Note that using this
408 * interface requires that read hazards be removed from the code. A read
409 * hazard could result in the direct mode hypervisor case, since the actual
410 * write to the page tables may not yet have taken place, so reads though
411 * a raw PTE pointer after it has been modified are not guaranteed to be
412 * up to date. This mode can only be entered and left under the protection of
413 * the page table locks for all page tables which may be modified. In the UP
414 * case, this is required so that preemption is disabled, and in the SMP case,
415 * it must synchronize the delayed page table writes properly on other CPUs.
416 */
417 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
418 #define arch_enter_lazy_mmu_mode() do {} while (0)
419 #define arch_leave_lazy_mmu_mode() do {} while (0)
420 #define arch_flush_lazy_mmu_mode() do {} while (0)
421 #endif
422
423 /*
424 * A facility to provide batching of the reload of page tables and
425 * other process state with the actual context switch code for
426 * paravirtualized guests. By convention, only one of the batched
427 * update (lazy) modes (CPU, MMU) should be active at any given time,
428 * entry should never be nested, and entry and exits should always be
429 * paired. This is for sanity of maintaining and reasoning about the
430 * kernel code. In this case, the exit (end of the context switch) is
431 * in architecture-specific code, and so doesn't need a generic
432 * definition.
433 */
434 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
435 #define arch_start_context_switch(prev) do {} while (0)
436 #endif
437
438 #ifndef CONFIG_HAVE_ARCH_SOFT_DIRTY
439 static inline int pte_soft_dirty(pte_t pte)
440 {
441 return 0;
442 }
443
444 static inline int pmd_soft_dirty(pmd_t pmd)
445 {
446 return 0;
447 }
448
449 static inline pte_t pte_mksoft_dirty(pte_t pte)
450 {
451 return pte;
452 }
453
454 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
455 {
456 return pmd;
457 }
458
459 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
460 {
461 return pte;
462 }
463
464 static inline int pte_swp_soft_dirty(pte_t pte)
465 {
466 return 0;
467 }
468
469 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
470 {
471 return pte;
472 }
473 #endif
474
475 #ifndef __HAVE_PFNMAP_TRACKING
476 /*
477 * Interfaces that can be used by architecture code to keep track of
478 * memory type of pfn mappings specified by the remap_pfn_range,
479 * vm_insert_pfn.
480 */
481
482 /*
483 * track_pfn_remap is called when a _new_ pfn mapping is being established
484 * by remap_pfn_range() for physical range indicated by pfn and size.
485 */
486 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
487 unsigned long pfn, unsigned long addr,
488 unsigned long size)
489 {
490 return 0;
491 }
492
493 /*
494 * track_pfn_insert is called when a _new_ single pfn is established
495 * by vm_insert_pfn().
496 */
497 static inline int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
498 unsigned long pfn)
499 {
500 return 0;
501 }
502
503 /*
504 * track_pfn_copy is called when vma that is covering the pfnmap gets
505 * copied through copy_page_range().
506 */
507 static inline int track_pfn_copy(struct vm_area_struct *vma)
508 {
509 return 0;
510 }
511
512 /*
513 * untrack_pfn_vma is called while unmapping a pfnmap for a region.
514 * untrack can be called for a specific region indicated by pfn and size or
515 * can be for the entire vma (in which case pfn, size are zero).
516 */
517 static inline void untrack_pfn(struct vm_area_struct *vma,
518 unsigned long pfn, unsigned long size)
519 {
520 }
521 #else
522 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
523 unsigned long pfn, unsigned long addr,
524 unsigned long size);
525 extern int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
526 unsigned long pfn);
527 extern int track_pfn_copy(struct vm_area_struct *vma);
528 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
529 unsigned long size);
530 #endif
531
532 #ifdef __HAVE_COLOR_ZERO_PAGE
533 static inline int is_zero_pfn(unsigned long pfn)
534 {
535 extern unsigned long zero_pfn;
536 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
537 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
538 }
539
540 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
541
542 #else
543 static inline int is_zero_pfn(unsigned long pfn)
544 {
545 extern unsigned long zero_pfn;
546 return pfn == zero_pfn;
547 }
548
549 static inline unsigned long my_zero_pfn(unsigned long addr)
550 {
551 extern unsigned long zero_pfn;
552 return zero_pfn;
553 }
554 #endif
555
556 #ifdef CONFIG_MMU
557
558 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
559 static inline int pmd_trans_huge(pmd_t pmd)
560 {
561 return 0;
562 }
563 static inline int pmd_trans_splitting(pmd_t pmd)
564 {
565 return 0;
566 }
567 #ifndef __HAVE_ARCH_PMD_WRITE
568 static inline int pmd_write(pmd_t pmd)
569 {
570 BUG();
571 return 0;
572 }
573 #endif /* __HAVE_ARCH_PMD_WRITE */
574 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
575
576 #ifndef pmd_read_atomic
577 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
578 {
579 /*
580 * Depend on compiler for an atomic pmd read. NOTE: this is
581 * only going to work, if the pmdval_t isn't larger than
582 * an unsigned long.
583 */
584 return *pmdp;
585 }
586 #endif
587
588 #ifndef pmd_move_must_withdraw
589 static inline int pmd_move_must_withdraw(spinlock_t *new_pmd_ptl,
590 spinlock_t *old_pmd_ptl)
591 {
592 /*
593 * With split pmd lock we also need to move preallocated
594 * PTE page table if new_pmd is on different PMD page table.
595 */
596 return new_pmd_ptl != old_pmd_ptl;
597 }
598 #endif
599
600 /*
601 * This function is meant to be used by sites walking pagetables with
602 * the mmap_sem hold in read mode to protect against MADV_DONTNEED and
603 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
604 * into a null pmd and the transhuge page fault can convert a null pmd
605 * into an hugepmd or into a regular pmd (if the hugepage allocation
606 * fails). While holding the mmap_sem in read mode the pmd becomes
607 * stable and stops changing under us only if it's not null and not a
608 * transhuge pmd. When those races occurs and this function makes a
609 * difference vs the standard pmd_none_or_clear_bad, the result is
610 * undefined so behaving like if the pmd was none is safe (because it
611 * can return none anyway). The compiler level barrier() is critically
612 * important to compute the two checks atomically on the same pmdval.
613 *
614 * For 32bit kernels with a 64bit large pmd_t this automatically takes
615 * care of reading the pmd atomically to avoid SMP race conditions
616 * against pmd_populate() when the mmap_sem is hold for reading by the
617 * caller (a special atomic read not done by "gcc" as in the generic
618 * version above, is also needed when THP is disabled because the page
619 * fault can populate the pmd from under us).
620 */
621 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
622 {
623 pmd_t pmdval = pmd_read_atomic(pmd);
624 /*
625 * The barrier will stabilize the pmdval in a register or on
626 * the stack so that it will stop changing under the code.
627 *
628 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
629 * pmd_read_atomic is allowed to return a not atomic pmdval
630 * (for example pointing to an hugepage that has never been
631 * mapped in the pmd). The below checks will only care about
632 * the low part of the pmd with 32bit PAE x86 anyway, with the
633 * exception of pmd_none(). So the important thing is that if
634 * the low part of the pmd is found null, the high part will
635 * be also null or the pmd_none() check below would be
636 * confused.
637 */
638 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
639 barrier();
640 #endif
641 if (pmd_none(pmdval) || pmd_trans_huge(pmdval))
642 return 1;
643 if (unlikely(pmd_bad(pmdval))) {
644 pmd_clear_bad(pmd);
645 return 1;
646 }
647 return 0;
648 }
649
650 /*
651 * This is a noop if Transparent Hugepage Support is not built into
652 * the kernel. Otherwise it is equivalent to
653 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
654 * places that already verified the pmd is not none and they want to
655 * walk ptes while holding the mmap sem in read mode (write mode don't
656 * need this). If THP is not enabled, the pmd can't go away under the
657 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
658 * run a pmd_trans_unstable before walking the ptes after
659 * split_huge_page_pmd returns (because it may have run when the pmd
660 * become null, but then a page fault can map in a THP and not a
661 * regular page).
662 */
663 static inline int pmd_trans_unstable(pmd_t *pmd)
664 {
665 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
666 return pmd_none_or_trans_huge_or_clear_bad(pmd);
667 #else
668 return 0;
669 #endif
670 }
671
672 #ifndef CONFIG_NUMA_BALANCING
673 /*
674 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
675 * the only case the kernel cares is for NUMA balancing and is only ever set
676 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
677 * _PAGE_PROTNONE so by by default, implement the helper as "always no". It
678 * is the responsibility of the caller to distinguish between PROT_NONE
679 * protections and NUMA hinting fault protections.
680 */
681 static inline int pte_protnone(pte_t pte)
682 {
683 return 0;
684 }
685
686 static inline int pmd_protnone(pmd_t pmd)
687 {
688 return 0;
689 }
690 #endif /* CONFIG_NUMA_BALANCING */
691
692 #endif /* CONFIG_MMU */
693
694 #endif /* !__ASSEMBLY__ */
695
696 #ifndef io_remap_pfn_range
697 #define io_remap_pfn_range remap_pfn_range
698 #endif
699
700 #endif /* _ASM_GENERIC_PGTABLE_H */