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clk: rockchip: fix ID of 8ch clock of I2S1 for rk3328
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1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ASM_GENERIC_SERIAL_H
3 #define __ASM_GENERIC_SERIAL_H
4
5 /*
6 * This should not be an architecture specific #define, oh well.
7 *
8 * Traditionally, it just describes i8250 and related serial ports
9 * that have this clock rate.
10 */
11
12 #define BASE_BAUD (1843200 / 16)
13
14 #endif /* __ASM_GENERIC_SERIAL_H */