include/asm-i386/mach-default/mach_apic.h

   1 #ifndef __ASM_MACH_APIC_H
   2 #define __ASM_MACH_APIC_H
   3
   4 #include <mach_apicdef.h>
   5 #include <asm/smp.h>
   6
   7 #define APIC_DFR_VALUE  (APIC_DFR_FLAT)
   8
   9 static inline cpumask_t target_cpus(void)
  10 {
  11 #ifdef CONFIG_SMP
  12         return cpu_online_map;
  13 #else
  14         return cpumask_of_cpu(0);
  15 #endif
  16 }
  17 #define TARGET_CPUS (target_cpus())
  18
  19 #define NO_BALANCE_IRQ (0)
  20 #define esr_disable (0)
  21
  22 #define NO_IOAPIC_CHECK (0)
  23
  24 #define INT_DELIVERY_MODE dest_LowestPrio
  25 #define INT_DEST_MODE 1     /* logical delivery broadcast to all procs */
  26
  27 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
  28 {
  29         return physid_isset(apicid, bitmap);
  30 }
  31
  32 static inline unsigned long check_apicid_present(int bit)
  33 {
  34         return physid_isset(bit, phys_cpu_present_map);
  35 }
  36
  37 /*
  38  * Set up the logical destination ID.
  39  *
  40  * Intel recommends to set DFR, LDR and TPR before enabling
  41  * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
  42  * document number 292116).  So here it goes...
  43  */
  44 static inline void init_apic_ldr(void)
  45 {
  46         unsigned long val;
  47
  48         apic_write_around(APIC_DFR, APIC_DFR_VALUE);
  49         val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
  50         val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
  51         apic_write_around(APIC_LDR, val);
  52 }
  53
  54 static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
  55 {
  56         return phys_map;
  57 }
  58
  59 static inline void clustered_apic_check(void)
  60 {
  61         printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
  62                                         "Flat", nr_ioapics);
  63 }
  64
  65 static inline int multi_timer_check(int apic, int irq)
  66 {
  67         return 0;
  68 }
  69
  70 static inline int apicid_to_node(int logical_apicid)
  71 {
  72         return 0;
  73 }
  74
  75 /* Mapping from cpu number to logical apicid */
  76 static inline int cpu_to_logical_apicid(int cpu)
  77 {
  78         return 1 << cpu;
  79 }
  80
  81 static inline int cpu_present_to_apicid(int mps_cpu)
  82 {
  83         if (mps_cpu < get_physical_broadcast())
  84                 return  mps_cpu;
  85         else
  86                 return BAD_APICID;
  87 }
  88
  89 static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
  90 {
  91         return physid_mask_of_physid(phys_apicid);
  92 }
  93
  94 static inline int mpc_apic_id(struct mpc_config_processor *m,
  95                         struct mpc_config_translation *translation_record)
  96 {
  97         printk("Processor #%d %ld:%ld APIC version %d\n",
  98                         m->mpc_apicid,
  99                         (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
 100                         (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
 101                         m->mpc_apicver);
 102         return (m->mpc_apicid);
 103 }
 104
 105 static inline void setup_portio_remap(void)
 106 {
 107 }
 108
 109 static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
 110 {
 111         return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
 112 }
 113
 114 static inline int apic_id_registered(void)
 115 {
 116         return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
 117 }
 118
 119 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
 120 {
 121         return cpus_addr(cpumask)[0];
 122 }
 123
 124 static inline void enable_apic_mode(void)
 125 {
 126 }
 127
 128 static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
 129 {
 130         return cpuid_apic >> index_msb;
 131 }
 132
 133 #endif /* __ASM_MACH_APIC_H */