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git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - include/asm-m68knommu/system.h
1 #ifndef _M68KNOMMU_SYSTEM_H
2 #define _M68KNOMMU_SYSTEM_H
4 #include <linux/config.h> /* get configuration macros */
5 #include <linux/linkage.h>
6 #include <asm/segment.h>
10 * switch_to(n) should switch tasks to task ptr, first checking that
11 * ptr isn't the current task, in which case it does nothing. This
12 * also clears the TS-flag if the task we switched to has used the
13 * math co-processor latest.
16 * switch_to() saves the extra registers, that are not saved
17 * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
18 * a0-a1. Some of these are used by schedule() and its predecessors
19 * and so we might get see unexpected behaviors when a task returns
20 * with unexpected register values.
22 * syscall stores these registers itself and none of them are used
23 * by syscall after the function in the syscall has been called.
25 * Beware that resume now expects *next to be in d1 and the offset of
26 * tss to be in a1. This saves a few instructions as we no longer have
27 * to push them onto the stack and read them back right after.
29 * 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
31 * Changed 96/09/19 by Andreas Schwab
32 * pass prev in a0, next in a1, offset of tss in d1, and whether
33 * the mm structures are shared in d2 (to avoid atc flushing).
35 asmlinkage
void resume(void);
36 #define switch_to(prev,next,last) \
39 __asm__ __volatile__( \
40 "movel %1, %%a0\n\t" \
41 "movel %2, %%a1\n\t" \
43 "movel %%d1, %0\n\t" \
45 : "d" (prev), "d" (next) \
46 : "cc", "d0", "d1", "d2", "d3", "d4", "d5", "a0", "a1"); \
50 #ifdef CONFIG_COLDFIRE
51 #define local_irq_enable() __asm__ __volatile__ ( \
52 "move %/sr,%%d0\n\t" \
53 "andi.l #0xf8ff,%%d0\n\t" \
57 : "cc", "%d0", "memory")
58 #define local_irq_disable() __asm__ __volatile__ ( \
59 "move %/sr,%%d0\n\t" \
60 "ori.l #0x0700,%%d0\n\t" \
64 : "cc", "%d0", "memory")
65 /* For spinlocks etc */
66 #define local_irq_save(x) __asm__ __volatile__ ( \
68 "movew #0x0700,%%d0\n\t" \
73 : "cc", "%d0", "memory")
76 /* portable version */ /* FIXME - see entry.h*/
77 #define ALLOWINT 0xf8ff
79 #define local_irq_enable() asm volatile ("andiw %0,%%sr": : "i" (ALLOWINT) : "memory")
80 #define local_irq_disable() asm volatile ("oriw #0x0700,%%sr": : : "memory")
83 #define local_save_flags(x) asm volatile ("movew %%sr,%0":"=d" (x) : : "memory")
84 #define local_irq_restore(x) asm volatile ("movew %0,%%sr": :"d" (x) : "memory")
86 /* For spinlocks etc */
87 #ifndef local_irq_save
88 #define local_irq_save(x) do { local_save_flags(x); local_irq_disable(); } while (0)
91 #define irqs_disabled() \
93 unsigned long flags; \
94 local_save_flags(flags); \
95 ((flags & 0x0700) == 0x0700); \
98 #define iret() __asm__ __volatile__ ("rte": : :"memory", "sp", "cc")
101 * Force strict CPU ordering.
102 * Not really required on m68k...
104 #define nop() asm volatile ("nop"::)
105 #define mb() asm volatile ("" : : :"memory")
106 #define rmb() asm volatile ("" : : :"memory")
107 #define wmb() asm volatile ("" : : :"memory")
108 #define set_rmb(var, value) do { xchg(&var, value); } while (0)
109 #define set_mb(var, value) set_rmb(var, value)
110 #define set_wmb(var, value) do { var = value; wmb(); } while (0)
113 #define smp_mb() mb()
114 #define smp_rmb() rmb()
115 #define smp_wmb() wmb()
116 #define smp_read_barrier_depends() read_barrier_depends()
118 #define smp_mb() barrier()
119 #define smp_rmb() barrier()
120 #define smp_wmb() barrier()
121 #define smp_read_barrier_depends() do { } while(0)
124 #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
125 #define tas(ptr) (xchg((ptr),1))
127 struct __xchg_dummy
{ unsigned long a
[100]; };
128 #define __xg(x) ((volatile struct __xchg_dummy *)(x))
130 #ifndef CONFIG_RMW_INSNS
131 static inline unsigned long __xchg(unsigned long x
, volatile void * ptr
, int size
)
133 unsigned long tmp
, flags
;
135 local_irq_save(flags
);
142 : "=&d" (tmp
) : "d" (x
), "m" (*__xg(ptr
)) : "memory");
148 : "=&d" (tmp
) : "d" (x
), "m" (*__xg(ptr
)) : "memory");
154 : "=&d" (tmp
) : "d" (x
), "m" (*__xg(ptr
)) : "memory");
157 local_irq_restore(flags
);
161 static inline unsigned long __xchg(unsigned long x
, volatile void * ptr
, int size
)
170 : "=&d" (x
) : "d" (x
), "m" (*__xg(ptr
)) : "memory");
178 : "=&d" (x
) : "d" (x
), "m" (*__xg(ptr
)) : "memory");
186 : "=&d" (x
) : "d" (x
), "m" (*__xg(ptr
)) : "memory");
194 * Atomic compare and exchange. Compare OLD with MEM, if identical,
195 * store NEW in MEM. Return the initial value in MEM. Success is
196 * indicated by comparing RETURN with OLD.
198 #define __HAVE_ARCH_CMPXCHG 1
200 static __inline__
unsigned long
201 cmpxchg(volatile int *p
, int old
, int new)
206 local_irq_save(flags
);
207 if ((prev
= *p
) == old
)
209 local_irq_restore(flags
);
215 #define HARD_RESET_NOW() ({ \
216 local_irq_disable(); \
218 movew #0x0000, 0xfffa6a; \
220 /*movew #0x1557, 0xfffa44;*/ \
221 /*movew #0x0155, 0xfffa46;*/ \
231 #if defined( CONFIG_M68328 ) || defined( CONFIG_M68EZ328 ) || \
232 defined (CONFIG_M68360) || defined( CONFIG_M68VZ328 )
233 #define HARD_RESET_NOW() ({ \
234 local_irq_disable(); \
236 moveal #0x10c00000, %a0; \
237 moveb #0, 0xFFFFF300; \
238 moveal 0(%a0), %sp; \
239 moveal 4(%a0), %a0; \
245 #ifdef CONFIG_COLDFIRE
246 #if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
248 * Need to account for broken early mask of 5272 silicon. So don't
249 * jump through the original start address. Jump strait into the
250 * known start of the FLASH code.
252 #define HARD_RESET_NOW() ({ \
254 movew #0x2700, %sr; \
258 #elif defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \
259 defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) || \
260 defined(CONFIG_CLEOPATRA)
261 #define HARD_RESET_NOW() ({ \
263 movew #0x2700, %sr; \
264 moveal #0x10000044, %a0; \
265 movel #0xffffffff, (%a0); \
266 moveal #0x10000001, %a0; \
267 moveb #0x00, (%a0); \
268 moveal #0xf0000004, %a0; \
273 #elif defined(CONFIG_M5272)
275 * Retrieve the boot address in flash using CSBR0 and CSOR0
276 * find the reset vector at flash_address + 4 (e.g. 0x400)
277 * remap it in the flash's current location (e.g. 0xf0000400)
280 #define HARD_RESET_NOW() ({ \
282 movew #0x2700, %%sr; \
283 move.l %0+0x40,%%d0; \
284 and.l %0+0x44,%%d0; \
285 andi.l #0xfffff000,%%d0; \
291 : "o" (*(char *)MCF_MBAR) ); \
293 #elif defined(CONFIG_M528x)
295 * The MCF528x has a bit (SOFTRST) in memory (Reset Control Register RCR),
296 * that when set, resets the MCF528x.
298 #define HARD_RESET_NOW() \
300 unsigned char volatile *reset; \
301 asm("move.w #0x2700, %sr"); \
302 reset = ((volatile unsigned short *)(MCF_IPSBAR + 0x110000)); \
304 *reset |= (0x01 << 7);\
306 #elif defined(CONFIG_M523x)
307 #define HARD_RESET_NOW() ({ \
309 movew #0x2700, %sr; \
310 movel #0x01000000, %sp; \
311 moveal #0x40110000, %a0; \
312 moveb #0x80, (%a0); \
315 #elif defined(CONFIG_M520x)
317 * The MCF5208 has a bit (SOFTRST) in memory (Reset Control Register
318 * RCR), that when set, resets the MCF5208.
320 #define HARD_RESET_NOW() \
322 unsigned char volatile *reset; \
323 asm("move.w #0x2700, %sr"); \
324 reset = ((volatile unsigned short *)(MCF_IPSBAR + 0xA0000)); \
329 #define HARD_RESET_NOW() ({ \
331 movew #0x2700, %sr; \
339 #define arch_align_stack(x) (x)
341 #endif /* _M68KNOMMU_SYSTEM_H */