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git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - include/asm-mips/irq.h
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994 by Waldorf GMBH, written by Ralf Baechle
7 * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle
12 #include <linux/linkage.h>
14 #include <asm/mipsmtregs.h>
19 static inline int irq_canonicalize(int irq
)
21 return ((irq
== I8259A_IRQ_BASE
+ 2) ? I8259A_IRQ_BASE
+ 9 : irq
);
24 #define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
27 #ifdef CONFIG_MIPS_MT_SMTC
31 extern unsigned long irq_hwmask
[];
32 extern int setup_irq_smtc(unsigned int irq
, struct irqaction
* new,
33 unsigned long hwmask
);
35 static inline void smtc_im_ack_irq(unsigned int irq
)
37 if (irq_hwmask
[irq
] & ST0_IM
)
38 set_c0_status(irq_hwmask
[irq
] & ST0_IM
);
43 static inline void smtc_im_ack_irq(unsigned int irq
)
47 #endif /* CONFIG_MIPS_MT_SMTC */
49 #ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
52 * Clear interrupt mask handling "backstop" if irq_hwmask
53 * entry so indicates. This implies that the ack() or end()
54 * functions will take over re-enabling the low-level mask.
55 * Otherwise it will be done on return from exception.
57 #define __DO_IRQ_SMTC_HOOK(irq) \
59 if (irq_hwmask[irq] & 0x0000ff00) \
60 write_c0_tccontext(read_c0_tccontext() & \
61 ~(irq_hwmask[irq] & 0x0000ff00)); \
65 #define __DO_IRQ_SMTC_HOOK(irq) do { } while (0)
69 * do_IRQ handles all normal device IRQ's (the special
70 * SMP cross-CPU interrupts have their own specific
73 * Ideally there should be away to get this into kernel/irq/handle.c to
74 * avoid the overhead of a call for just a tiny function ...
79 __DO_IRQ_SMTC_HOOK(irq); \
80 generic_handle_irq(irq); \
84 extern void arch_init_irq(void);
85 extern void spurious_interrupt(void);
87 extern int allocate_irqno(void);
88 extern void alloc_legacy_irqno(void);
89 extern void free_irqno(unsigned int irq
);
92 * Before R2 the timer and performance counter interrupts were both fixed to
93 * IE7. Since R2 their number has to be read from the c0_intctl register.
95 #define CP0_LEGACY_COMPARE_IRQ 7
97 extern int cp0_compare_irq
;
98 extern int cp0_perfcount_irq
;
100 #endif /* _ASM_IRQ_H */