2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 2003 Ralf Baechle
7 * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
9 #ifndef _ASM_PGTABLE_64_H
10 #define _ASM_PGTABLE_64_H
12 #include <linux/config.h>
13 #include <linux/linkage.h>
15 #include <asm/addrspace.h>
17 #include <asm/cachectl.h>
19 #include <asm-generic/pgtable-nopud.h>
22 * Each address space has 2 4K pages as its page directory, giving 1024
23 * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
24 * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
25 * tables. Each page table is also a single 4K page, giving 512 (==
26 * PTRS_PER_PTE) 8 byte ptes. Each pud entry is initialized to point to
27 * invalid_pmd_table, each pmd entry is initialized to point to
28 * invalid_pte_table, each pte is initialized to 0. When memory is low,
29 * and a pmd table or a page table allocation fails, empty_bad_pmd_table
30 * and empty_bad_page_table is returned back to higher layer code, so
31 * that the failure is recognized later on. Linux does not seem to
32 * handle these failures very well though. The empty_bad_page_table has
33 * invalid pte entries in it, to force page faults.
35 * Kernel mappings: kernel mappings are held in the swapper_pg_table.
36 * The layout is identical to userspace except it's indexed with the
37 * fault address - VMALLOC_START.
40 /* PMD_SHIFT determines the size of the area a second-level page table can map */
41 #define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT + PTE_ORDER - 3))
42 #define PMD_SIZE (1UL << PMD_SHIFT)
43 #define PMD_MASK (~(PMD_SIZE-1))
45 /* PGDIR_SHIFT determines what a third-level page table entry can map */
46 #define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + PMD_ORDER - 3))
47 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
48 #define PGDIR_MASK (~(PGDIR_SIZE-1))
51 * For 4kB page size we use a 3 level page tree and an 8kB pud, which
52 * permits us mapping 40 bits of virtual address space.
54 * We used to implement 41 bits by having an order 1 pmd level but that seemed
57 * For 8kB page size we use a 3 level page tree which permits a total of
58 * 8TB of address space. Alternatively a 33-bit / 8GB organization using
59 * two levels would be easy to implement.
61 * For 16kB page size we use a 2 level page tree which permits a total of
62 * 36 bits of virtual address space. We could add a third level but it seems
63 * like at the moment there's no need for this.
65 * For 64kB page size we use a 2 level page table tree for a total of 42 bits
66 * of virtual address space.
68 #ifdef CONFIG_PAGE_SIZE_4KB
70 #define PUD_ORDER aieeee_attempt_to_allocate_pud
74 #ifdef CONFIG_PAGE_SIZE_8KB
76 #define PUD_ORDER aieeee_attempt_to_allocate_pud
80 #ifdef CONFIG_PAGE_SIZE_16KB
82 #define PUD_ORDER aieeee_attempt_to_allocate_pud
86 #ifdef CONFIG_PAGE_SIZE_64KB
88 #define PUD_ORDER aieeee_attempt_to_allocate_pud
93 #define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t))
94 #define PTRS_PER_PMD ((PAGE_SIZE << PMD_ORDER) / sizeof(pmd_t))
95 #define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
97 #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
98 #define FIRST_USER_ADDRESS 0
100 #define VMALLOC_START MAP_BASE
101 #define VMALLOC_END \
102 (VMALLOC_START + PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE)
104 #define pte_ERROR(e) \
105 printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
106 #define pmd_ERROR(e) \
107 printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
108 #define pgd_ERROR(e) \
109 printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
111 extern pte_t invalid_pte_table
[PTRS_PER_PTE
];
112 extern pte_t empty_bad_page_table
[PTRS_PER_PTE
];
113 extern pmd_t invalid_pmd_table
[PTRS_PER_PMD
];
114 extern pmd_t empty_bad_pmd_table
[PTRS_PER_PMD
];
117 * Empty pgd/pmd entries point to the invalid_pte_table.
119 static inline int pmd_none(pmd_t pmd
)
121 return pmd_val(pmd
) == (unsigned long) invalid_pte_table
;
124 #define pmd_bad(pmd) (pmd_val(pmd) & ~PAGE_MASK)
126 static inline int pmd_present(pmd_t pmd
)
128 return pmd_val(pmd
) != (unsigned long) invalid_pte_table
;
131 static inline void pmd_clear(pmd_t
*pmdp
)
133 pmd_val(*pmdp
) = ((unsigned long) invalid_pte_table
);
137 * Empty pud entries point to the invalid_pmd_table.
139 static inline int pud_none(pud_t pud
)
141 return pud_val(pud
) == (unsigned long) invalid_pmd_table
;
144 static inline int pud_bad(pud_t pud
)
146 return pud_val(pud
) & ~PAGE_MASK
;
149 static inline int pud_present(pud_t pud
)
151 return pud_val(pud
) != (unsigned long) invalid_pmd_table
;
154 static inline void pud_clear(pud_t
*pudp
)
156 pud_val(*pudp
) = ((unsigned long) invalid_pmd_table
);
159 #define pte_page(x) pfn_to_page(pte_pfn(x))
161 #ifdef CONFIG_CPU_VR41XX
162 #define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
163 #define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
165 #define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT))
166 #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
169 #define __pgd_offset(address) pgd_index(address)
170 #define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
171 #define __pmd_offset(address) pmd_index(address)
173 /* to find an entry in a kernel page-table-directory */
174 #define pgd_offset_k(address) pgd_offset(&init_mm, 0)
176 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
177 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
179 /* to find an entry in a page-table-directory */
180 #define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr))
182 static inline unsigned long pud_page(pud_t pud
)
187 /* Find an entry in the second-level page table.. */
188 static inline pmd_t
*pmd_offset(pud_t
* pud
, unsigned long address
)
190 return (pmd_t
*) pud_page(*pud
) + pmd_index(address
);
193 /* Find an entry in the third-level page table.. */
194 #define __pte_offset(address) \
195 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
196 #define pte_offset(dir, address) \
197 ((pte_t *) (pmd_page_kernel(*dir)) + __pte_offset(address))
198 #define pte_offset_kernel(dir, address) \
199 ((pte_t *) pmd_page_kernel(*(dir)) + __pte_offset(address))
200 #define pte_offset_map(dir, address) \
201 ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
202 #define pte_offset_map_nested(dir, address) \
203 ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
204 #define pte_unmap(pte) ((void)(pte))
205 #define pte_unmap_nested(pte) ((void)(pte))
208 * Initialize a new pgd / pmd table with invalid pointers.
210 extern void pgd_init(unsigned long page
);
211 extern void pmd_init(unsigned long page
, unsigned long pagetable
);
214 * Non-present pages: high 24 bits are offset, next 8 bits type,
217 static inline pte_t
mk_swap_pte(unsigned long type
, unsigned long offset
)
218 { pte_t pte
; pte_val(pte
) = (type
<< 32) | (offset
<< 40); return pte
; }
220 #define __swp_type(x) (((x).val >> 32) & 0xff)
221 #define __swp_offset(x) ((x).val >> 40)
222 #define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
223 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
224 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
227 * Bits 0, 4, 6, and 7 are taken. Let's leave bits 1, 2, 3, and 5 alone to
228 * make things easier, and only use the upper 56 bits for the page offset...
230 #define PTE_FILE_MAX_BITS 56
232 #define pte_to_pgoff(_pte) ((_pte).pte >> 8)
233 #define pgoff_to_pte(off) ((pte_t) { ((off) << 8) | _PAGE_FILE })
235 #endif /* _ASM_PGTABLE_64_H */