include/asm-parisc/tlbflush.h

   1 #ifndef _PARISC_TLBFLUSH_H
   2 #define _PARISC_TLBFLUSH_H
   3
   4 /* TLB flushing routines.... */
   5
   6 #include <linux/config.h>
   7 #include <linux/mm.h>
   8 #include <asm/mmu_context.h>
   9
  10
  11 /* This is for the serialisation of PxTLB broadcasts.  At least on the
  12  * N class systems, only one PxTLB inter processor broadcast can be
  13  * active at any one time on the Merced bus.  This tlb purge
  14  * synchronisation is fairly lightweight and harmless so we activate
  15  * it on all SMP systems not just the N class. */
  16 #ifdef CONFIG_SMP
  17 extern spinlock_t pa_tlb_lock;
  18
  19 #define purge_tlb_start(x) spin_lock(&pa_tlb_lock)
  20 #define purge_tlb_end(x) spin_unlock(&pa_tlb_lock)
  21
  22 #else
  23
  24 #define purge_tlb_start(x) do { } while(0)
  25 #define purge_tlb_end(x) do { } while (0)
  26
  27 #endif
  28
  29
  30 extern void flush_tlb_all(void);
  31
  32 /*
  33  * flush_tlb_mm()
  34  *
  35  * XXX This code is NOT valid for HP-UX compatibility processes,
  36  * (although it will probably work 99% of the time). HP-UX
  37  * processes are free to play with the space id's and save them
  38  * over long periods of time, etc. so we have to preserve the
  39  * space and just flush the entire tlb. We need to check the
  40  * personality in order to do that, but the personality is not
  41  * currently being set correctly.
  42  *
  43  * Of course, Linux processes could do the same thing, but
  44  * we don't support that (and the compilers, dynamic linker,
  45  * etc. do not do that).
  46  */
  47
  48 static inline void flush_tlb_mm(struct mm_struct *mm)
  49 {
  50         BUG_ON(mm == &init_mm); /* Should never happen */
  51
  52 #ifdef CONFIG_SMP
  53         flush_tlb_all();
  54 #else
  55         if (mm) {
  56                 if (mm->context != 0)
  57                         free_sid(mm->context);
  58                 mm->context = alloc_sid();
  59                 if (mm == current->active_mm)
  60                         load_context(mm->context);
  61         }
  62 #endif
  63 }
  64
  65 extern __inline__ void flush_tlb_pgtables(struct mm_struct *mm, unsigned long start, unsigned long end)
  66 {
  67 }
  68
  69 static inline void flush_tlb_page(struct vm_area_struct *vma,
  70         unsigned long addr)
  71 {
  72         /* For one page, it's not worth testing the split_tlb variable */
  73
  74         mb();
  75         mtsp(vma->vm_mm->context,1);
  76         purge_tlb_start();
  77         pdtlb(addr);
  78         pitlb(addr);
  79         purge_tlb_end();
  80 }
  81
  82 static inline void flush_tlb_range(struct vm_area_struct *vma,
  83         unsigned long start, unsigned long end)
  84 {
  85         unsigned long npages;
  86
  87         npages = ((end - (start & PAGE_MASK)) + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
  88         if (npages >= 512)  /* 2MB of space: arbitrary, should be tuned */
  89                 flush_tlb_all();
  90         else {
  91                 preempt_disable();
  92                 mtsp(vma->vm_mm->context,1);
  93                 purge_tlb_start();
  94                 if (split_tlb) {
  95                         while (npages--) {
  96                                 pdtlb(start);
  97                                 pitlb(start);
  98                                 start += PAGE_SIZE;
  99                         }
 100                 } else {
 101                         while (npages--) {
 102                                 pdtlb(start);
 103                                 start += PAGE_SIZE;
 104                         }
 105                 preempt_enable();
 106                 }
 107                 purge_tlb_end();
 108         }
 109 }
 110
 111 #define flush_tlb_kernel_range(start, end) flush_tlb_all()
 112
 113 #endif