]>
git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - include/asm-ppc64/system.h
1 #ifndef __PPC64_SYSTEM_H
2 #define __PPC64_SYSTEM_H
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
11 #include <linux/config.h>
12 #include <linux/compiler.h>
14 #include <asm/processor.h>
15 #include <asm/hw_irq.h>
16 #include <asm/memory.h>
20 * The sync instruction guarantees that all memory accesses initiated
21 * by this processor have been performed (with respect to all other
22 * mechanisms that access memory). The eieio instruction is a barrier
23 * providing an ordering (separately) for (a) cacheable stores and (b)
24 * loads and stores to non-cacheable memory (e.g. I/O devices).
26 * mb() prevents loads and stores being reordered across this point.
27 * rmb() prevents loads being reordered across this point.
28 * wmb() prevents stores being reordered across this point.
29 * read_barrier_depends() prevents data-dependent loads being reordered
30 * across this point (nop on PPC).
32 * We have to use the sync instructions for mb(), since lwsync doesn't
33 * order loads with respect to previous stores. Lwsync is fine for
35 * For wmb(), we use sync since wmb is used in drivers to order
36 * stores to system memory with respect to writes to the device.
37 * However, smp_wmb() can be a lighter-weight eieio barrier on
38 * SMP since it is only used to order updates to system memory.
40 #define mb() __asm__ __volatile__ ("sync" : : : "memory")
41 #define rmb() __asm__ __volatile__ ("lwsync" : : : "memory")
42 #define wmb() __asm__ __volatile__ ("sync" : : : "memory")
43 #define read_barrier_depends() do { } while(0)
45 #define set_mb(var, value) do { var = value; smp_mb(); } while (0)
46 #define set_wmb(var, value) do { var = value; smp_wmb(); } while (0)
50 #define smp_rmb() rmb()
51 #define smp_wmb() __asm__ __volatile__ ("eieio" : : : "memory")
52 #define smp_read_barrier_depends() read_barrier_depends()
54 #define smp_mb() __asm__ __volatile__("": : :"memory")
55 #define smp_rmb() __asm__ __volatile__("": : :"memory")
56 #define smp_wmb() __asm__ __volatile__("": : :"memory")
57 #define smp_read_barrier_depends() do { } while(0)
58 #endif /* CONFIG_SMP */
64 #ifdef CONFIG_DEBUGGER
66 extern int (*__debugger
)(struct pt_regs
*regs
);
67 extern int (*__debugger_ipi
)(struct pt_regs
*regs
);
68 extern int (*__debugger_bpt
)(struct pt_regs
*regs
);
69 extern int (*__debugger_sstep
)(struct pt_regs
*regs
);
70 extern int (*__debugger_iabr_match
)(struct pt_regs
*regs
);
71 extern int (*__debugger_dabr_match
)(struct pt_regs
*regs
);
72 extern int (*__debugger_fault_handler
)(struct pt_regs
*regs
);
74 #define DEBUGGER_BOILERPLATE(__NAME) \
75 static inline int __NAME(struct pt_regs *regs) \
77 if (unlikely(__ ## __NAME)) \
78 return __ ## __NAME(regs); \
82 DEBUGGER_BOILERPLATE(debugger
)
83 DEBUGGER_BOILERPLATE(debugger_ipi
)
84 DEBUGGER_BOILERPLATE(debugger_bpt
)
85 DEBUGGER_BOILERPLATE(debugger_sstep
)
86 DEBUGGER_BOILERPLATE(debugger_iabr_match
)
87 DEBUGGER_BOILERPLATE(debugger_dabr_match
)
88 DEBUGGER_BOILERPLATE(debugger_fault_handler
)
91 extern void xmon_init(void);
95 static inline int debugger(struct pt_regs
*regs
) { return 0; }
96 static inline int debugger_ipi(struct pt_regs
*regs
) { return 0; }
97 static inline int debugger_bpt(struct pt_regs
*regs
) { return 0; }
98 static inline int debugger_sstep(struct pt_regs
*regs
) { return 0; }
99 static inline int debugger_iabr_match(struct pt_regs
*regs
) { return 0; }
100 static inline int debugger_dabr_match(struct pt_regs
*regs
) { return 0; }
101 static inline int debugger_fault_handler(struct pt_regs
*regs
) { return 0; }
104 extern int fix_alignment(struct pt_regs
*regs
);
105 extern void bad_page_fault(struct pt_regs
*regs
, unsigned long address
,
107 extern void show_regs(struct pt_regs
* regs
);
108 extern void low_hash_fault(struct pt_regs
*regs
, unsigned long address
);
109 extern int die(const char *str
, struct pt_regs
*regs
, long err
);
111 extern int _get_PVR(void);
112 extern void giveup_fpu(struct task_struct
*);
113 extern void disable_kernel_fp(void);
114 extern void flush_fp_to_thread(struct task_struct
*);
115 extern void enable_kernel_fp(void);
116 extern void giveup_altivec(struct task_struct
*);
117 extern void disable_kernel_altivec(void);
118 extern void enable_kernel_altivec(void);
119 extern int emulate_altivec(struct pt_regs
*);
120 extern void cvt_fd(float *from
, double *to
, unsigned long *fpscr
);
121 extern void cvt_df(double *from
, float *to
, unsigned long *fpscr
);
123 #ifdef CONFIG_ALTIVEC
124 extern void flush_altivec_to_thread(struct task_struct
*);
126 static inline void flush_altivec_to_thread(struct task_struct
*t
)
131 extern int mem_init_done
; /* set on boot once kmalloc can be called */
133 /* EBCDIC -> ASCII conversion for [0-9A-Z] on iSeries */
134 extern unsigned char e2a(unsigned char);
136 extern struct task_struct
*__switch_to(struct task_struct
*,
137 struct task_struct
*);
138 #define switch_to(prev, next, last) ((last) = __switch_to((prev), (next)))
140 struct thread_struct
;
141 extern struct task_struct
* _switch(struct thread_struct
*prev
,
142 struct thread_struct
*next
);
144 static inline int __is_processor(unsigned long pv
)
147 asm("mfspr %0, 0x11F" : "=r" (pvr
));
148 return(PVR_VER(pvr
) == pv
);
154 * Changes the memory location '*ptr' to be val and returns
155 * the previous value stored there.
157 * Inline asm pulled from arch/ppc/kernel/misc.S so ppc64
158 * is more like most of the other architectures.
160 static __inline__
unsigned long
161 __xchg_u32(volatile int *m
, unsigned long val
)
165 __asm__
__volatile__(
167 "1: lwarx %0,0,%3 # __xchg_u32\n\
171 : "=&r" (dummy
), "=m" (*m
)
178 static __inline__
unsigned long
179 __xchg_u64(volatile long *m
, unsigned long val
)
183 __asm__
__volatile__(
185 "1: ldarx %0,0,%3 # __xchg_u64\n\
189 : "=&r" (dummy
), "=m" (*m
)
197 * This function doesn't exist, so you'll get a linker error
198 * if something tries to do an invalid xchg().
200 extern void __xchg_called_with_bad_pointer(void);
202 static __inline__
unsigned long
203 __xchg(volatile void *ptr
, unsigned long x
, int size
)
207 return __xchg_u32(ptr
, x
);
209 return __xchg_u64(ptr
, x
);
211 __xchg_called_with_bad_pointer();
215 #define xchg(ptr,x) \
217 __typeof__(*(ptr)) _x_ = (x); \
218 (__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, sizeof(*(ptr))); \
221 #define tas(ptr) (xchg((ptr),1))
223 #define __HAVE_ARCH_CMPXCHG 1
225 static __inline__
unsigned long
226 __cmpxchg_u32(volatile int *p
, int old
, int new)
230 __asm__
__volatile__ (
232 "1: lwarx %0,0,%2 # __cmpxchg_u32\n\
240 : "=&r" (prev
), "=m" (*p
)
241 : "r" (p
), "r" (old
), "r" (new), "m" (*p
)
247 static __inline__
unsigned long
248 __cmpxchg_u64(volatile long *p
, unsigned long old
, unsigned long new)
252 __asm__
__volatile__ (
254 "1: ldarx %0,0,%2 # __cmpxchg_u64\n\
262 : "=&r" (prev
), "=m" (*p
)
263 : "r" (p
), "r" (old
), "r" (new), "m" (*p
)
269 /* This function doesn't exist, so you'll get a linker error
270 if something tries to do an invalid cmpxchg(). */
271 extern void __cmpxchg_called_with_bad_pointer(void);
273 static __inline__
unsigned long
274 __cmpxchg(volatile void *ptr
, unsigned long old
, unsigned long new, int size
)
278 return __cmpxchg_u32(ptr
, old
, new);
280 return __cmpxchg_u64(ptr
, old
, new);
282 __cmpxchg_called_with_bad_pointer();
286 #define cmpxchg(ptr,o,n) \
288 __typeof__(*(ptr)) _o_ = (o); \
289 __typeof__(*(ptr)) _n_ = (n); \
290 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
291 (unsigned long)_n_, sizeof(*(ptr))); \
295 * We handle most unaligned accesses in hardware. On the other hand
296 * unaligned DMA can be very expensive on some ppc64 IO chips (it does
297 * powers of 2 writes until it reaches sufficient alignment).
299 * Based on this we disable the IP header alignment in network drivers.
301 #define NET_IP_ALIGN 0
303 #define arch_align_stack(x) (x)
305 #endif /* __KERNEL__ */