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5 * include/asm-s390/bitops.h
8 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
9 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
11 * Derived from "include/asm-i386/bitops.h"
12 * Copyright (C) 1992, Linus Torvalds
15 #include <linux/config.h>
16 #include <linux/compiler.h>
19 * 32 bit bitops format:
20 * bit 0 is the LSB of *addr; bit 31 is the MSB of *addr;
21 * bit 32 is the LSB of *(addr+4). That combined with the
22 * big endian byte order on S390 give the following bit
24 * 1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10 \
25 * 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00
26 * after that follows the next long with bit numbers
27 * 3f 3e 3d 3c 3b 3a 39 38 37 36 35 34 33 32 31 30
28 * 2f 2e 2d 2c 2b 2a 29 28 27 26 25 24 23 22 21 20
29 * The reason for this bit ordering is the fact that
30 * in the architecture independent code bits operations
31 * of the form "flags |= (1 << bitnr)" are used INTERMIXED
32 * with operation of the form "set_bit(bitnr, flags)".
34 * 64 bit bitops format:
35 * bit 0 is the LSB of *addr; bit 63 is the MSB of *addr;
36 * bit 64 is the LSB of *(addr+8). That combined with the
37 * big endian byte order on S390 give the following bit
39 * 3f 3e 3d 3c 3b 3a 39 38 37 36 35 34 33 32 31 30
40 * 2f 2e 2d 2c 2b 2a 29 28 27 26 25 24 23 22 21 20
41 * 1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10
42 * 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00
43 * after that follows the next long with bit numbers
44 * 7f 7e 7d 7c 7b 7a 79 78 77 76 75 74 73 72 71 70
45 * 6f 6e 6d 6c 6b 6a 69 68 67 66 65 64 63 62 61 60
46 * 5f 5e 5d 5c 5b 5a 59 58 57 56 55 54 53 52 51 50
47 * 4f 4e 4d 4c 4b 4a 49 48 47 46 45 44 43 42 41 40
48 * The reason for this bit ordering is the fact that
49 * in the architecture independent code bits operations
50 * of the form "flags |= (1 << bitnr)" are used INTERMIXED
51 * with operation of the form "set_bit(bitnr, flags)".
54 /* set ALIGN_CS to 1 if the SMP safe bit operations should
55 * align the address to 4 byte boundary. It seems to work
56 * without the alignment.
63 #error "bitops won't work without CONFIG_SMP"
67 /* bitmap tables from arch/S390/kernel/bitmap.S */
68 extern const char _oi_bitmap
[];
69 extern const char _ni_bitmap
[];
70 extern const char _zb_findmap
[];
71 extern const char _sb_findmap
[];
75 #define __BITOPS_ALIGN 3
76 #define __BITOPS_WORDSIZE 32
77 #define __BITOPS_OR "or"
78 #define __BITOPS_AND "nr"
79 #define __BITOPS_XOR "xr"
81 #define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
82 __asm__ __volatile__(" l %0,0(%4)\n" \
84 __op_string " %1,%3\n" \
87 : "=&d" (__old), "=&d" (__new), \
88 "=m" (*(unsigned long *) __addr) \
89 : "d" (__val), "a" (__addr), \
90 "m" (*(unsigned long *) __addr) : "cc" );
94 #define __BITOPS_ALIGN 7
95 #define __BITOPS_WORDSIZE 64
96 #define __BITOPS_OR "ogr"
97 #define __BITOPS_AND "ngr"
98 #define __BITOPS_XOR "xgr"
100 #define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
101 __asm__ __volatile__(" lg %0,0(%4)\n" \
103 __op_string " %1,%3\n" \
104 " csg %0,%1,0(%4)\n" \
106 : "=&d" (__old), "=&d" (__new), \
107 "=m" (*(unsigned long *) __addr) \
108 : "d" (__val), "a" (__addr), \
109 "m" (*(unsigned long *) __addr) : "cc" );
111 #endif /* __s390x__ */
113 #define __BITOPS_WORDS(bits) (((bits)+__BITOPS_WORDSIZE-1)/__BITOPS_WORDSIZE)
114 #define __BITOPS_BARRIER() __asm__ __volatile__ ( "" : : : "memory" )
118 * SMP safe set_bit routine based on compare and swap (CS)
120 static inline void set_bit_cs(unsigned long nr
, volatile unsigned long *ptr
)
122 unsigned long addr
, old
, new, mask
;
124 addr
= (unsigned long) ptr
;
126 nr
+= (addr
& __BITOPS_ALIGN
) << 3; /* add alignment to bit number */
127 addr
^= addr
& __BITOPS_ALIGN
; /* align address to 8 */
129 /* calculate address for CS */
130 addr
+= (nr
^ (nr
& (__BITOPS_WORDSIZE
- 1))) >> 3;
132 mask
= 1UL << (nr
& (__BITOPS_WORDSIZE
- 1));
133 /* Do the atomic update. */
134 __BITOPS_LOOP(old
, new, addr
, mask
, __BITOPS_OR
);
138 * SMP safe clear_bit routine based on compare and swap (CS)
140 static inline void clear_bit_cs(unsigned long nr
, volatile unsigned long *ptr
)
142 unsigned long addr
, old
, new, mask
;
144 addr
= (unsigned long) ptr
;
146 nr
+= (addr
& __BITOPS_ALIGN
) << 3; /* add alignment to bit number */
147 addr
^= addr
& __BITOPS_ALIGN
; /* align address to 8 */
149 /* calculate address for CS */
150 addr
+= (nr
^ (nr
& (__BITOPS_WORDSIZE
- 1))) >> 3;
152 mask
= ~(1UL << (nr
& (__BITOPS_WORDSIZE
- 1)));
153 /* Do the atomic update. */
154 __BITOPS_LOOP(old
, new, addr
, mask
, __BITOPS_AND
);
158 * SMP safe change_bit routine based on compare and swap (CS)
160 static inline void change_bit_cs(unsigned long nr
, volatile unsigned long *ptr
)
162 unsigned long addr
, old
, new, mask
;
164 addr
= (unsigned long) ptr
;
166 nr
+= (addr
& __BITOPS_ALIGN
) << 3; /* add alignment to bit number */
167 addr
^= addr
& __BITOPS_ALIGN
; /* align address to 8 */
169 /* calculate address for CS */
170 addr
+= (nr
^ (nr
& (__BITOPS_WORDSIZE
- 1))) >> 3;
172 mask
= 1UL << (nr
& (__BITOPS_WORDSIZE
- 1));
173 /* Do the atomic update. */
174 __BITOPS_LOOP(old
, new, addr
, mask
, __BITOPS_XOR
);
178 * SMP safe test_and_set_bit routine based on compare and swap (CS)
181 test_and_set_bit_cs(unsigned long nr
, volatile unsigned long *ptr
)
183 unsigned long addr
, old
, new, mask
;
185 addr
= (unsigned long) ptr
;
187 nr
+= (addr
& __BITOPS_ALIGN
) << 3; /* add alignment to bit number */
188 addr
^= addr
& __BITOPS_ALIGN
; /* align address to 8 */
190 /* calculate address for CS */
191 addr
+= (nr
^ (nr
& (__BITOPS_WORDSIZE
- 1))) >> 3;
192 /* make OR/test mask */
193 mask
= 1UL << (nr
& (__BITOPS_WORDSIZE
- 1));
194 /* Do the atomic update. */
195 __BITOPS_LOOP(old
, new, addr
, mask
, __BITOPS_OR
);
197 return (old
& mask
) != 0;
201 * SMP safe test_and_clear_bit routine based on compare and swap (CS)
204 test_and_clear_bit_cs(unsigned long nr
, volatile unsigned long *ptr
)
206 unsigned long addr
, old
, new, mask
;
208 addr
= (unsigned long) ptr
;
210 nr
+= (addr
& __BITOPS_ALIGN
) << 3; /* add alignment to bit number */
211 addr
^= addr
& __BITOPS_ALIGN
; /* align address to 8 */
213 /* calculate address for CS */
214 addr
+= (nr
^ (nr
& (__BITOPS_WORDSIZE
- 1))) >> 3;
215 /* make AND/test mask */
216 mask
= ~(1UL << (nr
& (__BITOPS_WORDSIZE
- 1)));
217 /* Do the atomic update. */
218 __BITOPS_LOOP(old
, new, addr
, mask
, __BITOPS_AND
);
220 return (old
^ new) != 0;
224 * SMP safe test_and_change_bit routine based on compare and swap (CS)
227 test_and_change_bit_cs(unsigned long nr
, volatile unsigned long *ptr
)
229 unsigned long addr
, old
, new, mask
;
231 addr
= (unsigned long) ptr
;
233 nr
+= (addr
& __BITOPS_ALIGN
) << 3; /* add alignment to bit number */
234 addr
^= addr
& __BITOPS_ALIGN
; /* align address to 8 */
236 /* calculate address for CS */
237 addr
+= (nr
^ (nr
& (__BITOPS_WORDSIZE
- 1))) >> 3;
238 /* make XOR/test mask */
239 mask
= 1UL << (nr
& (__BITOPS_WORDSIZE
- 1));
240 /* Do the atomic update. */
241 __BITOPS_LOOP(old
, new, addr
, mask
, __BITOPS_XOR
);
243 return (old
& mask
) != 0;
245 #endif /* CONFIG_SMP */
248 * fast, non-SMP set_bit routine
250 static inline void __set_bit(unsigned long nr
, volatile unsigned long *ptr
)
254 addr
= (unsigned long) ptr
+ ((nr
^ (__BITOPS_WORDSIZE
- 8)) >> 3);
255 asm volatile("oc 0(1,%1),0(%2)"
256 : "=m" (*(char *) addr
)
257 : "a" (addr
), "a" (_oi_bitmap
+ (nr
& 7)),
258 "m" (*(char *) addr
) : "cc" );
262 __constant_set_bit(const unsigned long nr
, volatile unsigned long *ptr
)
266 addr
= ((unsigned long) ptr
) + ((nr
^ (__BITOPS_WORDSIZE
- 8)) >> 3);
269 asm volatile ("oi 0(%1),0x01" : "=m" (*(char *) addr
)
270 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
273 asm volatile ("oi 0(%1),0x02" : "=m" (*(char *) addr
)
274 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
277 asm volatile ("oi 0(%1),0x04" : "=m" (*(char *) addr
)
278 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
281 asm volatile ("oi 0(%1),0x08" : "=m" (*(char *) addr
)
282 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
285 asm volatile ("oi 0(%1),0x10" : "=m" (*(char *) addr
)
286 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
289 asm volatile ("oi 0(%1),0x20" : "=m" (*(char *) addr
)
290 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
293 asm volatile ("oi 0(%1),0x40" : "=m" (*(char *) addr
)
294 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
297 asm volatile ("oi 0(%1),0x80" : "=m" (*(char *) addr
)
298 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
303 #define set_bit_simple(nr,addr) \
304 (__builtin_constant_p((nr)) ? \
305 __constant_set_bit((nr),(addr)) : \
306 __set_bit((nr),(addr)) )
309 * fast, non-SMP clear_bit routine
312 __clear_bit(unsigned long nr
, volatile unsigned long *ptr
)
316 addr
= (unsigned long) ptr
+ ((nr
^ (__BITOPS_WORDSIZE
- 8)) >> 3);
317 asm volatile("nc 0(1,%1),0(%2)"
318 : "=m" (*(char *) addr
)
319 : "a" (addr
), "a" (_ni_bitmap
+ (nr
& 7)),
320 "m" (*(char *) addr
) : "cc" );
324 __constant_clear_bit(const unsigned long nr
, volatile unsigned long *ptr
)
328 addr
= ((unsigned long) ptr
) + ((nr
^ (__BITOPS_WORDSIZE
- 8)) >> 3);
331 asm volatile ("ni 0(%1),0xFE" : "=m" (*(char *) addr
)
332 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
335 asm volatile ("ni 0(%1),0xFD": "=m" (*(char *) addr
)
336 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
339 asm volatile ("ni 0(%1),0xFB" : "=m" (*(char *) addr
)
340 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
343 asm volatile ("ni 0(%1),0xF7" : "=m" (*(char *) addr
)
344 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
347 asm volatile ("ni 0(%1),0xEF" : "=m" (*(char *) addr
)
348 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
351 asm volatile ("ni 0(%1),0xDF" : "=m" (*(char *) addr
)
352 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
355 asm volatile ("ni 0(%1),0xBF" : "=m" (*(char *) addr
)
356 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
359 asm volatile ("ni 0(%1),0x7F" : "=m" (*(char *) addr
)
360 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
365 #define clear_bit_simple(nr,addr) \
366 (__builtin_constant_p((nr)) ? \
367 __constant_clear_bit((nr),(addr)) : \
368 __clear_bit((nr),(addr)) )
371 * fast, non-SMP change_bit routine
373 static inline void __change_bit(unsigned long nr
, volatile unsigned long *ptr
)
377 addr
= (unsigned long) ptr
+ ((nr
^ (__BITOPS_WORDSIZE
- 8)) >> 3);
378 asm volatile("xc 0(1,%1),0(%2)"
379 : "=m" (*(char *) addr
)
380 : "a" (addr
), "a" (_oi_bitmap
+ (nr
& 7)),
381 "m" (*(char *) addr
) : "cc" );
385 __constant_change_bit(const unsigned long nr
, volatile unsigned long *ptr
)
389 addr
= ((unsigned long) ptr
) + ((nr
^ (__BITOPS_WORDSIZE
- 8)) >> 3);
392 asm volatile ("xi 0(%1),0x01" : "=m" (*(char *) addr
)
393 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
396 asm volatile ("xi 0(%1),0x02" : "=m" (*(char *) addr
)
397 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
400 asm volatile ("xi 0(%1),0x04" : "=m" (*(char *) addr
)
401 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
404 asm volatile ("xi 0(%1),0x08" : "=m" (*(char *) addr
)
405 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
408 asm volatile ("xi 0(%1),0x10" : "=m" (*(char *) addr
)
409 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
412 asm volatile ("xi 0(%1),0x20" : "=m" (*(char *) addr
)
413 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
416 asm volatile ("xi 0(%1),0x40" : "=m" (*(char *) addr
)
417 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
420 asm volatile ("xi 0(%1),0x80" : "=m" (*(char *) addr
)
421 : "a" (addr
), "m" (*(char *) addr
) : "cc" );
426 #define change_bit_simple(nr,addr) \
427 (__builtin_constant_p((nr)) ? \
428 __constant_change_bit((nr),(addr)) : \
429 __change_bit((nr),(addr)) )
432 * fast, non-SMP test_and_set_bit routine
435 test_and_set_bit_simple(unsigned long nr
, volatile unsigned long *ptr
)
440 addr
= (unsigned long) ptr
+ ((nr
^ (__BITOPS_WORDSIZE
- 8)) >> 3);
441 ch
= *(unsigned char *) addr
;
442 asm volatile("oc 0(1,%1),0(%2)"
443 : "=m" (*(char *) addr
)
444 : "a" (addr
), "a" (_oi_bitmap
+ (nr
& 7)),
445 "m" (*(char *) addr
) : "cc", "memory" );
446 return (ch
>> (nr
& 7)) & 1;
448 #define __test_and_set_bit(X,Y) test_and_set_bit_simple(X,Y)
451 * fast, non-SMP test_and_clear_bit routine
454 test_and_clear_bit_simple(unsigned long nr
, volatile unsigned long *ptr
)
459 addr
= (unsigned long) ptr
+ ((nr
^ (__BITOPS_WORDSIZE
- 8)) >> 3);
460 ch
= *(unsigned char *) addr
;
461 asm volatile("nc 0(1,%1),0(%2)"
462 : "=m" (*(char *) addr
)
463 : "a" (addr
), "a" (_ni_bitmap
+ (nr
& 7)),
464 "m" (*(char *) addr
) : "cc", "memory" );
465 return (ch
>> (nr
& 7)) & 1;
467 #define __test_and_clear_bit(X,Y) test_and_clear_bit_simple(X,Y)
470 * fast, non-SMP test_and_change_bit routine
473 test_and_change_bit_simple(unsigned long nr
, volatile unsigned long *ptr
)
478 addr
= (unsigned long) ptr
+ ((nr
^ (__BITOPS_WORDSIZE
- 8)) >> 3);
479 ch
= *(unsigned char *) addr
;
480 asm volatile("xc 0(1,%1),0(%2)"
481 : "=m" (*(char *) addr
)
482 : "a" (addr
), "a" (_oi_bitmap
+ (nr
& 7)),
483 "m" (*(char *) addr
) : "cc", "memory" );
484 return (ch
>> (nr
& 7)) & 1;
486 #define __test_and_change_bit(X,Y) test_and_change_bit_simple(X,Y)
489 #define set_bit set_bit_cs
490 #define clear_bit clear_bit_cs
491 #define change_bit change_bit_cs
492 #define test_and_set_bit test_and_set_bit_cs
493 #define test_and_clear_bit test_and_clear_bit_cs
494 #define test_and_change_bit test_and_change_bit_cs
496 #define set_bit set_bit_simple
497 #define clear_bit clear_bit_simple
498 #define change_bit change_bit_simple
499 #define test_and_set_bit test_and_set_bit_simple
500 #define test_and_clear_bit test_and_clear_bit_simple
501 #define test_and_change_bit test_and_change_bit_simple
506 * This routine doesn't need to be atomic.
509 static inline int __test_bit(unsigned long nr
, const volatile unsigned long *ptr
)
514 addr
= (unsigned long) ptr
+ ((nr
^ (__BITOPS_WORDSIZE
- 8)) >> 3);
515 ch
= *(volatile unsigned char *) addr
;
516 return (ch
>> (nr
& 7)) & 1;
520 __constant_test_bit(unsigned long nr
, const volatile unsigned long *addr
) {
521 return (((volatile char *) addr
)
522 [(nr
^(__BITOPS_WORDSIZE
-8))>>3] & (1<<(nr
&7)));
525 #define test_bit(nr,addr) \
526 (__builtin_constant_p((nr)) ? \
527 __constant_test_bit((nr),(addr)) : \
528 __test_bit((nr),(addr)) )
531 * ffz = Find First Zero in word. Undefined if no zero exists,
532 * so code should check against ~0UL first..
534 static inline unsigned long ffz(unsigned long word
)
536 unsigned long bit
= 0;
539 if (likely((word
& 0xffffffff) == 0xffffffff)) {
544 if (likely((word
& 0xffff) == 0xffff)) {
548 if (likely((word
& 0xff) == 0xff)) {
552 return bit
+ _zb_findmap
[word
& 0xff];
556 * __ffs = find first bit in word. Undefined if no bit exists,
557 * so code should check against 0UL first..
559 static inline unsigned long __ffs (unsigned long word
)
561 unsigned long bit
= 0;
564 if (likely((word
& 0xffffffff) == 0)) {
569 if (likely((word
& 0xffff) == 0)) {
573 if (likely((word
& 0xff) == 0)) {
577 return bit
+ _sb_findmap
[word
& 0xff];
581 * Find-bit routines..
587 find_first_zero_bit(const unsigned long * addr
, unsigned long size
)
589 typedef struct { long _
[__BITOPS_WORDS(size
)]; } addrtype
;
590 unsigned long cmp
, count
;
595 __asm__(" lhi %1,-1\n"
621 : "=&a" (res
), "=&d" (cmp
), "=&a" (count
)
622 : "a" (size
), "a" (addr
), "a" (&_zb_findmap
),
623 "m" (*(addrtype
*) addr
) : "cc" );
624 return (res
< size
) ? res
: size
;
628 find_first_bit(const unsigned long * addr
, unsigned long size
)
630 typedef struct { long _
[__BITOPS_WORDS(size
)]; } addrtype
;
631 unsigned long cmp
, count
;
636 __asm__(" slr %1,%1\n"
662 : "=&a" (res
), "=&d" (cmp
), "=&a" (count
)
663 : "a" (size
), "a" (addr
), "a" (&_sb_findmap
),
664 "m" (*(addrtype
*) addr
) : "cc" );
665 return (res
< size
) ? res
: size
;
668 #else /* __s390x__ */
670 static inline unsigned long
671 find_first_zero_bit(const unsigned long * addr
, unsigned long size
)
673 typedef struct { long _
[__BITOPS_WORDS(size
)]; } addrtype
;
674 unsigned long res
, cmp
, count
;
678 __asm__(" lghi %1,-1\n"
683 "0: cg %1,0(%0,%4)\n"
689 "1: lg %2,0(%0,%4)\n"
700 "3: tmll %2,0x00ff\n"
708 : "=&a" (res
), "=&d" (cmp
), "=&a" (count
)
709 : "a" (size
), "a" (addr
), "a" (&_zb_findmap
),
710 "m" (*(addrtype
*) addr
) : "cc" );
711 return (res
< size
) ? res
: size
;
714 static inline unsigned long
715 find_first_bit(const unsigned long * addr
, unsigned long size
)
717 typedef struct { long _
[__BITOPS_WORDS(size
)]; } addrtype
;
718 unsigned long res
, cmp
, count
;
722 __asm__(" slgr %1,%1\n"
727 "0: cg %1,0(%0,%4)\n"
733 "1: lg %2,0(%0,%4)\n"
744 "3: tmll %2,0x00ff\n"
752 : "=&a" (res
), "=&d" (cmp
), "=&a" (count
)
753 : "a" (size
), "a" (addr
), "a" (&_sb_findmap
),
754 "m" (*(addrtype
*) addr
) : "cc" );
755 return (res
< size
) ? res
: size
;
758 #endif /* __s390x__ */
761 find_next_zero_bit (const unsigned long * addr
, unsigned long size
,
762 unsigned long offset
)
764 const unsigned long *p
;
765 unsigned long bit
, set
;
769 bit
= offset
& (__BITOPS_WORDSIZE
- 1);
772 p
= addr
+ offset
/ __BITOPS_WORDSIZE
;
775 * s390 version of ffz returns __BITOPS_WORDSIZE
776 * if no zero bit is present in the word.
778 set
= ffz(*p
>> bit
) + bit
;
780 return size
+ offset
;
781 if (set
< __BITOPS_WORDSIZE
)
783 offset
+= __BITOPS_WORDSIZE
;
784 size
-= __BITOPS_WORDSIZE
;
787 return offset
+ find_first_zero_bit(p
, size
);
791 find_next_bit (const unsigned long * addr
, unsigned long size
,
792 unsigned long offset
)
794 const unsigned long *p
;
795 unsigned long bit
, set
;
799 bit
= offset
& (__BITOPS_WORDSIZE
- 1);
802 p
= addr
+ offset
/ __BITOPS_WORDSIZE
;
805 * s390 version of __ffs returns __BITOPS_WORDSIZE
806 * if no one bit is present in the word.
808 set
= __ffs(*p
& (~0UL << bit
));
810 return size
+ offset
;
811 if (set
< __BITOPS_WORDSIZE
)
813 offset
+= __BITOPS_WORDSIZE
;
814 size
-= __BITOPS_WORDSIZE
;
817 return offset
+ find_first_bit(p
, size
);
821 * Every architecture must define this function. It's the fastest
822 * way of searching a 140-bit bitmap where the first 100 bits are
823 * unlikely to be set. It's guaranteed that at least one of the 140
826 static inline int sched_find_first_bit(unsigned long *b
)
828 return find_first_bit(b
, 140);
832 * ffs: find first bit set. This is defined the same way as
833 * the libc and compiler builtin ffs routines, therefore
834 * differs in spirit from the above ffz (man ffs).
836 #define ffs(x) generic_ffs(x)
839 * fls: find last bit set.
841 #define fls(x) generic_fls(x)
844 * hweightN: returns the hamming weight (i.e. the number
845 * of bits set) of a N-bit word
847 #define hweight64(x) \
849 unsigned long __x = (x); \
851 __w = generic_hweight32((unsigned int) __x); \
852 __w += generic_hweight32((unsigned int) (__x>>32)); \
855 #define hweight32(x) generic_hweight32(x)
856 #define hweight16(x) generic_hweight16(x)
857 #define hweight8(x) generic_hweight8(x)
863 * ATTENTION: intel byte ordering convention for ext2 and minix !!
864 * bit 0 is the LSB of addr; bit 31 is the MSB of addr;
865 * bit 32 is the LSB of (addr+4).
866 * That combined with the little endian byte order of Intel gives the
867 * following bit order in memory:
868 * 07 06 05 04 03 02 01 00 15 14 13 12 11 10 09 08 \
869 * 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
872 #define ext2_set_bit(nr, addr) \
873 test_and_set_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
874 #define ext2_set_bit_atomic(lock, nr, addr) \
875 test_and_set_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
876 #define ext2_clear_bit(nr, addr) \
877 test_and_clear_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
878 #define ext2_clear_bit_atomic(lock, nr, addr) \
879 test_and_clear_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
880 #define ext2_test_bit(nr, addr) \
881 test_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
886 ext2_find_first_zero_bit(void *vaddr
, unsigned int size
)
888 typedef struct { long _
[__BITOPS_WORDS(size
)]; } addrtype
;
889 unsigned long cmp
, count
;
894 __asm__(" lhi %1,-1\n"
899 "0: cl %1,0(%0,%4)\n"
921 : "=&a" (res
), "=&d" (cmp
), "=&a" (count
)
922 : "a" (size
), "a" (vaddr
), "a" (&_zb_findmap
),
923 "m" (*(addrtype
*) vaddr
) : "cc" );
924 return (res
< size
) ? res
: size
;
927 #else /* __s390x__ */
929 static inline unsigned long
930 ext2_find_first_zero_bit(void *vaddr
, unsigned long size
)
932 typedef struct { long _
[__BITOPS_WORDS(size
)]; } addrtype
;
933 unsigned long res
, cmp
, count
;
937 __asm__(" lghi %1,-1\n"
942 "0: clg %1,0(%0,%4)\n"
948 "1: cl %1,0(%0,%4)\n"
959 "3: tmll %2,0xff00\n"
967 : "=&a" (res
), "=&d" (cmp
), "=&a" (count
)
968 : "a" (size
), "a" (vaddr
), "a" (&_zb_findmap
),
969 "m" (*(addrtype
*) vaddr
) : "cc" );
970 return (res
< size
) ? res
: size
;
973 #endif /* __s390x__ */
976 ext2_find_next_zero_bit(void *vaddr
, unsigned long size
, unsigned long offset
)
978 unsigned long *addr
= vaddr
, *p
;
979 unsigned long word
, bit
, set
;
983 bit
= offset
& (__BITOPS_WORDSIZE
- 1);
986 p
= addr
+ offset
/ __BITOPS_WORDSIZE
;
993 : "=&a" (word
) : "a" (p
), "m" (*p
) : "cc" );
995 asm(" lrvg %0,%1" : "=a" (word
) : "m" (*p
) );
998 * s390 version of ffz returns __BITOPS_WORDSIZE
999 * if no zero bit is present in the word.
1001 set
= ffz(word
>> bit
) + bit
;
1003 return size
+ offset
;
1004 if (set
< __BITOPS_WORDSIZE
)
1005 return set
+ offset
;
1006 offset
+= __BITOPS_WORDSIZE
;
1007 size
-= __BITOPS_WORDSIZE
;
1010 return offset
+ ext2_find_first_zero_bit(p
, size
);
1013 /* Bitmap functions for the minix filesystem. */
1015 #define minix_test_and_set_bit(nr,addr) \
1016 test_and_set_bit(nr,(unsigned long *)addr)
1017 #define minix_set_bit(nr,addr) \
1018 set_bit(nr,(unsigned long *)addr)
1019 #define minix_test_and_clear_bit(nr,addr) \
1020 test_and_clear_bit(nr,(unsigned long *)addr)
1021 #define minix_test_bit(nr,addr) \
1022 test_bit(nr,(unsigned long *)addr)
1023 #define minix_find_first_zero_bit(addr,size) \
1024 find_first_zero_bit(addr,size)
1026 #endif /* __KERNEL__ */
1028 #endif /* _S390_BITOPS_H */