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git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - include/asm-sh/irq-sh73180.h
1 #ifndef __ASM_SH_IRQ_SH73180_H
2 #define __ASM_SH_IRQ_SH73180_H
5 * linux/include/asm-sh/irq-sh73180.h
7 * Copyright (C) 2004 Takashi SHUDO <shudo@hitachi-ul.co.jp>
41 #define INTC_IPRA 0xA4080000UL
42 #define INTC_IPRB 0xA4080004UL
43 #define INTC_IPRC 0xA4080008UL
44 #define INTC_IPRD 0xA408000CUL
45 #define INTC_IPRE 0xA4080010UL
46 #define INTC_IPRF 0xA4080014UL
47 #define INTC_IPRG 0xA4080018UL
48 #define INTC_IPRH 0xA408001CUL
49 #define INTC_IPRI 0xA4080020UL
50 #define INTC_IPRJ 0xA4080024UL
51 #define INTC_IPRK 0xA4080028UL
53 #define INTC_IMR0 0xA4080080UL
54 #define INTC_IMR1 0xA4080084UL
55 #define INTC_IMR2 0xA4080088UL
56 #define INTC_IMR3 0xA408008CUL
57 #define INTC_IMR4 0xA4080090UL
58 #define INTC_IMR5 0xA4080094UL
59 #define INTC_IMR6 0xA4080098UL
60 #define INTC_IMR7 0xA408009CUL
61 #define INTC_IMR8 0xA40800A0UL
62 #define INTC_IMR9 0xA40800A4UL
63 #define INTC_IMR10 0xA40800A8UL
64 #define INTC_IMR11 0xA40800ACUL
66 #define INTC_IMCR0 0xA40800C0UL
67 #define INTC_IMCR1 0xA40800C4UL
68 #define INTC_IMCR2 0xA40800C8UL
69 #define INTC_IMCR3 0xA40800CCUL
70 #define INTC_IMCR4 0xA40800D0UL
71 #define INTC_IMCR5 0xA40800D4UL
72 #define INTC_IMCR6 0xA40800D8UL
73 #define INTC_IMCR7 0xA40800DCUL
74 #define INTC_IMCR8 0xA40800E0UL
75 #define INTC_IMCR9 0xA40800E4UL
76 #define INTC_IMCR10 0xA40800E8UL
77 #define INTC_IMCR11 0xA40800ECUL
79 #define INTC_ICR0 0xA4140000UL
80 #define INTC_ICR1 0xA414001CUL
82 #define INTMSK0 0xa4140044
83 #define INTMSKCLR0 0xa4140064
84 #define INTC_INTPRI0 0xa4140010
89 *_IRQ = (INTEVT2 - 0x200)/0x20
94 #define TMU0_IPR_ADDR INTC_IPRA
95 #define TMU0_IPR_POS 3
96 #define TMU0_PRIORITY 2
99 #define TIMER_IPR_ADDR INTC_IPRA
100 #define TIMER_IPR_POS 3
101 #define TIMER_PRIORITY 2
105 #define TMU1_IPR_ADDR INTC_IPRA
106 #define TMU1_IPR_POS 2
107 #define TMU1_PRIORITY 2
111 #define TMU2_IPR_ADDR INTC_IPRA
112 #define TMU2_IPR_POS 1
113 #define TMU2_PRIORITY 2
117 #define LCDC_IPR_ADDR INTC_IPRB
118 #define LCDC_IPR_POS 2
119 #define LCDC_PRIORITY 2
121 /* VIO (Video I/O) */
126 #define VIO_IPR_ADDR INTC_IPRE
127 #define VIO_IPR_POS 2
128 #define VIO_PRIORITY 2
130 /* MFI (Multi Functional Interface) */
132 #define MFI_IPR_ADDR INTC_IPRE
133 #define MFI_IPR_POS 1
134 #define MFI_PRIORITY 2
136 /* VPU (Video Processing Unit) */
138 #define VPU_IPR_ADDR INTC_IPRE
139 #define VPU_IPR_POS 0
140 #define VPU_PRIORITY 2
144 #define TDG_IPR_ADDR INTC_IPRJ
145 #define TDG_IPR_POS 2
146 #define TDG_PRIORITY 2
153 #define DMA1_IPR_ADDR INTC_IPRE
154 #define DMA1_IPR_POS 3
155 #define DMA1_PRIORITY 7
160 #define DMA2_IPR_ADDR INTC_IPRF
161 #define DMA2_IPR_POS 2
162 #define DMA2_PRIORITY 7
165 #define SCIF_ERI_IRQ 80
166 #define SCIF_RXI_IRQ 81
167 #define SCIF_BRI_IRQ 82
168 #define SCIF_TXI_IRQ 83
169 #define SCIF_IPR_ADDR INTC_IPRG
170 #define SCIF_IPR_POS 3
171 #define SCIF_PRIORITY 3
175 #define SIOF0_IPR_ADDR INTC_IPRH
176 #define SIOF0_IPR_POS 3
177 #define SIOF0_PRIORITY 3
179 /* FLCTL (Flash Memory Controller) */
181 #define FLTEND_IRQ 93
182 #define FLTRQ0_IRQ 94
183 #define FLTRQ1_IRQ 95
184 #define FLCTL_IPR_ADDR INTC_IPRH
185 #define FLCTL_IPR_POS 1
186 #define FLCTL_PRIORITY 3
188 /* IIC(0) (IIC Bus Interface) */
189 #define IIC0_ALI_IRQ 96
190 #define IIC0_TACKI_IRQ 97
191 #define IIC0_WAITI_IRQ 98
192 #define IIC0_DTEI_IRQ 99
193 #define IIC0_IPR_ADDR INTC_IPRH
194 #define IIC0_IPR_POS 0
195 #define IIC0_PRIORITY 3
197 /* IIC(1) (IIC Bus Interface) */
198 #define IIC1_ALI_IRQ 44
199 #define IIC1_TACKI_IRQ 45
200 #define IIC1_WAITI_IRQ 46
201 #define IIC1_DTEI_IRQ 47
202 #define IIC1_IPR_ADDR INTC_IPRG
203 #define IIC1_IPR_POS 0
204 #define IIC1_PRIORITY 3
208 #define SIO0_IPR_ADDR INTC_IPRI
209 #define SIO0_IPR_POS 3
210 #define SIO0_PRIORITY 3
213 #define SDHI_SDHII0_IRQ 100
214 #define SDHI_SDHII1_IRQ 101
215 #define SDHI_SDHII2_IRQ 102
216 #define SDHI_SDHII3_IRQ 103
217 #define SDHI_IPR_ADDR INTC_IPRK
218 #define SDHI_IPR_POS 0
219 #define SDHI_PRIORITY 3
221 /* SIU (Sound Interface Unit) */
223 #define SIU_IPR_ADDR INTC_IPRJ
224 #define SIU_IPR_POS 1
225 #define SIU_PRIORITY 3
227 #define PORT_PACR 0xA4050100UL
228 #define PORT_PBCR 0xA4050102UL
229 #define PORT_PCCR 0xA4050104UL
230 #define PORT_PDCR 0xA4050106UL
231 #define PORT_PECR 0xA4050108UL
232 #define PORT_PFCR 0xA405010AUL
233 #define PORT_PGCR 0xA405010CUL
234 #define PORT_PHCR 0xA405010EUL
235 #define PORT_PJCR 0xA4050110UL
236 #define PORT_PKCR 0xA4050112UL
237 #define PORT_PLCR 0xA4050114UL
238 #define PORT_SCPCR 0xA4050116UL
239 #define PORT_PMCR 0xA4050118UL
240 #define PORT_PNCR 0xA405011AUL
241 #define PORT_PQCR 0xA405011CUL
242 #define PORT_PRCR 0xA405011EUL
243 #define PORT_PTCR 0xA405014CUL
244 #define PORT_PUCR 0xA405014EUL
245 #define PORT_PVCR 0xA4050150UL
247 #define PORT_PSELA 0xA4050140UL
248 #define PORT_PSELB 0xA4050142UL
249 #define PORT_PSELC 0xA4050144UL
250 #define PORT_PSELE 0xA4050158UL
252 #define PORT_HIZCRA 0xA4050146UL
253 #define PORT_HIZCRB 0xA4050148UL
254 #define PORT_DRVCR 0xA405014AUL
256 #define PORT_PADR 0xA4050120UL
257 #define PORT_PBDR 0xA4050122UL
258 #define PORT_PCDR 0xA4050124UL
259 #define PORT_PDDR 0xA4050126UL
260 #define PORT_PEDR 0xA4050128UL
261 #define PORT_PFDR 0xA405012AUL
262 #define PORT_PGDR 0xA405012CUL
263 #define PORT_PHDR 0xA405012EUL
264 #define PORT_PJDR 0xA4050130UL
265 #define PORT_PKDR 0xA4050132UL
266 #define PORT_PLDR 0xA4050134UL
267 #define PORT_SCPDR 0xA4050136UL
268 #define PORT_PMDR 0xA4050138UL
269 #define PORT_PNDR 0xA405013AUL
270 #define PORT_PQDR 0xA405013CUL
271 #define PORT_PRDR 0xA405013EUL
272 #define PORT_PTDR 0xA405016CUL
273 #define PORT_PUDR 0xA405016EUL
274 #define PORT_PVDR 0xA4050170UL
285 #define INTPRI00 0xA4140010UL
287 #define IRQ0_IPR_ADDR INTPRI00
288 #define IRQ1_IPR_ADDR INTPRI00
289 #define IRQ2_IPR_ADDR INTPRI00
290 #define IRQ3_IPR_ADDR INTPRI00
291 #define IRQ4_IPR_ADDR INTPRI00
292 #define IRQ5_IPR_ADDR INTPRI00
293 #define IRQ6_IPR_ADDR INTPRI00
294 #define IRQ7_IPR_ADDR INTPRI00
296 #define IRQ0_IPR_POS 7
297 #define IRQ1_IPR_POS 6
298 #define IRQ2_IPR_POS 5
299 #define IRQ3_IPR_POS 4
300 #define IRQ4_IPR_POS 3
301 #define IRQ5_IPR_POS 2
302 #define IRQ6_IPR_POS 1
303 #define IRQ7_IPR_POS 0
305 #define IRQ0_PRIORITY 1
306 #define IRQ1_PRIORITY 1
307 #define IRQ2_PRIORITY 1
308 #define IRQ3_PRIORITY 1
309 #define IRQ4_PRIORITY 1
310 #define IRQ5_PRIORITY 1
311 #define IRQ6_PRIORITY 1
312 #define IRQ7_PRIORITY 1
314 int shmse_irq_demux(int irq
);
316 #endif /* __ASM_SH_IRQ_SH73180_H */