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[SPARC64]: Consolidate MSI support code.
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1 /* $Id: irq.h,v 1.21 2002/01/23 11:27:36 davem Exp $
2 * irq.h: IRQ registers on the 64-bit Sparc.
3 *
4 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
6 */
7
8 #ifndef _SPARC64_IRQ_H
9 #define _SPARC64_IRQ_H
10
11 #include <linux/linkage.h>
12 #include <linux/kernel.h>
13 #include <linux/errno.h>
14 #include <linux/interrupt.h>
15 #include <asm/pil.h>
16 #include <asm/ptrace.h>
17
18 /* IMAP/ICLR register defines */
19 #define IMAP_VALID 0x80000000UL /* IRQ Enabled */
20 #define IMAP_TID_UPA 0x7c000000UL /* UPA TargetID */
21 #define IMAP_TID_JBUS 0x7c000000UL /* JBUS TargetID */
22 #define IMAP_TID_SHIFT 26
23 #define IMAP_AID_SAFARI 0x7c000000UL /* Safari AgentID */
24 #define IMAP_AID_SHIFT 26
25 #define IMAP_NID_SAFARI 0x03e00000UL /* Safari NodeID */
26 #define IMAP_NID_SHIFT 21
27 #define IMAP_IGN 0x000007c0UL /* IRQ Group Number */
28 #define IMAP_INO 0x0000003fUL /* IRQ Number */
29 #define IMAP_INR 0x000007ffUL /* Full interrupt number*/
30
31 #define ICLR_IDLE 0x00000000UL /* Idle state */
32 #define ICLR_TRANSMIT 0x00000001UL /* Transmit state */
33 #define ICLR_PENDING 0x00000003UL /* Pending state */
34
35 /* The largest number of unique interrupt sources we support.
36 * If this needs to ever be larger than 255, you need to change
37 * the type of ino_bucket->virt_irq as appropriate.
38 *
39 * ino_bucket->virt_irq allocation is made during {sun4v_,}build_irq().
40 */
41 #define NR_IRQS 255
42
43 extern void irq_install_pre_handler(int virt_irq,
44 void (*func)(unsigned int, void *, void *),
45 void *arg1, void *arg2);
46 #define irq_canonicalize(irq) (irq)
47 extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap);
48 extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino);
49 extern unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino);
50 extern unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p,
51 unsigned int msi_devino_start,
52 unsigned int msi_devino_end);
53 extern void sun4v_destroy_msi(unsigned int virt_irq);
54 extern unsigned int sun4u_build_msi(u32 portid, unsigned int *virt_irq_p,
55 unsigned int msi_devino_start,
56 unsigned int msi_devino_end,
57 unsigned long imap_base,
58 unsigned long iclr_base);
59 extern void sun4u_destroy_msi(unsigned int virt_irq);
60 extern unsigned int sbus_build_irq(void *sbus, unsigned int ino);
61
62 extern unsigned char virt_irq_alloc(unsigned int real_irq);
63 #ifdef CONFIG_PCI_MSI
64 extern void virt_irq_free(unsigned int virt_irq);
65 #endif
66
67 extern void fixup_irqs(void);
68
69 static __inline__ void set_softint(unsigned long bits)
70 {
71 __asm__ __volatile__("wr %0, 0x0, %%set_softint"
72 : /* No outputs */
73 : "r" (bits));
74 }
75
76 static __inline__ void clear_softint(unsigned long bits)
77 {
78 __asm__ __volatile__("wr %0, 0x0, %%clear_softint"
79 : /* No outputs */
80 : "r" (bits));
81 }
82
83 static __inline__ unsigned long get_softint(void)
84 {
85 unsigned long retval;
86
87 __asm__ __volatile__("rd %%softint, %0"
88 : "=r" (retval));
89 return retval;
90 }
91
92 #endif