1 #ifndef _ASM_X86_APIC_H
2 #define _ASM_X86_APIC_H
5 #include <linux/delay.h>
6 #include <asm/fixmap.h>
7 #include <asm/apicdef.h>
8 #include <asm/processor.h>
9 #include <asm/system.h>
11 #define ARCH_APICTIMER_STOPS_ON_C3 1
19 #define APIC_VERBOSE 1
23 * Define the default level of output to be very little
24 * This can be turned up by using apic=verbose for more
25 * information and apic=debug for _lots_ of information.
26 * apic_verbosity is defined in apic.c
28 #define apic_printk(v, s, a...) do { \
29 if ((v) <= apic_verbosity) \
34 extern void generic_apic_probe(void);
36 #ifdef CONFIG_X86_LOCAL_APIC
38 extern int apic_verbosity
;
39 extern int timer_over_8254
;
40 extern int local_apic_timer_c2_ok
;
41 extern int local_apic_timer_disabled
;
43 extern int apic_runs_main_timer
;
44 extern int ioapic_force
;
45 extern int disable_apic_timer
;
46 extern unsigned boot_cpu_id
;
49 * Basic functions accessing APICs.
51 #ifdef CONFIG_PARAVIRT
52 #include <asm/paravirt.h>
54 #define apic_write native_apic_write
55 #define apic_write_atomic native_apic_write_atomic
56 #define apic_read native_apic_read
57 #define setup_boot_clock setup_boot_APIC_clock
58 #define setup_secondary_clock setup_secondary_APIC_clock
61 static inline fastcall
void native_apic_write(unsigned long reg
, u32 v
)
63 *((volatile u32
*)(APIC_BASE
+ reg
)) = v
;
66 static inline fastcall
void native_apic_write_atomic(unsigned long reg
, u32 v
)
68 (void) xchg((u32
*)(APIC_BASE
+ reg
), v
);
71 static inline fastcall u32
native_apic_read(unsigned long reg
)
73 return *((volatile u32
*)(APIC_BASE
+ reg
));
76 extern void apic_wait_icr_idle(void);
77 extern u32
safe_apic_wait_icr_idle(void);
78 extern int get_physical_broadcast(void);
80 #ifdef CONFIG_X86_GOOD_APIC
81 # define FORCE_READ_AROUND_WRITE 0
82 # define apic_read_around(x)
83 # define apic_write_around(x, y) apic_write((x), (y))
85 # define FORCE_READ_AROUND_WRITE 1
86 # define apic_read_around(x) apic_read(x)
87 # define apic_write_around(x, y) apic_write_atomic((x), (y))
90 static inline void ack_APIC_irq(void)
93 * ack_APIC_irq() actually gets compiled as a single instruction:
94 * - a single rmw on Pentium/82489DX
95 * - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
99 /* Docs say use 0 for future compatibility */
100 apic_write_around(APIC_EOI
, 0);
103 extern int lapic_get_maxlvt(void);
104 extern void clear_local_APIC(void);
105 extern void connect_bsp_APIC(void);
106 extern void disconnect_bsp_APIC(int virt_wire_setup
);
107 extern void disable_local_APIC(void);
108 extern void lapic_shutdown(void);
109 extern int verify_local_APIC(void);
110 extern void cache_APIC_registers(void);
111 extern void sync_Arb_IDs(void);
112 extern void init_bsp_APIC(void);
113 extern void setup_local_APIC(void);
114 extern void init_apic_mappings(void);
115 extern void smp_local_timer_interrupt(void);
116 extern void setup_boot_APIC_clock(void);
117 extern void setup_secondary_APIC_clock(void);
118 extern int APIC_init_uniprocessor(void);
119 extern void enable_NMI_through_LVT0(void *dummy
);
122 * On 32bit this is mach-xxx local
125 extern void setup_apic_routing(void);
128 extern void setup_APIC_extended_lvt(unsigned char lvt_off
, unsigned char vector
,
129 unsigned char msg_type
, unsigned char mask
);
131 extern int apic_is_clustered_box(void);
133 #else /* !CONFIG_X86_LOCAL_APIC */
134 static inline void lapic_shutdown(void) { }
135 #define local_apic_timer_c2_ok 1
137 #endif /* !CONFIG_X86_LOCAL_APIC */
139 #endif /* __ASM_APIC_H */