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1 #/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
11 #ifndef ASM_KVM_HOST_H
12 #define ASM_KVM_HOST_H
13
14 #include <linux/types.h>
15 #include <linux/mm.h>
16
17 #include <linux/kvm.h>
18 #include <linux/kvm_para.h>
19 #include <linux/kvm_types.h>
20
21 #include <asm/desc.h>
22
23 #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
24 #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
25 #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
26 0xFFFFFF0000000000ULL)
27
28 #define KVM_GUEST_CR0_MASK \
29 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \
30 | X86_CR0_NW | X86_CR0_CD)
31 #define KVM_VM_CR0_ALWAYS_ON \
32 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \
33 | X86_CR0_MP)
34 #define KVM_GUEST_CR4_MASK \
35 (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
36 #define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
37 #define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
38
39 #define INVALID_PAGE (~(hpa_t)0)
40 #define UNMAPPED_GVA (~(gpa_t)0)
41
42 #define DE_VECTOR 0
43 #define UD_VECTOR 6
44 #define NM_VECTOR 7
45 #define DF_VECTOR 8
46 #define TS_VECTOR 10
47 #define NP_VECTOR 11
48 #define SS_VECTOR 12
49 #define GP_VECTOR 13
50 #define PF_VECTOR 14
51
52 #define SELECTOR_TI_MASK (1 << 2)
53 #define SELECTOR_RPL_MASK 0x03
54
55 #define IOPL_SHIFT 12
56
57 #define KVM_ALIAS_SLOTS 4
58
59 #define KVM_PERMILLE_MMU_PAGES 20
60 #define KVM_MIN_ALLOC_MMU_PAGES 64
61 #define KVM_NUM_MMU_PAGES 1024
62 #define KVM_MIN_FREE_MMU_PAGES 5
63 #define KVM_REFILL_PAGES 25
64 #define KVM_MAX_CPUID_ENTRIES 40
65
66 extern spinlock_t kvm_lock;
67 extern struct list_head vm_list;
68
69 struct kvm_vcpu;
70 struct kvm;
71
72 enum {
73 VCPU_REGS_RAX = 0,
74 VCPU_REGS_RCX = 1,
75 VCPU_REGS_RDX = 2,
76 VCPU_REGS_RBX = 3,
77 VCPU_REGS_RSP = 4,
78 VCPU_REGS_RBP = 5,
79 VCPU_REGS_RSI = 6,
80 VCPU_REGS_RDI = 7,
81 #ifdef CONFIG_X86_64
82 VCPU_REGS_R8 = 8,
83 VCPU_REGS_R9 = 9,
84 VCPU_REGS_R10 = 10,
85 VCPU_REGS_R11 = 11,
86 VCPU_REGS_R12 = 12,
87 VCPU_REGS_R13 = 13,
88 VCPU_REGS_R14 = 14,
89 VCPU_REGS_R15 = 15,
90 #endif
91 NR_VCPU_REGS
92 };
93
94 enum {
95 VCPU_SREG_CS,
96 VCPU_SREG_DS,
97 VCPU_SREG_ES,
98 VCPU_SREG_FS,
99 VCPU_SREG_GS,
100 VCPU_SREG_SS,
101 VCPU_SREG_TR,
102 VCPU_SREG_LDTR,
103 };
104
105 #include <asm/kvm_x86_emulate.h>
106
107 #define KVM_NR_MEM_OBJS 40
108
109 /*
110 * We don't want allocation failures within the mmu code, so we preallocate
111 * enough memory for a single page fault in a cache.
112 */
113 struct kvm_mmu_memory_cache {
114 int nobjs;
115 void *objects[KVM_NR_MEM_OBJS];
116 };
117
118 #define NR_PTE_CHAIN_ENTRIES 5
119
120 struct kvm_pte_chain {
121 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
122 struct hlist_node link;
123 };
124
125 /*
126 * kvm_mmu_page_role, below, is defined as:
127 *
128 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
129 * bits 4:7 - page table level for this shadow (1-4)
130 * bits 8:9 - page table quadrant for 2-level guests
131 * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
132 * bits 17:19 - common access permissions for all ptes in this shadow page
133 */
134 union kvm_mmu_page_role {
135 unsigned word;
136 struct {
137 unsigned glevels:4;
138 unsigned level:4;
139 unsigned quadrant:2;
140 unsigned pad_for_nice_hex_output:6;
141 unsigned metaphysical:1;
142 unsigned access:3;
143 };
144 };
145
146 struct kvm_mmu_page {
147 struct list_head link;
148 struct hlist_node hash_link;
149
150 /*
151 * The following two entries are used to key the shadow page in the
152 * hash table.
153 */
154 gfn_t gfn;
155 union kvm_mmu_page_role role;
156
157 u64 *spt;
158 /* hold the gfn of each spte inside spt */
159 gfn_t *gfns;
160 unsigned long slot_bitmap; /* One bit set per slot which has memory
161 * in this shadow page.
162 */
163 int multimapped; /* More than one parent_pte? */
164 int root_count; /* Currently serving as active root */
165 union {
166 u64 *parent_pte; /* !multimapped */
167 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
168 };
169 };
170
171 /*
172 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
173 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
174 * mode.
175 */
176 struct kvm_mmu {
177 void (*new_cr3)(struct kvm_vcpu *vcpu);
178 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
179 void (*free)(struct kvm_vcpu *vcpu);
180 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
181 void (*prefetch_page)(struct kvm_vcpu *vcpu,
182 struct kvm_mmu_page *page);
183 hpa_t root_hpa;
184 int root_level;
185 int shadow_root_level;
186
187 u64 *pae_root;
188 };
189
190 struct kvm_vcpu_arch {
191 u64 host_tsc;
192 int interrupt_window_open;
193 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
194 DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
195 unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
196 unsigned long rip; /* needs vcpu_load_rsp_rip() */
197
198 unsigned long cr0;
199 unsigned long cr2;
200 unsigned long cr3;
201 unsigned long cr4;
202 unsigned long cr8;
203 u64 pdptrs[4]; /* pae */
204 u64 shadow_efer;
205 u64 apic_base;
206 struct kvm_lapic *apic; /* kernel irqchip context */
207 #define VCPU_MP_STATE_RUNNABLE 0
208 #define VCPU_MP_STATE_UNINITIALIZED 1
209 #define VCPU_MP_STATE_INIT_RECEIVED 2
210 #define VCPU_MP_STATE_SIPI_RECEIVED 3
211 #define VCPU_MP_STATE_HALTED 4
212 int mp_state;
213 int sipi_vector;
214 u64 ia32_misc_enable_msr;
215 bool tpr_access_reporting;
216
217 struct kvm_mmu mmu;
218
219 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
220 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
221 struct kvm_mmu_memory_cache mmu_page_cache;
222 struct kvm_mmu_memory_cache mmu_page_header_cache;
223
224 gfn_t last_pt_write_gfn;
225 int last_pt_write_count;
226 u64 *last_pte_updated;
227
228 struct {
229 gfn_t gfn; /* presumed gfn during guest pte update */
230 struct page *page; /* page corresponding to that gfn */
231 } update_pte;
232
233 struct i387_fxsave_struct host_fx_image;
234 struct i387_fxsave_struct guest_fx_image;
235
236 gva_t mmio_fault_cr2;
237 struct kvm_pio_request pio;
238 void *pio_data;
239
240 struct kvm_queued_exception {
241 bool pending;
242 bool has_error_code;
243 u8 nr;
244 u32 error_code;
245 } exception;
246
247 struct {
248 int active;
249 u8 save_iopl;
250 struct kvm_save_segment {
251 u16 selector;
252 unsigned long base;
253 u32 limit;
254 u32 ar;
255 } tr, es, ds, fs, gs;
256 } rmode;
257 int halt_request; /* real mode on Intel only */
258
259 int cpuid_nent;
260 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
261 /* emulate context */
262
263 struct x86_emulate_ctxt emulate_ctxt;
264 };
265
266 struct kvm_mem_alias {
267 gfn_t base_gfn;
268 unsigned long npages;
269 gfn_t target_gfn;
270 };
271
272 struct kvm_arch{
273 int naliases;
274 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
275
276 unsigned int n_free_mmu_pages;
277 unsigned int n_requested_mmu_pages;
278 unsigned int n_alloc_mmu_pages;
279 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
280 /*
281 * Hash table of struct kvm_mmu_page.
282 */
283 struct list_head active_mmu_pages;
284 struct kvm_pic *vpic;
285 struct kvm_ioapic *vioapic;
286
287 int round_robin_prev_vcpu;
288 unsigned int tss_addr;
289 struct page *apic_access_page;
290 };
291
292 struct kvm_vm_stat {
293 u32 mmu_shadow_zapped;
294 u32 mmu_pte_write;
295 u32 mmu_pte_updated;
296 u32 mmu_pde_zapped;
297 u32 mmu_flooded;
298 u32 mmu_recycled;
299 u32 mmu_cache_miss;
300 u32 remote_tlb_flush;
301 };
302
303 struct kvm_vcpu_stat {
304 u32 pf_fixed;
305 u32 pf_guest;
306 u32 tlb_flush;
307 u32 invlpg;
308
309 u32 exits;
310 u32 io_exits;
311 u32 mmio_exits;
312 u32 signal_exits;
313 u32 irq_window_exits;
314 u32 halt_exits;
315 u32 halt_wakeup;
316 u32 request_irq_exits;
317 u32 irq_exits;
318 u32 host_state_reload;
319 u32 efer_reload;
320 u32 fpu_reload;
321 u32 insn_emulation;
322 u32 insn_emulation_fail;
323 };
324
325 struct descriptor_table {
326 u16 limit;
327 unsigned long base;
328 } __attribute__((packed));
329
330 struct kvm_x86_ops {
331 int (*cpu_has_kvm_support)(void); /* __init */
332 int (*disabled_by_bios)(void); /* __init */
333 void (*hardware_enable)(void *dummy); /* __init */
334 void (*hardware_disable)(void *dummy);
335 void (*check_processor_compatibility)(void *rtn);
336 int (*hardware_setup)(void); /* __init */
337 void (*hardware_unsetup)(void); /* __exit */
338 bool (*cpu_has_accelerated_tpr)(void);
339
340 /* Create, but do not attach this VCPU */
341 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
342 void (*vcpu_free)(struct kvm_vcpu *vcpu);
343 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
344
345 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
346 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
347 void (*vcpu_put)(struct kvm_vcpu *vcpu);
348 void (*vcpu_decache)(struct kvm_vcpu *vcpu);
349
350 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
351 struct kvm_debug_guest *dbg);
352 void (*guest_debug_pre)(struct kvm_vcpu *vcpu);
353 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
354 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
355 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
356 void (*get_segment)(struct kvm_vcpu *vcpu,
357 struct kvm_segment *var, int seg);
358 void (*set_segment)(struct kvm_vcpu *vcpu,
359 struct kvm_segment *var, int seg);
360 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
361 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
362 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
363 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
364 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
365 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
366 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
367 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
368 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
369 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
370 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
371 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
372 int *exception);
373 void (*cache_regs)(struct kvm_vcpu *vcpu);
374 void (*decache_regs)(struct kvm_vcpu *vcpu);
375 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
376 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
377
378 void (*tlb_flush)(struct kvm_vcpu *vcpu);
379
380 void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
381 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
382 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
383 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
384 unsigned char *hypercall_addr);
385 int (*get_irq)(struct kvm_vcpu *vcpu);
386 void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
387 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
388 bool has_error_code, u32 error_code);
389 bool (*exception_injected)(struct kvm_vcpu *vcpu);
390 void (*inject_pending_irq)(struct kvm_vcpu *vcpu);
391 void (*inject_pending_vectors)(struct kvm_vcpu *vcpu,
392 struct kvm_run *run);
393
394 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
395 };
396
397 extern struct kvm_x86_ops *kvm_x86_ops;
398
399 int kvm_mmu_module_init(void);
400 void kvm_mmu_module_exit(void);
401
402 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
403 int kvm_mmu_create(struct kvm_vcpu *vcpu);
404 int kvm_mmu_setup(struct kvm_vcpu *vcpu);
405 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
406
407 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
408 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
409 void kvm_mmu_zap_all(struct kvm *kvm);
410 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
411 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
412
413 enum emulation_result {
414 EMULATE_DONE, /* no further processing */
415 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
416 EMULATE_FAIL, /* can't emulate this instruction */
417 };
418
419 #define EMULTYPE_NO_DECODE (1 << 0)
420 #define EMULTYPE_TRAP_UD (1 << 1)
421 int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
422 unsigned long cr2, u16 error_code, int emulation_type);
423 void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
424 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
425 void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
426 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
427 unsigned long *rflags);
428
429 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
430 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
431 unsigned long *rflags);
432 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
433 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
434
435 struct x86_emulate_ctxt;
436
437 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
438 int size, unsigned port);
439 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
440 int size, unsigned long count, int down,
441 gva_t address, int rep, unsigned port);
442 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
443 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
444 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
445 int emulate_clts(struct kvm_vcpu *vcpu);
446 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
447 unsigned long *dest);
448 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
449 unsigned long value);
450
451 void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
452 void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
453 void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
454 void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
455 unsigned long get_cr8(struct kvm_vcpu *vcpu);
456 void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
457 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
458
459 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
460 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
461
462 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
463 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
464 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
465 u32 error_code);
466
467 void fx_init(struct kvm_vcpu *vcpu);
468
469 int emulator_read_std(unsigned long addr,
470 void *val,
471 unsigned int bytes,
472 struct kvm_vcpu *vcpu);
473 int emulator_write_emulated(unsigned long addr,
474 const void *val,
475 unsigned int bytes,
476 struct kvm_vcpu *vcpu);
477
478 unsigned long segment_base(u16 selector);
479
480 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
481 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
482 const u8 *new, int bytes);
483 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
484 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
485 int kvm_mmu_load(struct kvm_vcpu *vcpu);
486 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
487
488 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
489
490 int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
491
492 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
493
494 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
495 int complete_pio(struct kvm_vcpu *vcpu);
496
497 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
498 {
499 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
500
501 return (struct kvm_mmu_page *)page_private(page);
502 }
503
504 static inline u16 read_fs(void)
505 {
506 u16 seg;
507 asm("mov %%fs, %0" : "=g"(seg));
508 return seg;
509 }
510
511 static inline u16 read_gs(void)
512 {
513 u16 seg;
514 asm("mov %%gs, %0" : "=g"(seg));
515 return seg;
516 }
517
518 static inline u16 read_ldt(void)
519 {
520 u16 ldt;
521 asm("sldt %0" : "=g"(ldt));
522 return ldt;
523 }
524
525 static inline void load_fs(u16 sel)
526 {
527 asm("mov %0, %%fs" : : "rm"(sel));
528 }
529
530 static inline void load_gs(u16 sel)
531 {
532 asm("mov %0, %%gs" : : "rm"(sel));
533 }
534
535 #ifndef load_ldt
536 static inline void load_ldt(u16 sel)
537 {
538 asm("lldt %0" : : "rm"(sel));
539 }
540 #endif
541
542 static inline void get_idt(struct descriptor_table *table)
543 {
544 asm("sidt %0" : "=m"(*table));
545 }
546
547 static inline void get_gdt(struct descriptor_table *table)
548 {
549 asm("sgdt %0" : "=m"(*table));
550 }
551
552 static inline unsigned long read_tr_base(void)
553 {
554 u16 tr;
555 asm("str %0" : "=g"(tr));
556 return segment_base(tr);
557 }
558
559 #ifdef CONFIG_X86_64
560 static inline unsigned long read_msr(unsigned long msr)
561 {
562 u64 value;
563
564 rdmsrl(msr, value);
565 return value;
566 }
567 #endif
568
569 static inline void fx_save(struct i387_fxsave_struct *image)
570 {
571 asm("fxsave (%0)":: "r" (image));
572 }
573
574 static inline void fx_restore(struct i387_fxsave_struct *image)
575 {
576 asm("fxrstor (%0)":: "r" (image));
577 }
578
579 static inline void fpu_init(void)
580 {
581 asm("finit");
582 }
583
584 static inline u32 get_rdx_init_val(void)
585 {
586 return 0x600; /* P6 family */
587 }
588
589 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
590 {
591 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
592 }
593
594 #define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
595 #define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
596 #define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
597 #define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
598 #define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
599 #define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
600 #define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
601 #define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
602 #define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
603
604 #define MSR_IA32_TIME_STAMP_COUNTER 0x010
605
606 #define TSS_IOPB_BASE_OFFSET 0x66
607 #define TSS_BASE_SIZE 0x68
608 #define TSS_IOPB_SIZE (65536 / 8)
609 #define TSS_REDIRECTION_SIZE (256 / 8)
610 #define RMODE_TSS_SIZE \
611 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
612
613 #endif