include/asm-x86/mach-numaq/mach_wakecpu.h

   1 #ifndef ASM_X86__MACH_NUMAQ__MACH_WAKECPU_H
   2 #define ASM_X86__MACH_NUMAQ__MACH_WAKECPU_H
   3
   4 /* This file copes with machines that wakeup secondary CPUs by NMIs */
   5
   6 #define WAKE_SECONDARY_VIA_NMI
   7
   8 #define TRAMPOLINE_LOW phys_to_virt(0x8)
   9 #define TRAMPOLINE_HIGH phys_to_virt(0xa)
  10
  11 #define boot_cpu_apicid boot_cpu_logical_apicid
  12
  13 /* We don't do anything here because we use NMI's to boot instead */
  14 static inline void wait_for_init_deassert(atomic_t *deassert)
  15 {
  16 }
  17
  18 /*
  19  * Because we use NMIs rather than the INIT-STARTUP sequence to
  20  * bootstrap the CPUs, the APIC may be in a weird state. Kick it.
  21  */
  22 static inline void smp_callin_clear_local_apic(void)
  23 {
  24         clear_local_APIC();
  25 }
  26
  27 static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
  28 {
  29         printk("Storing NMI vector\n");
  30         *high = *((volatile unsigned short *) TRAMPOLINE_HIGH);
  31         *low = *((volatile unsigned short *) TRAMPOLINE_LOW);
  32 }
  33
  34 static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
  35 {
  36         printk("Restoring NMI vector\n");
  37         *((volatile unsigned short *) TRAMPOLINE_HIGH) = *high;
  38         *((volatile unsigned short *) TRAMPOLINE_LOW) = *low;
  39 }
  40
  41 #define inquire_remote_apic(apicid) {}
  42
  43 #endif /* ASM_X86__MACH_NUMAQ__MACH_WAKECPU_H */