1 #ifndef __ASM_PARAVIRT_H
2 #define __ASM_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
10 /* Bitmask of what can be clobbered: usually at least eax. */
12 #define CLBR_EAX (1 << 0)
13 #define CLBR_ECX (1 << 1)
14 #define CLBR_EDX (1 << 2)
17 #define CLBR_RSI (1 << 3)
18 #define CLBR_RDI (1 << 4)
19 #define CLBR_R8 (1 << 5)
20 #define CLBR_R9 (1 << 6)
21 #define CLBR_R10 (1 << 7)
22 #define CLBR_R11 (1 << 8)
23 #define CLBR_ANY ((1 << 9) - 1)
24 #include <asm/desc_defs.h>
26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
27 #define CLBR_ANY ((1 << 3) - 1)
31 #include <linux/types.h>
32 #include <linux/cpumask.h>
33 #include <asm/kmap_types.h>
34 #include <asm/desc_defs.h>
45 unsigned int kernel_rpl
;
46 int shared_kernel_pmd
;
53 * Patch may replace one of the defined code sequences with
54 * arbitrary code, subject to the same register constraints.
55 * This generally means the code is not free to clobber any
56 * registers other than EAX. The patch function should return
57 * the number of bytes of code generated, as we nop pad the
58 * rest in generic code.
60 unsigned (*patch
)(u8 type
, u16 clobber
, void *insnbuf
,
61 unsigned long addr
, unsigned len
);
63 /* Basic arch-specific setup */
64 void (*arch_setup
)(void);
65 char *(*memory_setup
)(void);
66 void (*post_allocator_init
)(void);
68 /* Print a banner to identify the environment */
74 /* Set deferred update mode, used for batching operations. */
80 void (*time_init
)(void);
82 /* Set and set time of day */
83 unsigned long (*get_wallclock
)(void);
84 int (*set_wallclock
)(unsigned long);
86 unsigned long long (*sched_clock
)(void);
87 unsigned long (*get_cpu_khz
)(void);
91 /* hooks for various privileged instructions */
92 unsigned long (*get_debugreg
)(int regno
);
93 void (*set_debugreg
)(int regno
, unsigned long value
);
97 unsigned long (*read_cr0
)(void);
98 void (*write_cr0
)(unsigned long);
100 unsigned long (*read_cr4_safe
)(void);
101 unsigned long (*read_cr4
)(void);
102 void (*write_cr4
)(unsigned long);
104 /* Segment descriptor handling */
105 void (*load_tr_desc
)(void);
106 void (*load_gdt
)(const struct desc_ptr
*);
107 void (*load_idt
)(const struct desc_ptr
*);
108 void (*store_gdt
)(struct desc_ptr
*);
109 void (*store_idt
)(struct desc_ptr
*);
110 void (*set_ldt
)(const void *desc
, unsigned entries
);
111 unsigned long (*store_tr
)(void);
112 void (*load_tls
)(struct thread_struct
*t
, unsigned int cpu
);
113 void (*write_ldt_entry
)(struct desc_struct
*ldt
, int entrynum
,
115 void (*write_gdt_entry
)(struct desc_struct
*,
116 int entrynum
, const void *desc
, int size
);
117 void (*write_idt_entry
)(gate_desc
*,
118 int entrynum
, const gate_desc
*gate
);
119 void (*load_sp0
)(struct tss_struct
*tss
, struct thread_struct
*t
);
121 void (*set_iopl_mask
)(unsigned mask
);
123 void (*wbinvd
)(void);
124 void (*io_delay
)(void);
126 /* cpuid emulation, mostly so that caps bits can be disabled */
127 void (*cpuid
)(unsigned int *eax
, unsigned int *ebx
,
128 unsigned int *ecx
, unsigned int *edx
);
130 /* MSR, PMC and TSR operations.
131 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
132 u64 (*read_msr
)(unsigned int msr
, int *err
);
133 int (*write_msr
)(unsigned int msr
, unsigned low
, unsigned high
);
135 u64 (*read_tsc
)(void);
136 u64 (*read_pmc
)(int counter
);
137 unsigned long long (*read_tscp
)(unsigned int *aux
);
139 /* These two are jmp to, not actually called. */
140 void (*irq_enable_syscall_ret
)(void);
143 void (*swapgs
)(void);
145 struct pv_lazy_ops lazy_mode
;
149 void (*init_IRQ
)(void);
152 * Get/set interrupt state. save_fl and restore_fl are only
153 * expected to use X86_EFLAGS_IF; all other bits
154 * returned from save_fl are undefined, and may be ignored by
157 unsigned long (*save_fl
)(void);
158 void (*restore_fl
)(unsigned long);
159 void (*irq_disable
)(void);
160 void (*irq_enable
)(void);
161 void (*safe_halt
)(void);
166 #ifdef CONFIG_X86_LOCAL_APIC
168 * Direct APIC operations, principally for VMI. Ideally
169 * these shouldn't be in this interface.
171 void (*apic_write
)(unsigned long reg
, u32 v
);
172 void (*apic_write_atomic
)(unsigned long reg
, u32 v
);
173 u32 (*apic_read
)(unsigned long reg
);
174 void (*setup_boot_clock
)(void);
175 void (*setup_secondary_clock
)(void);
177 void (*startup_ipi_hook
)(int phys_apicid
,
178 unsigned long start_eip
,
179 unsigned long start_esp
);
185 * Called before/after init_mm pagetable setup. setup_start
186 * may reset %cr3, and may pre-install parts of the pagetable;
187 * pagetable setup is expected to preserve any existing
190 void (*pagetable_setup_start
)(pgd_t
*pgd_base
);
191 void (*pagetable_setup_done
)(pgd_t
*pgd_base
);
193 unsigned long (*read_cr2
)(void);
194 void (*write_cr2
)(unsigned long);
196 unsigned long (*read_cr3
)(void);
197 void (*write_cr3
)(unsigned long);
200 * Hooks for intercepting the creation/use/destruction of an
203 void (*activate_mm
)(struct mm_struct
*prev
,
204 struct mm_struct
*next
);
205 void (*dup_mmap
)(struct mm_struct
*oldmm
,
206 struct mm_struct
*mm
);
207 void (*exit_mmap
)(struct mm_struct
*mm
);
211 void (*flush_tlb_user
)(void);
212 void (*flush_tlb_kernel
)(void);
213 void (*flush_tlb_single
)(unsigned long addr
);
214 void (*flush_tlb_others
)(const cpumask_t
*cpus
, struct mm_struct
*mm
,
217 /* Hooks for allocating/releasing pagetable pages */
218 void (*alloc_pt
)(struct mm_struct
*mm
, u32 pfn
);
219 void (*alloc_pd
)(u32 pfn
);
220 void (*alloc_pd_clone
)(u32 pfn
, u32 clonepfn
, u32 start
, u32 count
);
221 void (*release_pt
)(u32 pfn
);
222 void (*release_pd
)(u32 pfn
);
224 /* Pagetable manipulation functions */
225 void (*set_pte
)(pte_t
*ptep
, pte_t pteval
);
226 void (*set_pte_at
)(struct mm_struct
*mm
, unsigned long addr
,
227 pte_t
*ptep
, pte_t pteval
);
228 void (*set_pmd
)(pmd_t
*pmdp
, pmd_t pmdval
);
229 void (*pte_update
)(struct mm_struct
*mm
, unsigned long addr
, pte_t
*ptep
);
230 void (*pte_update_defer
)(struct mm_struct
*mm
,
231 unsigned long addr
, pte_t
*ptep
);
233 pteval_t (*pte_val
)(pte_t
);
234 pte_t (*make_pte
)(pteval_t pte
);
236 pgdval_t (*pgd_val
)(pgd_t
);
237 pgd_t (*make_pgd
)(pgdval_t pgd
);
239 #if PAGETABLE_LEVELS >= 3
240 #ifdef CONFIG_X86_PAE
241 void (*set_pte_atomic
)(pte_t
*ptep
, pte_t pteval
);
242 void (*set_pte_present
)(struct mm_struct
*mm
, unsigned long addr
,
243 pte_t
*ptep
, pte_t pte
);
244 void (*pte_clear
)(struct mm_struct
*mm
, unsigned long addr
, pte_t
*ptep
);
245 void (*pmd_clear
)(pmd_t
*pmdp
);
247 #endif /* CONFIG_X86_PAE */
249 void (*set_pud
)(pud_t
*pudp
, pud_t pudval
);
251 pmdval_t (*pmd_val
)(pmd_t
);
252 pmd_t (*make_pmd
)(pmdval_t pmd
);
254 #if PAGETABLE_LEVELS == 4
255 pudval_t (*pud_val
)(pud_t
);
256 pud_t (*make_pud
)(pudval_t pud
);
257 #endif /* PAGETABLE_LEVELS == 4 */
258 #endif /* PAGETABLE_LEVELS >= 3 */
260 #ifdef CONFIG_HIGHPTE
261 void *(*kmap_atomic_pte
)(struct page
*page
, enum km_type type
);
264 struct pv_lazy_ops lazy_mode
;
267 /* This contains all the paravirt structures: we get a convenient
268 * number for each function using the offset which we use to indicate
270 struct paravirt_patch_template
272 struct pv_init_ops pv_init_ops
;
273 struct pv_time_ops pv_time_ops
;
274 struct pv_cpu_ops pv_cpu_ops
;
275 struct pv_irq_ops pv_irq_ops
;
276 struct pv_apic_ops pv_apic_ops
;
277 struct pv_mmu_ops pv_mmu_ops
;
280 extern struct pv_info pv_info
;
281 extern struct pv_init_ops pv_init_ops
;
282 extern struct pv_time_ops pv_time_ops
;
283 extern struct pv_cpu_ops pv_cpu_ops
;
284 extern struct pv_irq_ops pv_irq_ops
;
285 extern struct pv_apic_ops pv_apic_ops
;
286 extern struct pv_mmu_ops pv_mmu_ops
;
288 #define PARAVIRT_PATCH(x) \
289 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
291 #define paravirt_type(op) \
292 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
293 [paravirt_opptr] "m" (op)
294 #define paravirt_clobber(clobber) \
295 [paravirt_clobber] "i" (clobber)
298 * Generate some code, and mark it as patchable by the
299 * apply_paravirt() alternate instruction patcher.
301 #define _paravirt_alt(insn_string, type, clobber) \
302 "771:\n\t" insn_string "\n" "772:\n" \
303 ".pushsection .parainstructions,\"a\"\n" \
306 " .byte " type "\n" \
307 " .byte 772b-771b\n" \
308 " .short " clobber "\n" \
311 /* Generate patchable code, with the default asm parameters. */
312 #define paravirt_alt(insn_string) \
313 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
315 /* Simple instruction patching code. */
316 #define DEF_NATIVE(ops, name, code) \
317 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
318 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
320 unsigned paravirt_patch_nop(void);
321 unsigned paravirt_patch_ignore(unsigned len
);
322 unsigned paravirt_patch_call(void *insnbuf
,
323 const void *target
, u16 tgt_clobbers
,
324 unsigned long addr
, u16 site_clobbers
,
326 unsigned paravirt_patch_jmp(void *insnbuf
, const void *target
,
327 unsigned long addr
, unsigned len
);
328 unsigned paravirt_patch_default(u8 type
, u16 clobbers
, void *insnbuf
,
329 unsigned long addr
, unsigned len
);
331 unsigned paravirt_patch_insns(void *insnbuf
, unsigned len
,
332 const char *start
, const char *end
);
334 unsigned native_patch(u8 type
, u16 clobbers
, void *ibuf
,
335 unsigned long addr
, unsigned len
);
337 int paravirt_disable_iospace(void);
340 * This generates an indirect call based on the operation type number.
341 * The type number, computed in PARAVIRT_PATCH, is derived from the
342 * offset into the paravirt_patch_template structure, and can therefore be
343 * freely converted back into a structure offset.
345 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
348 * These macros are intended to wrap calls through one of the paravirt
349 * ops structs, so that they can be later identified and patched at
352 * Normally, a call to a pv_op function is a simple indirect call:
353 * (pv_op_struct.operations)(args...).
355 * Unfortunately, this is a relatively slow operation for modern CPUs,
356 * because it cannot necessarily determine what the destination
357 * address is. In this case, the address is a runtime constant, so at
358 * the very least we can patch the call to e a simple direct call, or
359 * ideally, patch an inline implementation into the callsite. (Direct
360 * calls are essentially free, because the call and return addresses
361 * are completely predictable.)
363 * For i386, these macros rely on the standard gcc "regparm(3)" calling
364 * convention, in which the first three arguments are placed in %eax,
365 * %edx, %ecx (in that order), and the remaining arguments are placed
366 * on the stack. All caller-save registers (eax,edx,ecx) are expected
367 * to be modified (either clobbered or used for return values).
368 * X86_64, on the other hand, already specifies a register-based calling
369 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
370 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
371 * special handling for dealing with 4 arguments, unlike i386.
372 * However, x86_64 also have to clobber all caller saved registers, which
373 * unfortunately, are quite a bit (r8 - r11)
375 * The call instruction itself is marked by placing its start address
376 * and size into the .parainstructions section, so that
377 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
378 * appropriate patching under the control of the backend pv_init_ops
381 * Unfortunately there's no way to get gcc to generate the args setup
382 * for the call, and then allow the call itself to be generated by an
383 * inline asm. Because of this, we must do the complete arg setup and
384 * return value handling from within these macros. This is fairly
387 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
388 * It could be extended to more arguments, but there would be little
389 * to be gained from that. For each number of arguments, there are
390 * the two VCALL and CALL variants for void and non-void functions.
392 * When there is a return value, the invoker of the macro must specify
393 * the return type. The macro then uses sizeof() on that type to
394 * determine whether its a 32 or 64 bit value, and places the return
395 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
396 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
397 * the return value size.
399 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
400 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
403 * Small structures are passed and returned in registers. The macro
404 * calling convention can't directly deal with this, so the wrapper
405 * functions must do this.
407 * These PVOP_* macros are only defined within this header. This
408 * means that all uses must be wrapped in inline functions. This also
409 * makes sure the incoming and outgoing types are always correct.
412 #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx
413 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
414 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
416 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
417 #define EXTRA_CLOBBERS
418 #define VEXTRA_CLOBBERS
420 #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx
421 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
422 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
423 "=S" (__esi), "=d" (__edx), \
426 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
428 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
429 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
432 #define __PVOP_CALL(rettype, op, pre, post, ...) \
436 /* This is 32-bit specific, but is okay in 64-bit */ \
437 /* since this condition will never hold */ \
438 if (sizeof(rettype) > sizeof(unsigned long)) { \
440 paravirt_alt(PARAVIRT_CALL) \
442 : PVOP_CALL_CLOBBERS \
443 : paravirt_type(op), \
444 paravirt_clobber(CLBR_ANY), \
446 : "memory", "cc" EXTRA_CLOBBERS); \
447 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
450 paravirt_alt(PARAVIRT_CALL) \
452 : PVOP_CALL_CLOBBERS \
453 : paravirt_type(op), \
454 paravirt_clobber(CLBR_ANY), \
456 : "memory", "cc" EXTRA_CLOBBERS); \
457 __ret = (rettype)__eax; \
461 #define __PVOP_VCALL(op, pre, post, ...) \
465 paravirt_alt(PARAVIRT_CALL) \
467 : PVOP_VCALL_CLOBBERS \
468 : paravirt_type(op), \
469 paravirt_clobber(CLBR_ANY), \
471 : "memory", "cc" VEXTRA_CLOBBERS); \
474 #define PVOP_CALL0(rettype, op) \
475 __PVOP_CALL(rettype, op, "", "")
476 #define PVOP_VCALL0(op) \
477 __PVOP_VCALL(op, "", "")
479 #define PVOP_CALL1(rettype, op, arg1) \
480 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
481 #define PVOP_VCALL1(op, arg1) \
482 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
484 #define PVOP_CALL2(rettype, op, arg1, arg2) \
485 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
486 "1" ((unsigned long)(arg2)))
487 #define PVOP_VCALL2(op, arg1, arg2) \
488 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
489 "1" ((unsigned long)(arg2)))
491 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
492 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
493 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
494 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
495 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
496 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
498 /* This is the only difference in x86_64. We can make it much simpler */
500 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
501 __PVOP_CALL(rettype, op, \
502 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
503 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
504 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
505 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
507 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
508 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
509 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
511 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
512 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
513 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
514 "3"((unsigned long)(arg4)))
515 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
516 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
517 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
518 "3"((unsigned long)(arg4)))
521 static inline int paravirt_enabled(void)
523 return pv_info
.paravirt_enabled
;
526 static inline void load_sp0(struct tss_struct
*tss
,
527 struct thread_struct
*thread
)
529 PVOP_VCALL2(pv_cpu_ops
.load_sp0
, tss
, thread
);
532 #define ARCH_SETUP pv_init_ops.arch_setup();
533 static inline unsigned long get_wallclock(void)
535 return PVOP_CALL0(unsigned long, pv_time_ops
.get_wallclock
);
538 static inline int set_wallclock(unsigned long nowtime
)
540 return PVOP_CALL1(int, pv_time_ops
.set_wallclock
, nowtime
);
543 static inline void (*choose_time_init(void))(void)
545 return pv_time_ops
.time_init
;
548 /* The paravirtualized CPUID instruction. */
549 static inline void __cpuid(unsigned int *eax
, unsigned int *ebx
,
550 unsigned int *ecx
, unsigned int *edx
)
552 PVOP_VCALL4(pv_cpu_ops
.cpuid
, eax
, ebx
, ecx
, edx
);
556 * These special macros can be used to get or set a debugging register
558 static inline unsigned long paravirt_get_debugreg(int reg
)
560 return PVOP_CALL1(unsigned long, pv_cpu_ops
.get_debugreg
, reg
);
562 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
563 static inline void set_debugreg(unsigned long val
, int reg
)
565 PVOP_VCALL2(pv_cpu_ops
.set_debugreg
, reg
, val
);
568 static inline void clts(void)
570 PVOP_VCALL0(pv_cpu_ops
.clts
);
573 static inline unsigned long read_cr0(void)
575 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr0
);
578 static inline void write_cr0(unsigned long x
)
580 PVOP_VCALL1(pv_cpu_ops
.write_cr0
, x
);
583 static inline unsigned long read_cr2(void)
585 return PVOP_CALL0(unsigned long, pv_mmu_ops
.read_cr2
);
588 static inline void write_cr2(unsigned long x
)
590 PVOP_VCALL1(pv_mmu_ops
.write_cr2
, x
);
593 static inline unsigned long read_cr3(void)
595 return PVOP_CALL0(unsigned long, pv_mmu_ops
.read_cr3
);
598 static inline void write_cr3(unsigned long x
)
600 PVOP_VCALL1(pv_mmu_ops
.write_cr3
, x
);
603 static inline unsigned long read_cr4(void)
605 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr4
);
607 static inline unsigned long read_cr4_safe(void)
609 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr4_safe
);
612 static inline void write_cr4(unsigned long x
)
614 PVOP_VCALL1(pv_cpu_ops
.write_cr4
, x
);
617 static inline void raw_safe_halt(void)
619 PVOP_VCALL0(pv_irq_ops
.safe_halt
);
622 static inline void halt(void)
624 PVOP_VCALL0(pv_irq_ops
.safe_halt
);
627 static inline void wbinvd(void)
629 PVOP_VCALL0(pv_cpu_ops
.wbinvd
);
632 #define get_kernel_rpl() (pv_info.kernel_rpl)
634 static inline u64
paravirt_read_msr(unsigned msr
, int *err
)
636 return PVOP_CALL2(u64
, pv_cpu_ops
.read_msr
, msr
, err
);
638 static inline int paravirt_write_msr(unsigned msr
, unsigned low
, unsigned high
)
640 return PVOP_CALL3(int, pv_cpu_ops
.write_msr
, msr
, low
, high
);
643 /* These should all do BUG_ON(_err), but our headers are too tangled. */
644 #define rdmsr(msr,val1,val2) do { \
646 u64 _l = paravirt_read_msr(msr, &_err); \
651 #define wrmsr(msr,val1,val2) do { \
652 paravirt_write_msr(msr, val1, val2); \
655 #define rdmsrl(msr,val) do { \
657 val = paravirt_read_msr(msr, &_err); \
660 #define wrmsrl(msr,val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
661 #define wrmsr_safe(msr,a,b) paravirt_write_msr(msr, a, b)
663 /* rdmsr with exception handling */
664 #define rdmsr_safe(msr,a,b) ({ \
666 u64 _l = paravirt_read_msr(msr, &_err); \
672 static inline u64
paravirt_read_tsc(void)
674 return PVOP_CALL0(u64
, pv_cpu_ops
.read_tsc
);
677 #define rdtscl(low) do { \
678 u64 _l = paravirt_read_tsc(); \
682 #define rdtscll(val) (val = paravirt_read_tsc())
684 static inline unsigned long long paravirt_sched_clock(void)
686 return PVOP_CALL0(unsigned long long, pv_time_ops
.sched_clock
);
688 #define calculate_cpu_khz() (pv_time_ops.get_cpu_khz())
690 static inline unsigned long long paravirt_read_pmc(int counter
)
692 return PVOP_CALL1(u64
, pv_cpu_ops
.read_pmc
, counter
);
695 #define rdpmc(counter,low,high) do { \
696 u64 _l = paravirt_read_pmc(counter); \
701 static inline unsigned long long paravirt_rdtscp(unsigned int *aux
)
703 return PVOP_CALL1(u64
, pv_cpu_ops
.read_tscp
, aux
);
706 #define rdtscp(low, high, aux) \
709 unsigned long __val = paravirt_rdtscp(&__aux); \
710 (low) = (u32)__val; \
711 (high) = (u32)(__val >> 32); \
715 #define rdtscpll(val, aux) \
717 unsigned long __aux; \
718 val = paravirt_rdtscp(&__aux); \
722 static inline void load_TR_desc(void)
724 PVOP_VCALL0(pv_cpu_ops
.load_tr_desc
);
726 static inline void load_gdt(const struct desc_ptr
*dtr
)
728 PVOP_VCALL1(pv_cpu_ops
.load_gdt
, dtr
);
730 static inline void load_idt(const struct desc_ptr
*dtr
)
732 PVOP_VCALL1(pv_cpu_ops
.load_idt
, dtr
);
734 static inline void set_ldt(const void *addr
, unsigned entries
)
736 PVOP_VCALL2(pv_cpu_ops
.set_ldt
, addr
, entries
);
738 static inline void store_gdt(struct desc_ptr
*dtr
)
740 PVOP_VCALL1(pv_cpu_ops
.store_gdt
, dtr
);
742 static inline void store_idt(struct desc_ptr
*dtr
)
744 PVOP_VCALL1(pv_cpu_ops
.store_idt
, dtr
);
746 static inline unsigned long paravirt_store_tr(void)
748 return PVOP_CALL0(unsigned long, pv_cpu_ops
.store_tr
);
750 #define store_tr(tr) ((tr) = paravirt_store_tr())
751 static inline void load_TLS(struct thread_struct
*t
, unsigned cpu
)
753 PVOP_VCALL2(pv_cpu_ops
.load_tls
, t
, cpu
);
756 static inline void write_ldt_entry(struct desc_struct
*dt
, int entry
,
759 PVOP_VCALL3(pv_cpu_ops
.write_ldt_entry
, dt
, entry
, desc
);
762 static inline void write_gdt_entry(struct desc_struct
*dt
, int entry
,
763 void *desc
, int type
)
765 PVOP_VCALL4(pv_cpu_ops
.write_gdt_entry
, dt
, entry
, desc
, type
);
768 static inline void write_idt_entry(gate_desc
*dt
, int entry
, const gate_desc
*g
)
770 PVOP_VCALL3(pv_cpu_ops
.write_idt_entry
, dt
, entry
, g
);
772 static inline void set_iopl_mask(unsigned mask
)
774 PVOP_VCALL1(pv_cpu_ops
.set_iopl_mask
, mask
);
777 /* The paravirtualized I/O functions */
778 static inline void slow_down_io(void) {
779 pv_cpu_ops
.io_delay();
780 #ifdef REALLY_SLOW_IO
781 pv_cpu_ops
.io_delay();
782 pv_cpu_ops
.io_delay();
783 pv_cpu_ops
.io_delay();
787 #ifdef CONFIG_X86_LOCAL_APIC
789 * Basic functions accessing APICs.
791 static inline void apic_write(unsigned long reg
, u32 v
)
793 PVOP_VCALL2(pv_apic_ops
.apic_write
, reg
, v
);
796 static inline void apic_write_atomic(unsigned long reg
, u32 v
)
798 PVOP_VCALL2(pv_apic_ops
.apic_write_atomic
, reg
, v
);
801 static inline u32
apic_read(unsigned long reg
)
803 return PVOP_CALL1(unsigned long, pv_apic_ops
.apic_read
, reg
);
806 static inline void setup_boot_clock(void)
808 PVOP_VCALL0(pv_apic_ops
.setup_boot_clock
);
811 static inline void setup_secondary_clock(void)
813 PVOP_VCALL0(pv_apic_ops
.setup_secondary_clock
);
817 static inline void paravirt_post_allocator_init(void)
819 if (pv_init_ops
.post_allocator_init
)
820 (*pv_init_ops
.post_allocator_init
)();
823 static inline void paravirt_pagetable_setup_start(pgd_t
*base
)
825 (*pv_mmu_ops
.pagetable_setup_start
)(base
);
828 static inline void paravirt_pagetable_setup_done(pgd_t
*base
)
830 (*pv_mmu_ops
.pagetable_setup_done
)(base
);
834 static inline void startup_ipi_hook(int phys_apicid
, unsigned long start_eip
,
835 unsigned long start_esp
)
837 PVOP_VCALL3(pv_apic_ops
.startup_ipi_hook
,
838 phys_apicid
, start_eip
, start_esp
);
842 static inline void paravirt_activate_mm(struct mm_struct
*prev
,
843 struct mm_struct
*next
)
845 PVOP_VCALL2(pv_mmu_ops
.activate_mm
, prev
, next
);
848 static inline void arch_dup_mmap(struct mm_struct
*oldmm
,
849 struct mm_struct
*mm
)
851 PVOP_VCALL2(pv_mmu_ops
.dup_mmap
, oldmm
, mm
);
854 static inline void arch_exit_mmap(struct mm_struct
*mm
)
856 PVOP_VCALL1(pv_mmu_ops
.exit_mmap
, mm
);
859 static inline void __flush_tlb(void)
861 PVOP_VCALL0(pv_mmu_ops
.flush_tlb_user
);
863 static inline void __flush_tlb_global(void)
865 PVOP_VCALL0(pv_mmu_ops
.flush_tlb_kernel
);
867 static inline void __flush_tlb_single(unsigned long addr
)
869 PVOP_VCALL1(pv_mmu_ops
.flush_tlb_single
, addr
);
872 static inline void flush_tlb_others(cpumask_t cpumask
, struct mm_struct
*mm
,
875 PVOP_VCALL3(pv_mmu_ops
.flush_tlb_others
, &cpumask
, mm
, va
);
878 static inline void paravirt_alloc_pt(struct mm_struct
*mm
, unsigned pfn
)
880 PVOP_VCALL2(pv_mmu_ops
.alloc_pt
, mm
, pfn
);
882 static inline void paravirt_release_pt(unsigned pfn
)
884 PVOP_VCALL1(pv_mmu_ops
.release_pt
, pfn
);
887 static inline void paravirt_alloc_pd(unsigned pfn
)
889 PVOP_VCALL1(pv_mmu_ops
.alloc_pd
, pfn
);
892 static inline void paravirt_alloc_pd_clone(unsigned pfn
, unsigned clonepfn
,
893 unsigned start
, unsigned count
)
895 PVOP_VCALL4(pv_mmu_ops
.alloc_pd_clone
, pfn
, clonepfn
, start
, count
);
897 static inline void paravirt_release_pd(unsigned pfn
)
899 PVOP_VCALL1(pv_mmu_ops
.release_pd
, pfn
);
902 #ifdef CONFIG_HIGHPTE
903 static inline void *kmap_atomic_pte(struct page
*page
, enum km_type type
)
906 ret
= PVOP_CALL2(unsigned long, pv_mmu_ops
.kmap_atomic_pte
, page
, type
);
911 static inline void pte_update(struct mm_struct
*mm
, unsigned long addr
,
914 PVOP_VCALL3(pv_mmu_ops
.pte_update
, mm
, addr
, ptep
);
917 static inline void pte_update_defer(struct mm_struct
*mm
, unsigned long addr
,
920 PVOP_VCALL3(pv_mmu_ops
.pte_update_defer
, mm
, addr
, ptep
);
923 #ifdef CONFIG_X86_PAE
924 static inline pte_t
__pte(unsigned long long val
)
926 unsigned long long ret
= PVOP_CALL2(unsigned long long,
929 return (pte_t
) { .pte
= ret
};
932 static inline pmd_t
__pmd(unsigned long long val
)
934 return (pmd_t
) { PVOP_CALL2(unsigned long long, pv_mmu_ops
.make_pmd
,
938 static inline pgd_t
__pgd(unsigned long long val
)
940 return (pgd_t
) { PVOP_CALL2(unsigned long long, pv_mmu_ops
.make_pgd
,
944 static inline unsigned long long pte_val(pte_t x
)
946 return PVOP_CALL2(unsigned long long, pv_mmu_ops
.pte_val
,
947 x
.pte_low
, x
.pte_high
);
950 static inline unsigned long long pmd_val(pmd_t x
)
952 return PVOP_CALL2(unsigned long long, pv_mmu_ops
.pmd_val
,
956 static inline unsigned long long pgd_val(pgd_t x
)
958 return PVOP_CALL2(unsigned long long, pv_mmu_ops
.pgd_val
,
962 static inline void set_pte(pte_t
*ptep
, pte_t pteval
)
964 PVOP_VCALL3(pv_mmu_ops
.set_pte
, ptep
, pteval
.pte_low
, pteval
.pte_high
);
967 static inline void set_pte_at(struct mm_struct
*mm
, unsigned long addr
,
968 pte_t
*ptep
, pte_t pteval
)
971 pv_mmu_ops
.set_pte_at(mm
, addr
, ptep
, pteval
);
974 static inline void set_pte_atomic(pte_t
*ptep
, pte_t pteval
)
976 PVOP_VCALL3(pv_mmu_ops
.set_pte_atomic
, ptep
,
977 pteval
.pte_low
, pteval
.pte_high
);
980 static inline void set_pte_present(struct mm_struct
*mm
, unsigned long addr
,
981 pte_t
*ptep
, pte_t pte
)
984 pv_mmu_ops
.set_pte_present(mm
, addr
, ptep
, pte
);
987 static inline void set_pmd(pmd_t
*pmdp
, pmd_t pmdval
)
989 PVOP_VCALL3(pv_mmu_ops
.set_pmd
, pmdp
,
990 pmdval
.pmd
, pmdval
.pmd
>> 32);
993 static inline void set_pud(pud_t
*pudp
, pud_t pudval
)
995 PVOP_VCALL3(pv_mmu_ops
.set_pud
, pudp
,
996 pudval
.pgd
.pgd
, pudval
.pgd
.pgd
>> 32);
999 static inline void pte_clear(struct mm_struct
*mm
, unsigned long addr
, pte_t
*ptep
)
1001 PVOP_VCALL3(pv_mmu_ops
.pte_clear
, mm
, addr
, ptep
);
1004 static inline void pmd_clear(pmd_t
*pmdp
)
1006 PVOP_VCALL1(pv_mmu_ops
.pmd_clear
, pmdp
);
1009 #else /* !CONFIG_X86_PAE */
1011 static inline pte_t
__pte(unsigned long val
)
1013 return (pte_t
) { PVOP_CALL1(unsigned long, pv_mmu_ops
.make_pte
, val
) };
1016 static inline pgd_t
__pgd(unsigned long val
)
1018 return (pgd_t
) { PVOP_CALL1(unsigned long, pv_mmu_ops
.make_pgd
, val
) };
1021 static inline unsigned long pte_val(pte_t x
)
1023 return PVOP_CALL1(unsigned long, pv_mmu_ops
.pte_val
, x
.pte_low
);
1026 static inline unsigned long pgd_val(pgd_t x
)
1028 return PVOP_CALL1(unsigned long, pv_mmu_ops
.pgd_val
, x
.pgd
);
1031 static inline void set_pte(pte_t
*ptep
, pte_t pteval
)
1033 PVOP_VCALL2(pv_mmu_ops
.set_pte
, ptep
, pteval
.pte_low
);
1036 static inline void set_pte_at(struct mm_struct
*mm
, unsigned long addr
,
1037 pte_t
*ptep
, pte_t pteval
)
1039 PVOP_VCALL4(pv_mmu_ops
.set_pte_at
, mm
, addr
, ptep
, pteval
.pte_low
);
1042 static inline void set_pmd(pmd_t
*pmdp
, pmd_t pmdval
)
1044 PVOP_VCALL2(pv_mmu_ops
.set_pmd
, pmdp
, pmdval
.pud
.pgd
.pgd
);
1047 static inline void pmd_clear(pmd_t
*pmdp
)
1049 set_pmd(pmdp
, __pmd(0));
1052 static inline void pte_clear(struct mm_struct
*mm
, unsigned long addr
, pte_t
*ptep
)
1054 set_pte_at(mm
, addr
, ptep
, __pte(0));
1057 static inline void set_pte_atomic(pte_t
*ptep
, pte_t pte
)
1062 static inline void set_pte_present(struct mm_struct
*mm
, unsigned long addr
,
1063 pte_t
*ptep
, pte_t pte
)
1067 #endif /* CONFIG_X86_PAE */
1069 /* Lazy mode for batching updates / context switch */
1070 enum paravirt_lazy_mode
{
1076 enum paravirt_lazy_mode
paravirt_get_lazy_mode(void);
1077 void paravirt_enter_lazy_cpu(void);
1078 void paravirt_leave_lazy_cpu(void);
1079 void paravirt_enter_lazy_mmu(void);
1080 void paravirt_leave_lazy_mmu(void);
1081 void paravirt_leave_lazy(enum paravirt_lazy_mode mode
);
1083 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1084 static inline void arch_enter_lazy_cpu_mode(void)
1086 PVOP_VCALL0(pv_cpu_ops
.lazy_mode
.enter
);
1089 static inline void arch_leave_lazy_cpu_mode(void)
1091 PVOP_VCALL0(pv_cpu_ops
.lazy_mode
.leave
);
1094 static inline void arch_flush_lazy_cpu_mode(void)
1096 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU
)) {
1097 arch_leave_lazy_cpu_mode();
1098 arch_enter_lazy_cpu_mode();
1103 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1104 static inline void arch_enter_lazy_mmu_mode(void)
1106 PVOP_VCALL0(pv_mmu_ops
.lazy_mode
.enter
);
1109 static inline void arch_leave_lazy_mmu_mode(void)
1111 PVOP_VCALL0(pv_mmu_ops
.lazy_mode
.leave
);
1114 static inline void arch_flush_lazy_mmu_mode(void)
1116 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU
)) {
1117 arch_leave_lazy_mmu_mode();
1118 arch_enter_lazy_mmu_mode();
1122 void _paravirt_nop(void);
1123 #define paravirt_nop ((void *)_paravirt_nop)
1125 /* These all sit in the .parainstructions section to tell us what to patch. */
1126 struct paravirt_patch_site
{
1127 u8
*instr
; /* original instructions */
1128 u8 instrtype
; /* type of this instruction */
1129 u8 len
; /* length of original instruction */
1130 u16 clobbers
; /* what registers you may clobber */
1133 extern struct paravirt_patch_site __parainstructions
[],
1134 __parainstructions_end
[];
1136 #ifdef CONFIG_X86_32
1137 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1138 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1139 #define PV_FLAGS_ARG "0"
1140 #define PV_EXTRA_CLOBBERS
1141 #define PV_VEXTRA_CLOBBERS
1143 /* We save some registers, but all of them, that's too much. We clobber all
1144 * caller saved registers but the argument parameter */
1145 #define PV_SAVE_REGS "pushq %%rdi;"
1146 #define PV_RESTORE_REGS "popq %%rdi;"
1147 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx"
1148 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx"
1149 #define PV_FLAGS_ARG "D"
1152 static inline unsigned long __raw_local_save_flags(void)
1156 asm volatile(paravirt_alt(PV_SAVE_REGS
1160 : paravirt_type(pv_irq_ops
.save_fl
),
1161 paravirt_clobber(CLBR_EAX
)
1162 : "memory", "cc" PV_VEXTRA_CLOBBERS
);
1166 static inline void raw_local_irq_restore(unsigned long f
)
1168 asm volatile(paravirt_alt(PV_SAVE_REGS
1173 paravirt_type(pv_irq_ops
.restore_fl
),
1174 paravirt_clobber(CLBR_EAX
)
1175 : "memory", "cc" PV_EXTRA_CLOBBERS
);
1178 static inline void raw_local_irq_disable(void)
1180 asm volatile(paravirt_alt(PV_SAVE_REGS
1184 : paravirt_type(pv_irq_ops
.irq_disable
),
1185 paravirt_clobber(CLBR_EAX
)
1186 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS
);
1189 static inline void raw_local_irq_enable(void)
1191 asm volatile(paravirt_alt(PV_SAVE_REGS
1195 : paravirt_type(pv_irq_ops
.irq_enable
),
1196 paravirt_clobber(CLBR_EAX
)
1197 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS
);
1200 static inline unsigned long __raw_local_irq_save(void)
1204 f
= __raw_local_save_flags();
1205 raw_local_irq_disable();
1209 /* Make sure as little as possible of this mess escapes. */
1210 #undef PARAVIRT_CALL
1224 #else /* __ASSEMBLY__ */
1226 #define _PVSITE(ptype, clobbers, ops, word, algn) \
1230 .pushsection .parainstructions,"a"; \
1239 #ifdef CONFIG_X86_64
1240 #define PV_SAVE_REGS pushq %rax; pushq %rdi; pushq %rcx; pushq %rdx
1241 #define PV_RESTORE_REGS popq %rdx; popq %rcx; popq %rdi; popq %rax
1242 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1243 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1245 #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1246 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1247 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1248 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1251 #define INTERRUPT_RETURN \
1252 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1253 jmp *%cs:pv_cpu_ops+PV_CPU_iret)
1255 #define DISABLE_INTERRUPTS(clobbers) \
1256 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1258 call *%cs:pv_irq_ops+PV_IRQ_irq_disable; \
1261 #define ENABLE_INTERRUPTS(clobbers) \
1262 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1264 call *%cs:pv_irq_ops+PV_IRQ_irq_enable; \
1267 #define ENABLE_INTERRUPTS_SYSCALL_RET \
1268 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_syscall_ret),\
1270 jmp *%cs:pv_cpu_ops+PV_CPU_irq_enable_syscall_ret)
1273 #ifdef CONFIG_X86_32
1274 #define GET_CR0_INTO_EAX \
1275 push %ecx; push %edx; \
1276 call *pv_cpu_ops+PV_CPU_read_cr0; \
1280 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1282 call *pv_cpu_ops+PV_CPU_swapgs; \
1286 #define GET_CR2_INTO_RCX \
1287 call *pv_mmu_ops+PV_MMU_read_cr2; \
1293 #endif /* __ASSEMBLY__ */
1294 #endif /* CONFIG_PARAVIRT */
1295 #endif /* __ASM_PARAVIRT_H */