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1 #ifndef _X86_64_BITOPS_H
2 #define _X86_64_BITOPS_H
3
4 /*
5 * Copyright 1992, Linus Torvalds.
6 */
7
8
9 #ifdef CONFIG_SMP
10 #define LOCK_PREFIX "lock ; "
11 #else
12 #define LOCK_PREFIX ""
13 #endif
14
15 #define ADDR (*(volatile long *) addr)
16
17 /**
18 * set_bit - Atomically set a bit in memory
19 * @nr: the bit to set
20 * @addr: the address to start counting from
21 *
22 * This function is atomic and may not be reordered. See __set_bit()
23 * if you do not require the atomic guarantees.
24 * Note that @nr may be almost arbitrarily large; this function is not
25 * restricted to acting on a single-word quantity.
26 */
27 static __inline__ void set_bit(int nr, volatile void * addr)
28 {
29 __asm__ __volatile__( LOCK_PREFIX
30 "btsl %1,%0"
31 :"+m" (ADDR)
32 :"dIr" (nr) : "memory");
33 }
34
35 /**
36 * __set_bit - Set a bit in memory
37 * @nr: the bit to set
38 * @addr: the address to start counting from
39 *
40 * Unlike set_bit(), this function is non-atomic and may be reordered.
41 * If it's called on the same region of memory simultaneously, the effect
42 * may be that only one operation succeeds.
43 */
44 static __inline__ void __set_bit(int nr, volatile void * addr)
45 {
46 __asm__ volatile(
47 "btsl %1,%0"
48 :"+m" (ADDR)
49 :"dIr" (nr) : "memory");
50 }
51
52 /**
53 * clear_bit - Clears a bit in memory
54 * @nr: Bit to clear
55 * @addr: Address to start counting from
56 *
57 * clear_bit() is atomic and may not be reordered. However, it does
58 * not contain a memory barrier, so if it is used for locking purposes,
59 * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
60 * in order to ensure changes are visible on other processors.
61 */
62 static __inline__ void clear_bit(int nr, volatile void * addr)
63 {
64 __asm__ __volatile__( LOCK_PREFIX
65 "btrl %1,%0"
66 :"+m" (ADDR)
67 :"dIr" (nr));
68 }
69
70 static __inline__ void __clear_bit(int nr, volatile void * addr)
71 {
72 __asm__ __volatile__(
73 "btrl %1,%0"
74 :"+m" (ADDR)
75 :"dIr" (nr));
76 }
77
78 #define smp_mb__before_clear_bit() barrier()
79 #define smp_mb__after_clear_bit() barrier()
80
81 /**
82 * __change_bit - Toggle a bit in memory
83 * @nr: the bit to change
84 * @addr: the address to start counting from
85 *
86 * Unlike change_bit(), this function is non-atomic and may be reordered.
87 * If it's called on the same region of memory simultaneously, the effect
88 * may be that only one operation succeeds.
89 */
90 static __inline__ void __change_bit(int nr, volatile void * addr)
91 {
92 __asm__ __volatile__(
93 "btcl %1,%0"
94 :"+m" (ADDR)
95 :"dIr" (nr));
96 }
97
98 /**
99 * change_bit - Toggle a bit in memory
100 * @nr: Bit to change
101 * @addr: Address to start counting from
102 *
103 * change_bit() is atomic and may not be reordered.
104 * Note that @nr may be almost arbitrarily large; this function is not
105 * restricted to acting on a single-word quantity.
106 */
107 static __inline__ void change_bit(int nr, volatile void * addr)
108 {
109 __asm__ __volatile__( LOCK_PREFIX
110 "btcl %1,%0"
111 :"+m" (ADDR)
112 :"dIr" (nr));
113 }
114
115 /**
116 * test_and_set_bit - Set a bit and return its old value
117 * @nr: Bit to set
118 * @addr: Address to count from
119 *
120 * This operation is atomic and cannot be reordered.
121 * It also implies a memory barrier.
122 */
123 static __inline__ int test_and_set_bit(int nr, volatile void * addr)
124 {
125 int oldbit;
126
127 __asm__ __volatile__( LOCK_PREFIX
128 "btsl %2,%1\n\tsbbl %0,%0"
129 :"=r" (oldbit),"+m" (ADDR)
130 :"dIr" (nr) : "memory");
131 return oldbit;
132 }
133
134 /**
135 * __test_and_set_bit - Set a bit and return its old value
136 * @nr: Bit to set
137 * @addr: Address to count from
138 *
139 * This operation is non-atomic and can be reordered.
140 * If two examples of this operation race, one can appear to succeed
141 * but actually fail. You must protect multiple accesses with a lock.
142 */
143 static __inline__ int __test_and_set_bit(int nr, volatile void * addr)
144 {
145 int oldbit;
146
147 __asm__(
148 "btsl %2,%1\n\tsbbl %0,%0"
149 :"=r" (oldbit),"+m" (ADDR)
150 :"dIr" (nr));
151 return oldbit;
152 }
153
154 /**
155 * test_and_clear_bit - Clear a bit and return its old value
156 * @nr: Bit to clear
157 * @addr: Address to count from
158 *
159 * This operation is atomic and cannot be reordered.
160 * It also implies a memory barrier.
161 */
162 static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
163 {
164 int oldbit;
165
166 __asm__ __volatile__( LOCK_PREFIX
167 "btrl %2,%1\n\tsbbl %0,%0"
168 :"=r" (oldbit),"+m" (ADDR)
169 :"dIr" (nr) : "memory");
170 return oldbit;
171 }
172
173 /**
174 * __test_and_clear_bit - Clear a bit and return its old value
175 * @nr: Bit to clear
176 * @addr: Address to count from
177 *
178 * This operation is non-atomic and can be reordered.
179 * If two examples of this operation race, one can appear to succeed
180 * but actually fail. You must protect multiple accesses with a lock.
181 */
182 static __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
183 {
184 int oldbit;
185
186 __asm__(
187 "btrl %2,%1\n\tsbbl %0,%0"
188 :"=r" (oldbit),"+m" (ADDR)
189 :"dIr" (nr));
190 return oldbit;
191 }
192
193 /* WARNING: non atomic and it can be reordered! */
194 static __inline__ int __test_and_change_bit(int nr, volatile void * addr)
195 {
196 int oldbit;
197
198 __asm__ __volatile__(
199 "btcl %2,%1\n\tsbbl %0,%0"
200 :"=r" (oldbit),"+m" (ADDR)
201 :"dIr" (nr) : "memory");
202 return oldbit;
203 }
204
205 /**
206 * test_and_change_bit - Change a bit and return its old value
207 * @nr: Bit to change
208 * @addr: Address to count from
209 *
210 * This operation is atomic and cannot be reordered.
211 * It also implies a memory barrier.
212 */
213 static __inline__ int test_and_change_bit(int nr, volatile void * addr)
214 {
215 int oldbit;
216
217 __asm__ __volatile__( LOCK_PREFIX
218 "btcl %2,%1\n\tsbbl %0,%0"
219 :"=r" (oldbit),"+m" (ADDR)
220 :"dIr" (nr) : "memory");
221 return oldbit;
222 }
223
224 #if 0 /* Fool kernel-doc since it doesn't do macros yet */
225 /**
226 * test_bit - Determine whether a bit is set
227 * @nr: bit number to test
228 * @addr: Address to start counting from
229 */
230 static int test_bit(int nr, const volatile void * addr);
231 #endif
232
233 static __inline__ int constant_test_bit(int nr, const volatile void * addr)
234 {
235 return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
236 }
237
238 static __inline__ int variable_test_bit(int nr, volatile const void * addr)
239 {
240 int oldbit;
241
242 __asm__ __volatile__(
243 "btl %2,%1\n\tsbbl %0,%0"
244 :"=r" (oldbit)
245 :"m" (ADDR),"dIr" (nr));
246 return oldbit;
247 }
248
249 #define test_bit(nr,addr) \
250 (__builtin_constant_p(nr) ? \
251 constant_test_bit((nr),(addr)) : \
252 variable_test_bit((nr),(addr)))
253
254 #undef ADDR
255
256 extern long find_first_zero_bit(const unsigned long * addr, unsigned long size);
257 extern long find_next_zero_bit (const unsigned long * addr, long size, long offset);
258 extern long find_first_bit(const unsigned long * addr, unsigned long size);
259 extern long find_next_bit(const unsigned long * addr, long size, long offset);
260
261 /* return index of first bet set in val or max when no bit is set */
262 static inline unsigned long __scanbit(unsigned long val, unsigned long max)
263 {
264 asm("bsfq %1,%0 ; cmovz %2,%0" : "=&r" (val) : "r" (val), "r" (max));
265 return val;
266 }
267
268 #define find_first_bit(addr,size) \
269 ((__builtin_constant_p(size) && (size) <= BITS_PER_LONG ? \
270 (__scanbit(*(unsigned long *)addr,(size))) : \
271 find_first_bit(addr,size)))
272
273 #define find_next_bit(addr,size,off) \
274 ((__builtin_constant_p(size) && (size) <= BITS_PER_LONG ? \
275 ((off) + (__scanbit((*(unsigned long *)addr) >> (off),(size)-(off)))) : \
276 find_next_bit(addr,size,off)))
277
278 #define find_first_zero_bit(addr,size) \
279 ((__builtin_constant_p(size) && (size) <= BITS_PER_LONG ? \
280 (__scanbit(~*(unsigned long *)addr,(size))) : \
281 find_first_zero_bit(addr,size)))
282
283 #define find_next_zero_bit(addr,size,off) \
284 ((__builtin_constant_p(size) && (size) <= BITS_PER_LONG ? \
285 ((off)+(__scanbit(~(((*(unsigned long *)addr)) >> (off)),(size)-(off)))) : \
286 find_next_zero_bit(addr,size,off)))
287
288 /*
289 * Find string of zero bits in a bitmap. -1 when not found.
290 */
291 extern unsigned long
292 find_next_zero_string(unsigned long *bitmap, long start, long nbits, int len);
293
294 static inline void set_bit_string(unsigned long *bitmap, unsigned long i,
295 int len)
296 {
297 unsigned long end = i + len;
298 while (i < end) {
299 __set_bit(i, bitmap);
300 i++;
301 }
302 }
303
304 static inline void __clear_bit_string(unsigned long *bitmap, unsigned long i,
305 int len)
306 {
307 unsigned long end = i + len;
308 while (i < end) {
309 __clear_bit(i, bitmap);
310 i++;
311 }
312 }
313
314 /**
315 * ffz - find first zero in word.
316 * @word: The word to search
317 *
318 * Undefined if no zero exists, so code should check against ~0UL first.
319 */
320 static __inline__ unsigned long ffz(unsigned long word)
321 {
322 __asm__("bsfq %1,%0"
323 :"=r" (word)
324 :"r" (~word));
325 return word;
326 }
327
328 /**
329 * __ffs - find first bit in word.
330 * @word: The word to search
331 *
332 * Undefined if no bit exists, so code should check against 0 first.
333 */
334 static __inline__ unsigned long __ffs(unsigned long word)
335 {
336 __asm__("bsfq %1,%0"
337 :"=r" (word)
338 :"rm" (word));
339 return word;
340 }
341
342 /*
343 * __fls: find last bit set.
344 * @word: The word to search
345 *
346 * Undefined if no zero exists, so code should check against ~0UL first.
347 */
348 static __inline__ unsigned long __fls(unsigned long word)
349 {
350 __asm__("bsrq %1,%0"
351 :"=r" (word)
352 :"rm" (word));
353 return word;
354 }
355
356 #ifdef __KERNEL__
357
358 #include <asm-generic/bitops/sched.h>
359
360 /**
361 * ffs - find first bit set
362 * @x: the word to search
363 *
364 * This is defined the same way as
365 * the libc and compiler builtin ffs routines, therefore
366 * differs in spirit from the above ffz (man ffs).
367 */
368 static __inline__ int ffs(int x)
369 {
370 int r;
371
372 __asm__("bsfl %1,%0\n\t"
373 "cmovzl %2,%0"
374 : "=r" (r) : "rm" (x), "r" (-1));
375 return r+1;
376 }
377
378 /**
379 * fls64 - find last bit set in 64 bit word
380 * @x: the word to search
381 *
382 * This is defined the same way as fls.
383 */
384 static __inline__ int fls64(__u64 x)
385 {
386 if (x == 0)
387 return 0;
388 return __fls(x) + 1;
389 }
390
391 /**
392 * fls - find last bit set
393 * @x: the word to search
394 *
395 * This is defined the same way as ffs.
396 */
397 static __inline__ int fls(int x)
398 {
399 int r;
400
401 __asm__("bsrl %1,%0\n\t"
402 "cmovzl %2,%0"
403 : "=&r" (r) : "rm" (x), "rm" (-1));
404 return r+1;
405 }
406
407 #include <asm-generic/bitops/hweight.h>
408
409 #endif /* __KERNEL__ */
410
411 #ifdef __KERNEL__
412
413 #include <asm-generic/bitops/ext2-non-atomic.h>
414
415 #define ext2_set_bit_atomic(lock,nr,addr) \
416 test_and_set_bit((nr),(unsigned long*)addr)
417 #define ext2_clear_bit_atomic(lock,nr,addr) \
418 test_and_clear_bit((nr),(unsigned long*)addr)
419
420 #include <asm-generic/bitops/minix.h>
421
422 #endif /* __KERNEL__ */
423
424 #endif /* _X86_64_BITOPS_H */