5 * We need the APIC definitions automatically as part of 'smp.h'
8 #include <linux/threads.h>
9 #include <linux/cpumask.h>
10 #include <linux/bitops.h>
11 extern int disable_apic
;
14 #ifdef CONFIG_X86_LOCAL_APIC
16 #include <asm/fixmap.h>
17 #include <asm/mpspec.h>
18 #ifdef CONFIG_X86_IO_APIC
19 #include <asm/io_apic.h>
22 #include <asm/thread_info.h>
33 extern cpumask_t cpu_present_mask
;
34 extern cpumask_t cpu_possible_map
;
35 extern cpumask_t cpu_online_map
;
36 extern cpumask_t cpu_callout_map
;
37 extern cpumask_t cpu_initialized
;
40 * Private routines/data
43 extern void smp_alloc_memory(void);
44 extern volatile unsigned long smp_invalidate_needed
;
46 extern void lock_ipi_call_lock(void);
47 extern void unlock_ipi_call_lock(void);
48 extern int smp_num_siblings
;
49 extern void smp_send_reschedule(int cpu
);
50 void smp_stop_cpu(void);
52 extern cpumask_t cpu_sibling_map
[NR_CPUS
];
53 extern cpumask_t cpu_core_map
[NR_CPUS
];
54 extern u8 cpu_llc_id
[NR_CPUS
];
56 #define SMP_TRAMPOLINE_BASE 0x6000
59 * On x86 all CPUs are mapped 1:1 to the APIC space.
60 * This simplifies scheduling and IPI sending and
61 * compresses data structures.
64 static inline int num_booting_cpus(void)
66 return cpus_weight(cpu_callout_map
);
69 #define raw_smp_processor_id() read_pda(cpunumber)
71 static inline int hard_smp_processor_id(void)
73 /* we don't want to mark this access volatile - bad code generation */
74 return GET_APIC_ID(*(unsigned int *)(APIC_BASE
+APIC_ID
));
77 extern int safe_smp_processor_id(void);
78 extern int __cpu_disable(void);
79 extern void __cpu_die(unsigned int cpu
);
80 extern void prefill_possible_map(void);
81 extern unsigned num_processors
;
82 extern unsigned disabled_cpus
;
84 #endif /* !ASSEMBLY */
86 #define NO_PROC_ID 0xFF /* No processor magic marker */
92 * Some lowlevel functions might want to know about
93 * the real APIC ID <-> CPU # mapping.
95 extern u8 x86_cpu_to_apicid
[NR_CPUS
]; /* physical ID */
96 extern u8 x86_cpu_to_log_apicid
[NR_CPUS
];
97 extern u8 bios_cpu_apicid
[];
99 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask
)
101 return cpus_addr(cpumask
)[0];
104 static inline int cpu_present_to_apicid(int mps_cpu
)
106 if (mps_cpu
< NR_CPUS
)
107 return (int)bios_cpu_apicid
[mps_cpu
];
112 #endif /* !ASSEMBLY */
115 #define stack_smp_processor_id() 0
116 #define safe_smp_processor_id() 0
117 #define cpu_logical_map(x) (x)
119 #include <asm/thread_info.h>
120 #define stack_smp_processor_id() \
122 struct thread_info *ti; \
123 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
129 static __inline
int logical_smp_processor_id(void)
131 /* we don't want to mark this access volatile - bad code generation */
132 return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE
+APIC_LDR
));
137 #define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
139 #define cpu_physical_id(cpu) boot_cpu_id