include/exec/cpu-all.h

   1 /*
   2  * defines common to all virtual CPUs
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #ifndef CPU_ALL_H
  20 #define CPU_ALL_H
  21
  22 #include "qemu-common.h"
  23 #include "exec/cpu-common.h"
  24 #include "exec/memory.h"
  25 #include "qemu/thread.h"
  26 #include "qom/cpu.h"
  27
  28 /* some important defines:
  29  *
  30  * WORDS_ALIGNED : if defined, the host cpu can only make word aligned
  31  * memory accesses.
  32  *
  33  * HOST_WORDS_BIGENDIAN : if defined, the host cpu is big endian and
  34  * otherwise little endian.
  35  *
  36  * (TARGET_WORDS_ALIGNED : same for target cpu (not supported yet))
  37  *
  38  * TARGET_WORDS_BIGENDIAN : same for target cpu
  39  */
  40
  41 #if defined(HOST_WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
  42 #define BSWAP_NEEDED
  43 #endif
  44
  45 #ifdef BSWAP_NEEDED
  46
  47 static inline uint16_t tswap16(uint16_t s)
  48 {
  49     return bswap16(s);
  50 }
  51
  52 static inline uint32_t tswap32(uint32_t s)
  53 {
  54     return bswap32(s);
  55 }
  56
  57 static inline uint64_t tswap64(uint64_t s)
  58 {
  59     return bswap64(s);
  60 }
  61
  62 static inline void tswap16s(uint16_t *s)
  63 {
  64     *s = bswap16(*s);
  65 }
  66
  67 static inline void tswap32s(uint32_t *s)
  68 {
  69     *s = bswap32(*s);
  70 }
  71
  72 static inline void tswap64s(uint64_t *s)
  73 {
  74     *s = bswap64(*s);
  75 }
  76
  77 #else
  78
  79 static inline uint16_t tswap16(uint16_t s)
  80 {
  81     return s;
  82 }
  83
  84 static inline uint32_t tswap32(uint32_t s)
  85 {
  86     return s;
  87 }
  88
  89 static inline uint64_t tswap64(uint64_t s)
  90 {
  91     return s;
  92 }
  93
  94 static inline void tswap16s(uint16_t *s)
  95 {
  96 }
  97
  98 static inline void tswap32s(uint32_t *s)
  99 {
 100 }
 101
 102 static inline void tswap64s(uint64_t *s)
 103 {
 104 }
 105
 106 #endif
 107
 108 #if TARGET_LONG_SIZE == 4
 109 #define tswapl(s) tswap32(s)
 110 #define tswapls(s) tswap32s((uint32_t *)(s))
 111 #define bswaptls(s) bswap32s(s)
 112 #else
 113 #define tswapl(s) tswap64(s)
 114 #define tswapls(s) tswap64s((uint64_t *)(s))
 115 #define bswaptls(s) bswap64s(s)
 116 #endif
 117
 118 /* Target-endianness CPU memory access functions. These fit into the
 119  * {ld,st}{type}{sign}{size}{endian}_p naming scheme described in bswap.h.
 120  */
 121 #if defined(TARGET_WORDS_BIGENDIAN)
 122 #define lduw_p(p) lduw_be_p(p)
 123 #define ldsw_p(p) ldsw_be_p(p)
 124 #define ldl_p(p) ldl_be_p(p)
 125 #define ldq_p(p) ldq_be_p(p)
 126 #define ldfl_p(p) ldfl_be_p(p)
 127 #define ldfq_p(p) ldfq_be_p(p)
 128 #define stw_p(p, v) stw_be_p(p, v)
 129 #define stl_p(p, v) stl_be_p(p, v)
 130 #define stq_p(p, v) stq_be_p(p, v)
 131 #define stfl_p(p, v) stfl_be_p(p, v)
 132 #define stfq_p(p, v) stfq_be_p(p, v)
 133 #else
 134 #define lduw_p(p) lduw_le_p(p)
 135 #define ldsw_p(p) ldsw_le_p(p)
 136 #define ldl_p(p) ldl_le_p(p)
 137 #define ldq_p(p) ldq_le_p(p)
 138 #define ldfl_p(p) ldfl_le_p(p)
 139 #define ldfq_p(p) ldfq_le_p(p)
 140 #define stw_p(p, v) stw_le_p(p, v)
 141 #define stl_p(p, v) stl_le_p(p, v)
 142 #define stq_p(p, v) stq_le_p(p, v)
 143 #define stfl_p(p, v) stfl_le_p(p, v)
 144 #define stfq_p(p, v) stfq_le_p(p, v)
 145 #endif
 146
 147 /* MMU memory access macros */
 148
 149 #if defined(CONFIG_USER_ONLY)
 150 #include <assert.h>
 151 #include "exec/user/abitypes.h"
 152
 153 /* On some host systems the guest address space is reserved on the host.
 154  * This allows the guest address space to be offset to a convenient location.
 155  */
 156 #if defined(CONFIG_USE_GUEST_BASE)
 157 extern unsigned long guest_base;
 158 extern int have_guest_base;
 159 extern unsigned long reserved_va;
 160 #define GUEST_BASE guest_base
 161 #define RESERVED_VA reserved_va
 162 #else
 163 #define GUEST_BASE 0ul
 164 #define RESERVED_VA 0ul
 165 #endif
 166
 167 #define GUEST_ADDR_MAX (RESERVED_VA ? RESERVED_VA : \
 168                                     (1ul << TARGET_VIRT_ADDR_SPACE_BITS) - 1)
 169 #endif
 170
 171 /* page related stuff */
 172
 173 #define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
 174 #define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1)
 175 #define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK)
 176
 177 /* ??? These should be the larger of uintptr_t and target_ulong.  */
 178 extern uintptr_t qemu_real_host_page_size;
 179 extern uintptr_t qemu_host_page_size;
 180 extern uintptr_t qemu_host_page_mask;
 181
 182 #define HOST_PAGE_ALIGN(addr) (((addr) + qemu_host_page_size - 1) & qemu_host_page_mask)
 183
 184 /* same as PROT_xxx */
 185 #define PAGE_READ      0x0001
 186 #define PAGE_WRITE     0x0002
 187 #define PAGE_EXEC      0x0004
 188 #define PAGE_BITS      (PAGE_READ | PAGE_WRITE | PAGE_EXEC)
 189 #define PAGE_VALID     0x0008
 190 /* original state of the write flag (used when tracking self-modifying
 191    code */
 192 #define PAGE_WRITE_ORG 0x0010
 193 #if defined(CONFIG_BSD) && defined(CONFIG_USER_ONLY)
 194 /* FIXME: Code that sets/uses this is broken and needs to go away.  */
 195 #define PAGE_RESERVED  0x0020
 196 #endif
 197
 198 #if defined(CONFIG_USER_ONLY)
 199 void page_dump(FILE *f);
 200
 201 typedef int (*walk_memory_regions_fn)(void *, target_ulong,
 202                                       target_ulong, unsigned long);
 203 int walk_memory_regions(void *, walk_memory_regions_fn);
 204
 205 int page_get_flags(target_ulong address);
 206 void page_set_flags(target_ulong start, target_ulong end, int flags);
 207 int page_check_range(target_ulong start, target_ulong len, int flags);
 208 #endif
 209
 210 CPUArchState *cpu_copy(CPUArchState *env);
 211
 212 /* Flags for use in ENV->INTERRUPT_PENDING.
 213
 214    The numbers assigned here are non-sequential in order to preserve
 215    binary compatibility with the vmstate dump.  Bit 0 (0x0001) was
 216    previously used for CPU_INTERRUPT_EXIT, and is cleared when loading
 217    the vmstate dump.  */
 218
 219 /* External hardware interrupt pending.  This is typically used for
 220    interrupts from devices.  */
 221 #define CPU_INTERRUPT_HARD        0x0002
 222
 223 /* Exit the current TB.  This is typically used when some system-level device
 224    makes some change to the memory mapping.  E.g. the a20 line change.  */
 225 #define CPU_INTERRUPT_EXITTB      0x0004
 226
 227 /* Halt the CPU.  */
 228 #define CPU_INTERRUPT_HALT        0x0020
 229
 230 /* Debug event pending.  */
 231 #define CPU_INTERRUPT_DEBUG       0x0080
 232
 233 /* Reset signal.  */
 234 #define CPU_INTERRUPT_RESET       0x0400
 235
 236 /* Several target-specific external hardware interrupts.  Each target/cpu.h
 237    should define proper names based on these defines.  */
 238 #define CPU_INTERRUPT_TGT_EXT_0   0x0008
 239 #define CPU_INTERRUPT_TGT_EXT_1   0x0010
 240 #define CPU_INTERRUPT_TGT_EXT_2   0x0040
 241 #define CPU_INTERRUPT_TGT_EXT_3   0x0200
 242 #define CPU_INTERRUPT_TGT_EXT_4   0x1000
 243
 244 /* Several target-specific internal interrupts.  These differ from the
 245    preceding target-specific interrupts in that they are intended to
 246    originate from within the cpu itself, typically in response to some
 247    instruction being executed.  These, therefore, are not masked while
 248    single-stepping within the debugger.  */
 249 #define CPU_INTERRUPT_TGT_INT_0   0x0100
 250 #define CPU_INTERRUPT_TGT_INT_1   0x0800
 251 #define CPU_INTERRUPT_TGT_INT_2   0x2000
 252
 253 /* First unused bit: 0x4000.  */
 254
 255 /* The set of all bits that should be masked when single-stepping.  */
 256 #define CPU_INTERRUPT_SSTEP_MASK \
 257     (CPU_INTERRUPT_HARD          \
 258      | CPU_INTERRUPT_TGT_EXT_0   \
 259      | CPU_INTERRUPT_TGT_EXT_1   \
 260      | CPU_INTERRUPT_TGT_EXT_2   \
 261      | CPU_INTERRUPT_TGT_EXT_3   \
 262      | CPU_INTERRUPT_TGT_EXT_4)
 263
 264 #if !defined(CONFIG_USER_ONLY)
 265
 266 /* memory API */
 267
 268 typedef struct RAMBlock RAMBlock;
 269
 270 struct RAMBlock {
 271     struct MemoryRegion *mr;
 272     uint8_t *host;
 273     ram_addr_t offset;
 274     ram_addr_t used_length;
 275     ram_addr_t max_length;
 276     void (*resized)(const char*, uint64_t length, void *host);
 277     uint32_t flags;
 278     char idstr[256];
 279     /* Reads can take either the iothread or the ramlist lock.
 280      * Writes must take both locks.
 281      */
 282     QTAILQ_ENTRY(RAMBlock) next;
 283     int fd;
 284 };
 285
 286 static inline void *ramblock_ptr(RAMBlock *block, ram_addr_t offset)
 287 {
 288     assert(offset < block->used_length);
 289     assert(block->host);
 290     return (char *)block->host + offset;
 291 }
 292
 293 typedef struct RAMList {
 294     QemuMutex mutex;
 295     /* Protected by the iothread lock.  */
 296     unsigned long *dirty_memory[DIRTY_MEMORY_NUM];
 297     RAMBlock *mru_block;
 298     /* Protected by the ramlist lock.  */
 299     QTAILQ_HEAD(, RAMBlock) blocks;
 300     uint32_t version;
 301 } RAMList;
 302 extern RAMList ram_list;
 303
 304 /* Flags stored in the low bits of the TLB virtual address.  These are
 305    defined so that fast path ram access is all zeros.  */
 306 /* Zero if TLB entry is valid.  */
 307 #define TLB_INVALID_MASK   (1 << 3)
 308 /* Set if TLB entry references a clean RAM page.  The iotlb entry will
 309    contain the page physical address.  */
 310 #define TLB_NOTDIRTY    (1 << 4)
 311 /* Set if TLB entry is an IO callback.  */
 312 #define TLB_MMIO        (1 << 5)
 313
 314 void dump_exec_info(FILE *f, fprintf_function cpu_fprintf);
 315 void dump_opcount_info(FILE *f, fprintf_function cpu_fprintf);
 316 ram_addr_t last_ram_offset(void);
 317 void qemu_mutex_lock_ramlist(void);
 318 void qemu_mutex_unlock_ramlist(void);
 319 #endif /* !CONFIG_USER_ONLY */
 320
 321 int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
 322                         uint8_t *buf, int len, int is_write);
 323
 324 #endif /* CPU_ALL_H */