include/exec/translator.h

   1 /*
   2  * Generic intermediate code generation.
   3  *
   4  * Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu>
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7  * See the COPYING file in the top-level directory.
   8  */
   9
  10 #ifndef EXEC__TRANSLATOR_H
  11 #define EXEC__TRANSLATOR_H
  12
  13 /*
  14  * Include this header from a target-specific file, and add a
  15  *
  16  *     DisasContextBase base;
  17  *
  18  * member in your target-specific DisasContext.
  19  */
  20
  21
  22 #include "qemu/bswap.h"
  23 #include "exec/exec-all.h"
  24 #include "exec/cpu_ldst.h"
  25 #include "exec/plugin-gen.h"
  26 #include "exec/translate-all.h"
  27 #include "tcg/tcg.h"
  28
  29 /**
  30  * gen_intermediate_code
  31  * @cpu: cpu context
  32  * @tb: translation block
  33  * @max_insns: max number of instructions to translate
  34  * @pc: guest virtual program counter address
  35  * @host_pc: host physical program counter address
  36  *
  37  * This function must be provided by the target, which should create
  38  * the target-specific DisasContext, and then invoke translator_loop.
  39  */
  40 void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int *max_insns,
  41                            target_ulong pc, void *host_pc);
  42
  43 /**
  44  * DisasJumpType:
  45  * @DISAS_NEXT: Next instruction in program order.
  46  * @DISAS_TOO_MANY: Too many instructions translated.
  47  * @DISAS_NORETURN: Following code is dead.
  48  * @DISAS_TARGET_*: Start of target-specific conditions.
  49  *
  50  * What instruction to disassemble next.
  51  */
  52 typedef enum DisasJumpType {
  53     DISAS_NEXT,
  54     DISAS_TOO_MANY,
  55     DISAS_NORETURN,
  56     DISAS_TARGET_0,
  57     DISAS_TARGET_1,
  58     DISAS_TARGET_2,
  59     DISAS_TARGET_3,
  60     DISAS_TARGET_4,
  61     DISAS_TARGET_5,
  62     DISAS_TARGET_6,
  63     DISAS_TARGET_7,
  64     DISAS_TARGET_8,
  65     DISAS_TARGET_9,
  66     DISAS_TARGET_10,
  67     DISAS_TARGET_11,
  68 } DisasJumpType;
  69
  70 /**
  71  * DisasContextBase:
  72  * @tb: Translation block for this disassembly.
  73  * @pc_first: Address of first guest instruction in this TB.
  74  * @pc_next: Address of next guest instruction in this TB (current during
  75  *           disassembly).
  76  * @is_jmp: What instruction to disassemble next.
  77  * @num_insns: Number of translated instructions (including current).
  78  * @max_insns: Maximum number of instructions to be translated in this TB.
  79  * @singlestep_enabled: "Hardware" single stepping enabled.
  80  *
  81  * Architecture-agnostic disassembly context.
  82  */
  83 typedef struct DisasContextBase {
  84     TranslationBlock *tb;
  85     target_ulong pc_first;
  86     target_ulong pc_next;
  87     DisasJumpType is_jmp;
  88     int num_insns;
  89     int max_insns;
  90     bool singlestep_enabled;
  91     void *host_addr[2];
  92 } DisasContextBase;
  93
  94 /**
  95  * TranslatorOps:
  96  * @init_disas_context:
  97  *      Initialize the target-specific portions of DisasContext struct.
  98  *      The generic DisasContextBase has already been initialized.
  99  *
 100  * @tb_start:
 101  *      Emit any code required before the start of the main loop,
 102  *      after the generic gen_tb_start().
 103  *
 104  * @insn_start:
 105  *      Emit the tcg_gen_insn_start opcode.
 106  *
 107  * @translate_insn:
 108  *      Disassemble one instruction and set db->pc_next for the start
 109  *      of the following instruction.  Set db->is_jmp as necessary to
 110  *      terminate the main loop.
 111  *
 112  * @tb_stop:
 113  *      Emit any opcodes required to exit the TB, based on db->is_jmp.
 114  *
 115  * @disas_log:
 116  *      Print instruction disassembly to log.
 117  */
 118 typedef struct TranslatorOps {
 119     void (*init_disas_context)(DisasContextBase *db, CPUState *cpu);
 120     void (*tb_start)(DisasContextBase *db, CPUState *cpu);
 121     void (*insn_start)(DisasContextBase *db, CPUState *cpu);
 122     void (*translate_insn)(DisasContextBase *db, CPUState *cpu);
 123     void (*tb_stop)(DisasContextBase *db, CPUState *cpu);
 124     void (*disas_log)(const DisasContextBase *db, CPUState *cpu, FILE *f);
 125 } TranslatorOps;
 126
 127 /**
 128  * translator_loop:
 129  * @cpu: Target vCPU.
 130  * @tb: Translation block.
 131  * @max_insns: Maximum number of insns to translate.
 132  * @pc: guest virtual program counter address
 133  * @host_pc: host physical program counter address
 134  * @ops: Target-specific operations.
 135  * @db: Disassembly context.
 136  *
 137  * Generic translator loop.
 138  *
 139  * Translation will stop in the following cases (in order):
 140  * - When is_jmp set by #TranslatorOps::breakpoint_check.
 141  *   - set to DISAS_TOO_MANY exits after translating one more insn
 142  *   - set to any other value than DISAS_NEXT exits immediately.
 143  * - When is_jmp set by #TranslatorOps::translate_insn.
 144  *   - set to any value other than DISAS_NEXT exits immediately.
 145  * - When the TCG operation buffer is full.
 146  * - When single-stepping is enabled (system-wide or on the current vCPU).
 147  * - When too many instructions have been translated.
 148  */
 149 void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
 150                      target_ulong pc, void *host_pc,
 151                      const TranslatorOps *ops, DisasContextBase *db);
 152
 153 void translator_loop_temp_check(DisasContextBase *db);
 154
 155 /**
 156  * translator_use_goto_tb
 157  * @db: Disassembly context
 158  * @dest: target pc of the goto
 159  *
 160  * Return true if goto_tb is allowed between the current TB
 161  * and the destination PC.
 162  */
 163 bool translator_use_goto_tb(DisasContextBase *db, target_ulong dest);
 164
 165 /*
 166  * Translator Load Functions
 167  *
 168  * These are intended to replace the direct usage of the cpu_ld*_code
 169  * functions and are mandatory for front-ends that have been migrated
 170  * to the common translator_loop. These functions are only intended
 171  * to be called from the translation stage and should not be called
 172  * from helper functions. Those functions should be converted to encode
 173  * the relevant information at translation time.
 174  */
 175
 176 uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, abi_ptr pc);
 177 uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, abi_ptr pc);
 178 uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, abi_ptr pc);
 179 uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, abi_ptr pc);
 180
 181 static inline uint16_t
 182 translator_lduw_swap(CPUArchState *env, DisasContextBase *db,
 183                      abi_ptr pc, bool do_swap)
 184 {
 185     uint16_t ret = translator_lduw(env, db, pc);
 186     if (do_swap) {
 187         ret = bswap16(ret);
 188     }
 189     return ret;
 190 }
 191
 192 static inline uint32_t
 193 translator_ldl_swap(CPUArchState *env, DisasContextBase *db,
 194                     abi_ptr pc, bool do_swap)
 195 {
 196     uint32_t ret = translator_ldl(env, db, pc);
 197     if (do_swap) {
 198         ret = bswap32(ret);
 199     }
 200     return ret;
 201 }
 202
 203 static inline uint64_t
 204 translator_ldq_swap(CPUArchState *env, DisasContextBase *db,
 205                     abi_ptr pc, bool do_swap)
 206 {
 207     uint64_t ret = translator_ldq(env, db, pc);
 208     if (do_swap) {
 209         ret = bswap64(ret);
 210     }
 211     return ret;
 212 }
 213
 214 /**
 215  * translator_fake_ldb - fake instruction load
 216  * @insn8: byte of instruction
 217  * @pc: program counter of instruction
 218  *
 219  * This is a special case helper used where the instruction we are
 220  * about to translate comes from somewhere else (e.g. being
 221  * re-synthesised for s390x "ex"). It ensures we update other areas of
 222  * the translator with details of the executed instruction.
 223  */
 224
 225 static inline void translator_fake_ldb(uint8_t insn8, abi_ptr pc)
 226 {
 227     plugin_insn_append(pc, &insn8, sizeof(insn8));
 228 }
 229
 230
 231 /*
 232  * Return whether addr is on the same page as where disassembly started.
 233  * Translators can use this to enforce the rule that only single-insn
 234  * translation blocks are allowed to cross page boundaries.
 235  */
 236 static inline bool is_same_page(const DisasContextBase *db, target_ulong addr)
 237 {
 238     return ((addr ^ db->pc_first) & TARGET_PAGE_MASK) == 0;
 239 }
 240
 241 #endif /* EXEC__TRANSLATOR_H */