include/hw/acpi/acpi-defs.h

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License as published by
   4  * the Free Software Foundation; either version 2 of the License, or
   5  * (at your option) any later version.
   6
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11
  12  * You should have received a copy of the GNU General Public License along
  13  * with this program; if not, see <http://www.gnu.org/licenses/>.
  14  */
  15 #ifndef QEMU_ACPI_DEFS_H
  16 #define QEMU_ACPI_DEFS_H
  17
  18 enum {
  19     ACPI_FADT_F_WBINVD,
  20     ACPI_FADT_F_WBINVD_FLUSH,
  21     ACPI_FADT_F_PROC_C1,
  22     ACPI_FADT_F_P_LVL2_UP,
  23     ACPI_FADT_F_PWR_BUTTON,
  24     ACPI_FADT_F_SLP_BUTTON,
  25     ACPI_FADT_F_FIX_RTC,
  26     ACPI_FADT_F_RTC_S4,
  27     ACPI_FADT_F_TMR_VAL_EXT,
  28     ACPI_FADT_F_DCK_CAP,
  29     ACPI_FADT_F_RESET_REG_SUP,
  30     ACPI_FADT_F_SEALED_CASE,
  31     ACPI_FADT_F_HEADLESS,
  32     ACPI_FADT_F_CPU_SW_SLP,
  33     ACPI_FADT_F_PCI_EXP_WAK,
  34     ACPI_FADT_F_USE_PLATFORM_CLOCK,
  35     ACPI_FADT_F_S4_RTC_STS_VALID,
  36     ACPI_FADT_F_REMOTE_POWER_ON_CAPABLE,
  37     ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL,
  38     ACPI_FADT_F_FORCE_APIC_PHYSICAL_DESTINATION_MODE,
  39     ACPI_FADT_F_HW_REDUCED_ACPI,
  40     ACPI_FADT_F_LOW_POWER_S0_IDLE_CAPABLE,
  41 };
  42
  43 struct AcpiRsdpDescriptor {        /* Root System Descriptor Pointer */
  44     uint64_t signature;              /* ACPI signature, contains "RSD PTR " */
  45     uint8_t  checksum;               /* To make sum of struct == 0 */
  46     uint8_t  oem_id [6];             /* OEM identification */
  47     uint8_t  revision;               /* Must be 0 for 1.0, 2 for 2.0 */
  48     uint32_t rsdt_physical_address;  /* 32-bit physical address of RSDT */
  49     uint32_t length;                 /* XSDT Length in bytes including hdr */
  50     uint64_t xsdt_physical_address;  /* 64-bit physical address of XSDT */
  51     uint8_t  extended_checksum;      /* Checksum of entire table */
  52     uint8_t  reserved [3];           /* Reserved field must be 0 */
  53 } QEMU_PACKED;
  54 typedef struct AcpiRsdpDescriptor AcpiRsdpDescriptor;
  55
  56 /* Table structure from Linux kernel (the ACPI tables are under the
  57    BSD license) */
  58
  59
  60 #define ACPI_TABLE_HEADER_DEF   /* ACPI common table header */ \
  61     uint32_t signature;          /* ACPI signature (4 ASCII characters) */ \
  62     uint32_t length;                 /* Length of table, in bytes, including header */ \
  63     uint8_t  revision;               /* ACPI Specification minor version # */ \
  64     uint8_t  checksum;               /* To make sum of entire table == 0 */ \
  65     uint8_t  oem_id [6];             /* OEM identification */ \
  66     uint8_t  oem_table_id [8];       /* OEM table identification */ \
  67     uint32_t oem_revision;           /* OEM revision number */ \
  68     uint8_t  asl_compiler_id [4];    /* ASL compiler vendor ID */ \
  69     uint32_t asl_compiler_revision;  /* ASL compiler revision number */
  70
  71
  72 /* ACPI common table header */
  73 struct AcpiTableHeader {
  74     ACPI_TABLE_HEADER_DEF
  75 } QEMU_PACKED;
  76 typedef struct AcpiTableHeader AcpiTableHeader;
  77
  78 /*
  79  * ACPI Fixed ACPI Description Table (FADT)
  80  */
  81 #define ACPI_FADT_COMMON_DEF /* FADT common definition */ \
  82     ACPI_TABLE_HEADER_DEF    /* ACPI common table header */ \
  83     uint32_t firmware_ctrl;  /* Physical address of FACS */ \
  84     uint32_t dsdt;         /* Physical address of DSDT */ \
  85     uint8_t  model;        /* System Interrupt Model */ \
  86     uint8_t  reserved1;    /* Reserved */ \
  87     uint16_t sci_int;      /* System vector of SCI interrupt */ \
  88     uint32_t smi_cmd;      /* Port address of SMI command port */ \
  89     uint8_t  acpi_enable;  /* Value to write to smi_cmd to enable ACPI */ \
  90     uint8_t  acpi_disable; /* Value to write to smi_cmd to disable ACPI */ \
  91     /* Value to write to SMI CMD to enter S4BIOS state */ \
  92     uint8_t  S4bios_req; \
  93     uint8_t  reserved2;    /* Reserved - must be zero */ \
  94     /* Port address of Power Mgt 1a acpi_event Reg Blk */ \
  95     uint32_t pm1a_evt_blk; \
  96     /* Port address of Power Mgt 1b acpi_event Reg Blk */ \
  97     uint32_t pm1b_evt_blk; \
  98     uint32_t pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */ \
  99     uint32_t pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */ \
 100     uint32_t pm2_cnt_blk;  /* Port address of Power Mgt 2 Control Reg Blk */ \
 101     uint32_t pm_tmr_blk;   /* Port address of Power Mgt Timer Ctrl Reg Blk */ \
 102     /* Port addr of General Purpose acpi_event 0 Reg Blk */ \
 103     uint32_t gpe0_blk; \
 104     /* Port addr of General Purpose acpi_event 1 Reg Blk */ \
 105     uint32_t gpe1_blk; \
 106     uint8_t  pm1_evt_len;  /* Byte length of ports at pm1_x_evt_blk */ \
 107     uint8_t  pm1_cnt_len;  /* Byte length of ports at pm1_x_cnt_blk */ \
 108     uint8_t  pm2_cnt_len;  /* Byte Length of ports at pm2_cnt_blk */ \
 109     uint8_t  pm_tmr_len;   /* Byte Length of ports at pm_tm_blk */ \
 110     uint8_t  gpe0_blk_len; /* Byte Length of ports at gpe0_blk */ \
 111     uint8_t  gpe1_blk_len; /* Byte Length of ports at gpe1_blk */ \
 112     uint8_t  gpe1_base;    /* Offset in gpe model where gpe1 events start */ \
 113     uint8_t  reserved3;    /* Reserved */ \
 114     uint16_t plvl2_lat;    /* Worst case HW latency to enter/exit C2 state */ \
 115     uint16_t plvl3_lat;    /* Worst case HW latency to enter/exit C3 state */ \
 116     uint16_t flush_size;   /* Size of area read to flush caches */ \
 117     uint16_t flush_stride; /* Stride used in flushing caches */ \
 118     uint8_t  duty_offset;  /* Bit location of duty cycle field in p_cnt reg */ \
 119     uint8_t  duty_width;   /* Bit width of duty cycle field in p_cnt reg */ \
 120     uint8_t  day_alrm;     /* Index to day-of-month alarm in RTC CMOS RAM */ \
 121     uint8_t  mon_alrm;     /* Index to month-of-year alarm in RTC CMOS RAM */ \
 122     uint8_t  century;      /* Index to century in RTC CMOS RAM */ \
 123     /* IA-PC Boot Architecture Flags (see below for individual flags) */ \
 124     uint16_t boot_flags; \
 125     uint8_t reserved;    /* Reserved, must be zero */ \
 126     /* Miscellaneous flag bits (see below for individual flags) */ \
 127     uint32_t flags; \
 128     /* 64-bit address of the Reset register */ \
 129     struct AcpiGenericAddress reset_register; \
 130     /* Value to write to the reset_register port to reset the system */ \
 131     uint8_t reset_value; \
 132     /* ARM-Specific Boot Flags (see below for individual flags) (ACPI 5.1) */ \
 133     uint16_t arm_boot_flags; \
 134     uint8_t minor_revision;  /* FADT Minor Revision (ACPI 5.1) */ \
 135     uint64_t x_facs;          /* 64-bit physical address of FACS */ \
 136     uint64_t x_dsdt;          /* 64-bit physical address of DSDT */ \
 137     /* 64-bit Extended Power Mgt 1a Event Reg Blk address */ \
 138     struct AcpiGenericAddress xpm1a_event_block; \
 139     /* 64-bit Extended Power Mgt 1b Event Reg Blk address */ \
 140     struct AcpiGenericAddress xpm1b_event_block; \
 141     /* 64-bit Extended Power Mgt 1a Control Reg Blk address */ \
 142     struct AcpiGenericAddress xpm1a_control_block; \
 143     /* 64-bit Extended Power Mgt 1b Control Reg Blk address */ \
 144     struct AcpiGenericAddress xpm1b_control_block; \
 145     /* 64-bit Extended Power Mgt 2 Control Reg Blk address */ \
 146     struct AcpiGenericAddress xpm2_control_block; \
 147     /* 64-bit Extended Power Mgt Timer Ctrl Reg Blk address */ \
 148     struct AcpiGenericAddress xpm_timer_block; \
 149     /* 64-bit Extended General Purpose Event 0 Reg Blk address */ \
 150     struct AcpiGenericAddress xgpe0_block; \
 151     /* 64-bit Extended General Purpose Event 1 Reg Blk address */ \
 152     struct AcpiGenericAddress xgpe1_block; \
 153
 154 struct AcpiGenericAddress {
 155     uint8_t space_id;        /* Address space where struct or register exists */
 156     uint8_t bit_width;       /* Size in bits of given register */
 157     uint8_t bit_offset;      /* Bit offset within the register */
 158     uint8_t access_width;    /* ACPI 3.0: Minimum Access size (ACPI 3.0),
 159                                 ACPI 2.0: Reserved, Table 5-1 */
 160     uint64_t address;        /* 64-bit address of struct or register */
 161 } QEMU_PACKED;
 162
 163 struct AcpiFadtDescriptorRev3 {
 164     ACPI_FADT_COMMON_DEF
 165 } QEMU_PACKED;
 166 typedef struct AcpiFadtDescriptorRev3 AcpiFadtDescriptorRev3;
 167
 168 struct AcpiFadtDescriptorRev5_1 {
 169     ACPI_FADT_COMMON_DEF
 170     /* 64-bit Sleep Control register (ACPI 5.0) */
 171     struct AcpiGenericAddress sleep_control;
 172     /* 64-bit Sleep Status register (ACPI 5.0) */
 173     struct AcpiGenericAddress sleep_status;
 174 } QEMU_PACKED;
 175
 176 typedef struct AcpiFadtDescriptorRev5_1 AcpiFadtDescriptorRev5_1;
 177
 178 typedef struct AcpiFadtData {
 179     struct AcpiGenericAddress pm1a_cnt;   /* PM1a_CNT_BLK */
 180     struct AcpiGenericAddress pm1a_evt;   /* PM1a_EVT_BLK */
 181     struct AcpiGenericAddress pm_tmr;    /* PM_TMR_BLK */
 182     struct AcpiGenericAddress gpe0_blk;  /* GPE0_BLK */
 183     struct AcpiGenericAddress reset_reg; /* RESET_REG */
 184     uint8_t reset_val;         /* RESET_VALUE */
 185     uint8_t  rev;              /* Revision */
 186     uint32_t flags;            /* Flags */
 187     uint32_t smi_cmd;          /* SMI_CMD */
 188     uint16_t sci_int;          /* SCI_INT */
 189     uint8_t  int_model;        /* INT_MODEL */
 190     uint8_t  acpi_enable_cmd;  /* ACPI_ENABLE */
 191     uint8_t  acpi_disable_cmd; /* ACPI_DISABLE */
 192     uint8_t  rtc_century;      /* CENTURY */
 193     uint16_t plvl2_lat;        /* P_LVL2_LAT */
 194     uint16_t plvl3_lat;        /* P_LVL3_LAT */
 195
 196     /*
 197      * respective tables offsets within ACPI_BUILD_TABLE_FILE,
 198      * NULL if table doesn't exist (in that case field's value
 199      * won't be patched by linker and will be kept set to 0)
 200      */
 201     unsigned *facs_tbl_offset; /* FACS offset in */
 202     unsigned *dsdt_tbl_offset;
 203     unsigned *xdsdt_tbl_offset;
 204 } AcpiFadtData;
 205
 206 #define ACPI_FADT_ARM_PSCI_COMPLIANT  (1 << 0)
 207 #define ACPI_FADT_ARM_PSCI_USE_HVC    (1 << 1)
 208
 209 /*
 210  * Serial Port Console Redirection Table (SPCR), Rev. 1.02
 211  *
 212  * For .interface_type see Debug Port Table 2 (DBG2) serial port
 213  * subtypes in Table 3, Rev. May 22, 2012
 214  */
 215 struct AcpiSerialPortConsoleRedirection {
 216     ACPI_TABLE_HEADER_DEF
 217     uint8_t  interface_type;
 218     uint8_t  reserved1[3];
 219     struct AcpiGenericAddress base_address;
 220     uint8_t  interrupt_types;
 221     uint8_t  irq;
 222     uint32_t gsi;
 223     uint8_t  baud;
 224     uint8_t  parity;
 225     uint8_t  stopbits;
 226     uint8_t  flowctrl;
 227     uint8_t  term_type;
 228     uint8_t  reserved2;
 229     uint16_t pci_device_id;
 230     uint16_t pci_vendor_id;
 231     uint8_t  pci_bus;
 232     uint8_t  pci_slot;
 233     uint8_t  pci_func;
 234     uint32_t pci_flags;
 235     uint8_t  pci_seg;
 236     uint32_t reserved3;
 237 } QEMU_PACKED;
 238 typedef struct AcpiSerialPortConsoleRedirection
 239                AcpiSerialPortConsoleRedirection;
 240
 241 /*
 242  * ACPI 1.0 Root System Description Table (RSDT)
 243  */
 244 struct AcpiRsdtDescriptorRev1 {
 245     ACPI_TABLE_HEADER_DEF       /* ACPI common table header */
 246     uint32_t table_offset_entry[0];  /* Array of pointers to other */
 247     /* ACPI tables */
 248 } QEMU_PACKED;
 249 typedef struct AcpiRsdtDescriptorRev1 AcpiRsdtDescriptorRev1;
 250
 251 /*
 252  * ACPI 2.0 eXtended System Description Table (XSDT)
 253  */
 254 struct AcpiXsdtDescriptorRev2 {
 255     ACPI_TABLE_HEADER_DEF       /* ACPI common table header */
 256     uint64_t table_offset_entry[0];  /* Array of pointers to other */
 257     /* ACPI tables */
 258 } QEMU_PACKED;
 259 typedef struct AcpiXsdtDescriptorRev2 AcpiXsdtDescriptorRev2;
 260
 261 /*
 262  * ACPI 1.0 Firmware ACPI Control Structure (FACS)
 263  */
 264 struct AcpiFacsDescriptorRev1 {
 265     uint32_t signature;           /* ACPI Signature */
 266     uint32_t length;                 /* Length of structure, in bytes */
 267     uint32_t hardware_signature;     /* Hardware configuration signature */
 268     uint32_t firmware_waking_vector; /* ACPI OS waking vector */
 269     uint32_t global_lock;            /* Global Lock */
 270     uint32_t flags;
 271     uint8_t  resverved3 [40];        /* Reserved - must be zero */
 272 } QEMU_PACKED;
 273 typedef struct AcpiFacsDescriptorRev1 AcpiFacsDescriptorRev1;
 274
 275 /*
 276  * Differentiated System Description Table (DSDT)
 277  */
 278
 279 /*
 280  * MADT values and structures
 281  */
 282
 283 /* Values for MADT PCATCompat */
 284
 285 #define ACPI_DUAL_PIC                0
 286 #define ACPI_MULTIPLE_APIC           1
 287
 288 /* Master MADT */
 289
 290 struct AcpiMultipleApicTable {
 291     ACPI_TABLE_HEADER_DEF     /* ACPI common table header */
 292     uint32_t local_apic_address;     /* Physical address of local APIC */
 293     uint32_t flags;
 294 } QEMU_PACKED;
 295 typedef struct AcpiMultipleApicTable AcpiMultipleApicTable;
 296
 297 /* Values for Type in APIC sub-headers */
 298
 299 #define ACPI_APIC_PROCESSOR          0
 300 #define ACPI_APIC_IO                 1
 301 #define ACPI_APIC_XRUPT_OVERRIDE     2
 302 #define ACPI_APIC_NMI                3
 303 #define ACPI_APIC_LOCAL_NMI          4
 304 #define ACPI_APIC_ADDRESS_OVERRIDE   5
 305 #define ACPI_APIC_IO_SAPIC           6
 306 #define ACPI_APIC_LOCAL_SAPIC        7
 307 #define ACPI_APIC_XRUPT_SOURCE       8
 308 #define ACPI_APIC_LOCAL_X2APIC       9
 309 #define ACPI_APIC_LOCAL_X2APIC_NMI      10
 310 #define ACPI_APIC_GENERIC_CPU_INTERFACE 11
 311 #define ACPI_APIC_GENERIC_DISTRIBUTOR   12
 312 #define ACPI_APIC_GENERIC_MSI_FRAME     13
 313 #define ACPI_APIC_GENERIC_REDISTRIBUTOR 14
 314 #define ACPI_APIC_GENERIC_TRANSLATOR    15
 315 #define ACPI_APIC_RESERVED              16   /* 16 and greater are reserved */
 316
 317 /*
 318  * MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE)
 319  */
 320 #define ACPI_SUB_HEADER_DEF   /* Common ACPI sub-structure header */\
 321     uint8_t  type;                               \
 322     uint8_t  length;
 323
 324 /* Sub-structures for MADT */
 325
 326 struct AcpiMadtProcessorApic {
 327     ACPI_SUB_HEADER_DEF
 328     uint8_t  processor_id;           /* ACPI processor id */
 329     uint8_t  local_apic_id;          /* Processor's local APIC id */
 330     uint32_t flags;
 331 } QEMU_PACKED;
 332 typedef struct AcpiMadtProcessorApic AcpiMadtProcessorApic;
 333
 334 struct AcpiMadtIoApic {
 335     ACPI_SUB_HEADER_DEF
 336     uint8_t  io_apic_id;             /* I/O APIC ID */
 337     uint8_t  reserved;               /* Reserved - must be zero */
 338     uint32_t address;                /* APIC physical address */
 339     uint32_t interrupt;              /* Global system interrupt where INTI
 340                                  * lines start */
 341 } QEMU_PACKED;
 342 typedef struct AcpiMadtIoApic AcpiMadtIoApic;
 343
 344 struct AcpiMadtIntsrcovr {
 345     ACPI_SUB_HEADER_DEF
 346     uint8_t  bus;
 347     uint8_t  source;
 348     uint32_t gsi;
 349     uint16_t flags;
 350 } QEMU_PACKED;
 351 typedef struct AcpiMadtIntsrcovr AcpiMadtIntsrcovr;
 352
 353 struct AcpiMadtLocalNmi {
 354     ACPI_SUB_HEADER_DEF
 355     uint8_t  processor_id;           /* ACPI processor id */
 356     uint16_t flags;                  /* MPS INTI flags */
 357     uint8_t  lint;                   /* Local APIC LINT# */
 358 } QEMU_PACKED;
 359 typedef struct AcpiMadtLocalNmi AcpiMadtLocalNmi;
 360
 361 struct AcpiMadtProcessorX2Apic {
 362     ACPI_SUB_HEADER_DEF
 363     uint16_t reserved;
 364     uint32_t x2apic_id;              /* Processor's local x2APIC ID */
 365     uint32_t flags;
 366     uint32_t uid;                    /* Processor object _UID */
 367 } QEMU_PACKED;
 368 typedef struct AcpiMadtProcessorX2Apic AcpiMadtProcessorX2Apic;
 369
 370 struct AcpiMadtLocalX2ApicNmi {
 371     ACPI_SUB_HEADER_DEF
 372     uint16_t flags;                  /* MPS INTI flags */
 373     uint32_t uid;                    /* Processor object _UID */
 374     uint8_t  lint;                   /* Local APIC LINT# */
 375     uint8_t  reserved[3];            /* Local APIC LINT# */
 376 } QEMU_PACKED;
 377 typedef struct AcpiMadtLocalX2ApicNmi AcpiMadtLocalX2ApicNmi;
 378
 379 struct AcpiMadtGenericCpuInterface {
 380     ACPI_SUB_HEADER_DEF
 381     uint16_t reserved;
 382     uint32_t cpu_interface_number;
 383     uint32_t uid;
 384     uint32_t flags;
 385     uint32_t parking_version;
 386     uint32_t performance_interrupt;
 387     uint64_t parked_address;
 388     uint64_t base_address;
 389     uint64_t gicv_base_address;
 390     uint64_t gich_base_address;
 391     uint32_t vgic_interrupt;
 392     uint64_t gicr_base_address;
 393     uint64_t arm_mpidr;
 394 } QEMU_PACKED;
 395
 396 typedef struct AcpiMadtGenericCpuInterface AcpiMadtGenericCpuInterface;
 397
 398 /* GICC CPU Interface Flags */
 399 #define ACPI_MADT_GICC_ENABLED 1
 400
 401 struct AcpiMadtGenericDistributor {
 402     ACPI_SUB_HEADER_DEF
 403     uint16_t reserved;
 404     uint32_t gic_id;
 405     uint64_t base_address;
 406     uint32_t global_irq_base;
 407     /* ACPI 5.1 Errata 1228 Present GIC version in MADT table */
 408     uint8_t version;
 409     uint8_t reserved2[3];
 410 } QEMU_PACKED;
 411
 412 typedef struct AcpiMadtGenericDistributor AcpiMadtGenericDistributor;
 413
 414 struct AcpiMadtGenericMsiFrame {
 415     ACPI_SUB_HEADER_DEF
 416     uint16_t reserved;
 417     uint32_t gic_msi_frame_id;
 418     uint64_t base_address;
 419     uint32_t flags;
 420     uint16_t spi_count;
 421     uint16_t spi_base;
 422 } QEMU_PACKED;
 423
 424 typedef struct AcpiMadtGenericMsiFrame AcpiMadtGenericMsiFrame;
 425
 426 struct AcpiMadtGenericRedistributor {
 427     ACPI_SUB_HEADER_DEF
 428     uint16_t reserved;
 429     uint64_t base_address;
 430     uint32_t range_length;
 431 } QEMU_PACKED;
 432
 433 typedef struct AcpiMadtGenericRedistributor AcpiMadtGenericRedistributor;
 434
 435 struct AcpiMadtGenericTranslator {
 436     ACPI_SUB_HEADER_DEF
 437     uint16_t reserved;
 438     uint32_t translation_id;
 439     uint64_t base_address;
 440     uint32_t reserved2;
 441 } QEMU_PACKED;
 442
 443 typedef struct AcpiMadtGenericTranslator AcpiMadtGenericTranslator;
 444
 445 /*
 446  * Generic Timer Description Table (GTDT)
 447  */
 448 #define ACPI_GTDT_INTERRUPT_MODE_LEVEL    (0 << 0)
 449 #define ACPI_GTDT_INTERRUPT_MODE_EDGE     (1 << 0)
 450 #define ACPI_GTDT_CAP_ALWAYS_ON           (1 << 2)
 451
 452 struct AcpiGenericTimerTable {
 453     ACPI_TABLE_HEADER_DEF
 454     uint64_t counter_block_addresss;
 455     uint32_t reserved;
 456     uint32_t secure_el1_interrupt;
 457     uint32_t secure_el1_flags;
 458     uint32_t non_secure_el1_interrupt;
 459     uint32_t non_secure_el1_flags;
 460     uint32_t virtual_timer_interrupt;
 461     uint32_t virtual_timer_flags;
 462     uint32_t non_secure_el2_interrupt;
 463     uint32_t non_secure_el2_flags;
 464     uint64_t counter_read_block_address;
 465     uint32_t platform_timer_count;
 466     uint32_t platform_timer_offset;
 467 } QEMU_PACKED;
 468 typedef struct AcpiGenericTimerTable AcpiGenericTimerTable;
 469
 470 /*
 471  * HPET Description Table
 472  */
 473 struct Acpi20Hpet {
 474     ACPI_TABLE_HEADER_DEF                    /* ACPI common table header */
 475     uint32_t           timer_block_id;
 476     struct AcpiGenericAddress addr;
 477     uint8_t            hpet_number;
 478     uint16_t           min_tick;
 479     uint8_t            page_protect;
 480 } QEMU_PACKED;
 481 typedef struct Acpi20Hpet Acpi20Hpet;
 482
 483 /*
 484  * SRAT (NUMA topology description) table
 485  */
 486
 487 struct AcpiSystemResourceAffinityTable {
 488     ACPI_TABLE_HEADER_DEF
 489     uint32_t    reserved1;
 490     uint32_t    reserved2[2];
 491 } QEMU_PACKED;
 492 typedef struct AcpiSystemResourceAffinityTable AcpiSystemResourceAffinityTable;
 493
 494 #define ACPI_SRAT_PROCESSOR_APIC     0
 495 #define ACPI_SRAT_MEMORY             1
 496 #define ACPI_SRAT_PROCESSOR_x2APIC   2
 497 #define ACPI_SRAT_PROCESSOR_GICC     3
 498
 499 struct AcpiSratProcessorAffinity {
 500     ACPI_SUB_HEADER_DEF
 501     uint8_t     proximity_lo;
 502     uint8_t     local_apic_id;
 503     uint32_t    flags;
 504     uint8_t     local_sapic_eid;
 505     uint8_t     proximity_hi[3];
 506     uint32_t    reserved;
 507 } QEMU_PACKED;
 508 typedef struct AcpiSratProcessorAffinity AcpiSratProcessorAffinity;
 509
 510 struct AcpiSratProcessorX2ApicAffinity {
 511     ACPI_SUB_HEADER_DEF
 512     uint16_t    reserved;
 513     uint32_t    proximity_domain;
 514     uint32_t    x2apic_id;
 515     uint32_t    flags;
 516     uint32_t    clk_domain;
 517     uint32_t    reserved2;
 518 } QEMU_PACKED;
 519 typedef struct AcpiSratProcessorX2ApicAffinity AcpiSratProcessorX2ApicAffinity;
 520
 521 struct AcpiSratMemoryAffinity {
 522     ACPI_SUB_HEADER_DEF
 523     uint32_t    proximity;
 524     uint16_t    reserved1;
 525     uint64_t    base_addr;
 526     uint64_t    range_length;
 527     uint32_t    reserved2;
 528     uint32_t    flags;
 529     uint32_t    reserved3[2];
 530 } QEMU_PACKED;
 531 typedef struct AcpiSratMemoryAffinity AcpiSratMemoryAffinity;
 532
 533 struct AcpiSratProcessorGiccAffinity {
 534     ACPI_SUB_HEADER_DEF
 535     uint32_t    proximity;
 536     uint32_t    acpi_processor_uid;
 537     uint32_t    flags;
 538     uint32_t    clock_domain;
 539 } QEMU_PACKED;
 540
 541 typedef struct AcpiSratProcessorGiccAffinity AcpiSratProcessorGiccAffinity;
 542
 543 /* PCI fw r3.0 MCFG table. */
 544 /* Subtable */
 545 struct AcpiMcfgAllocation {
 546     uint64_t address;                /* Base address, processor-relative */
 547     uint16_t pci_segment;            /* PCI segment group number */
 548     uint8_t start_bus_number;       /* Starting PCI Bus number */
 549     uint8_t end_bus_number;         /* Final PCI Bus number */
 550     uint32_t reserved;
 551 } QEMU_PACKED;
 552 typedef struct AcpiMcfgAllocation AcpiMcfgAllocation;
 553
 554 struct AcpiTableMcfg {
 555     ACPI_TABLE_HEADER_DEF;
 556     uint8_t reserved[8];
 557     AcpiMcfgAllocation allocation[0];
 558 } QEMU_PACKED;
 559 typedef struct AcpiTableMcfg AcpiTableMcfg;
 560
 561 /*
 562  * TCPA Description Table
 563  *
 564  * Following Level 00, Rev 00.37 of specs:
 565  * http://www.trustedcomputinggroup.org/resources/tcg_acpi_specification
 566  */
 567 struct Acpi20Tcpa {
 568     ACPI_TABLE_HEADER_DEF                    /* ACPI common table header */
 569     uint16_t platform_class;
 570     uint32_t log_area_minimum_length;
 571     uint64_t log_area_start_address;
 572 } QEMU_PACKED;
 573 typedef struct Acpi20Tcpa Acpi20Tcpa;
 574
 575 /*
 576  * TPM2
 577  *
 578  * Following Version 1.2, Revision 8 of specs:
 579  * https://trustedcomputinggroup.org/tcg-acpi-specification/
 580  */
 581 struct Acpi20TPM2 {
 582     ACPI_TABLE_HEADER_DEF
 583     uint16_t platform_class;
 584     uint16_t reserved;
 585     uint64_t control_area_address;
 586     uint32_t start_method;
 587     uint8_t start_method_params[12];
 588     uint32_t log_area_minimum_length;
 589     uint64_t log_area_start_address;
 590 } QEMU_PACKED;
 591 typedef struct Acpi20TPM2 Acpi20TPM2;
 592
 593 /* DMAR - DMA Remapping table r2.2 */
 594 struct AcpiTableDmar {
 595     ACPI_TABLE_HEADER_DEF
 596     uint8_t host_address_width; /* Maximum DMA physical addressability */
 597     uint8_t flags;
 598     uint8_t reserved[10];
 599 } QEMU_PACKED;
 600 typedef struct AcpiTableDmar AcpiTableDmar;
 601
 602 /* Masks for Flags field above */
 603 #define ACPI_DMAR_INTR_REMAP        1
 604 #define ACPI_DMAR_X2APIC_OPT_OUT    (1 << 1)
 605
 606 /* Values for sub-structure type for DMAR */
 607 enum {
 608     ACPI_DMAR_TYPE_HARDWARE_UNIT = 0,       /* DRHD */
 609     ACPI_DMAR_TYPE_RESERVED_MEMORY = 1,     /* RMRR */
 610     ACPI_DMAR_TYPE_ATSR = 2,                /* ATSR */
 611     ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3,   /* RHSR */
 612     ACPI_DMAR_TYPE_ANDD = 4,                /* ANDD */
 613     ACPI_DMAR_TYPE_RESERVED = 5             /* Reserved for furture use */
 614 };
 615
 616 /*
 617  * Sub-structures for DMAR
 618  */
 619
 620 /* Device scope structure for DRHD. */
 621 struct AcpiDmarDeviceScope {
 622     uint8_t entry_type;
 623     uint8_t length;
 624     uint16_t reserved;
 625     uint8_t enumeration_id;
 626     uint8_t bus;
 627     struct {
 628         uint8_t device;
 629         uint8_t function;
 630     } path[0];
 631 } QEMU_PACKED;
 632 typedef struct AcpiDmarDeviceScope AcpiDmarDeviceScope;
 633
 634 /* Type 0: Hardware Unit Definition */
 635 struct AcpiDmarHardwareUnit {
 636     uint16_t type;
 637     uint16_t length;
 638     uint8_t flags;
 639     uint8_t reserved;
 640     uint16_t pci_segment;   /* The PCI Segment associated with this unit */
 641     uint64_t address;   /* Base address of remapping hardware register-set */
 642     AcpiDmarDeviceScope scope[0];
 643 } QEMU_PACKED;
 644 typedef struct AcpiDmarHardwareUnit AcpiDmarHardwareUnit;
 645
 646 /* Type 2: Root Port ATS Capability Reporting Structure */
 647 struct AcpiDmarRootPortATS {
 648     uint16_t type;
 649     uint16_t length;
 650     uint8_t flags;
 651     uint8_t reserved;
 652     uint16_t pci_segment;
 653     AcpiDmarDeviceScope scope[0];
 654 } QEMU_PACKED;
 655 typedef struct AcpiDmarRootPortATS AcpiDmarRootPortATS;
 656
 657 /* Masks for Flags field above */
 658 #define ACPI_DMAR_INCLUDE_PCI_ALL   1
 659 #define ACPI_DMAR_ATSR_ALL_PORTS    1
 660
 661 /*
 662  * Input Output Remapping Table (IORT)
 663  * Conforms to "IO Remapping Table System Software on ARM Platforms",
 664  * Document number: ARM DEN 0049B, October 2015
 665  */
 666
 667 struct AcpiIortTable {
 668     ACPI_TABLE_HEADER_DEF     /* ACPI common table header */
 669     uint32_t node_count;
 670     uint32_t node_offset;
 671     uint32_t reserved;
 672 } QEMU_PACKED;
 673 typedef struct AcpiIortTable AcpiIortTable;
 674
 675 /*
 676  * IORT node types
 677  */
 678
 679 #define ACPI_IORT_NODE_HEADER_DEF   /* Node format common fields */ \
 680     uint8_t  type;          \
 681     uint16_t length;        \
 682     uint8_t  revision;      \
 683     uint32_t reserved;      \
 684     uint32_t mapping_count; \
 685     uint32_t mapping_offset;
 686
 687 /* Values for node Type above */
 688 enum {
 689         ACPI_IORT_NODE_ITS_GROUP = 0x00,
 690         ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
 691         ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
 692         ACPI_IORT_NODE_SMMU = 0x03,
 693         ACPI_IORT_NODE_SMMU_V3 = 0x04
 694 };
 695
 696 struct AcpiIortIdMapping {
 697     uint32_t input_base;
 698     uint32_t id_count;
 699     uint32_t output_base;
 700     uint32_t output_reference;
 701     uint32_t flags;
 702 } QEMU_PACKED;
 703 typedef struct AcpiIortIdMapping AcpiIortIdMapping;
 704
 705 struct AcpiIortMemoryAccess {
 706     uint32_t cache_coherency;
 707     uint8_t  hints;
 708     uint16_t reserved;
 709     uint8_t  memory_flags;
 710 } QEMU_PACKED;
 711 typedef struct AcpiIortMemoryAccess AcpiIortMemoryAccess;
 712
 713 struct AcpiIortItsGroup {
 714     ACPI_IORT_NODE_HEADER_DEF
 715     uint32_t its_count;
 716     uint32_t identifiers[0];
 717 } QEMU_PACKED;
 718 typedef struct AcpiIortItsGroup AcpiIortItsGroup;
 719
 720 struct AcpiIortRC {
 721     ACPI_IORT_NODE_HEADER_DEF
 722     AcpiIortMemoryAccess memory_properties;
 723     uint32_t ats_attribute;
 724     uint32_t pci_segment_number;
 725     AcpiIortIdMapping id_mapping_array[0];
 726 } QEMU_PACKED;
 727 typedef struct AcpiIortRC AcpiIortRC;
 728
 729 #endif