include/hw/arm/allwinner-r40.h

   1 /*
   2  * Allwinner R40/A40i/T3 System on Chip emulation
   3  *
   4  * Copyright (C) 2023 qianfan Zhao <qianfanguijin@163.com>
   5  *
   6  * This program is free software: you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation, either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #ifndef HW_ARM_ALLWINNER_R40_H
  21 #define HW_ARM_ALLWINNER_R40_H
  22
  23 #include "qom/object.h"
  24 #include "hw/timer/allwinner-a10-pit.h"
  25 #include "hw/intc/arm_gic.h"
  26 #include "hw/sd/allwinner-sdhost.h"
  27 #include "hw/misc/allwinner-r40-ccu.h"
  28 #include "hw/misc/allwinner-r40-dramc.h"
  29 #include "hw/misc/allwinner-sramc.h"
  30 #include "hw/i2c/allwinner-i2c.h"
  31 #include "hw/net/allwinner_emac.h"
  32 #include "hw/net/allwinner-sun8i-emac.h"
  33 #include "target/arm/cpu.h"
  34 #include "sysemu/block-backend.h"
  35
  36 enum {
  37     AW_R40_DEV_SRAM_A1,
  38     AW_R40_DEV_SRAM_A2,
  39     AW_R40_DEV_SRAM_A3,
  40     AW_R40_DEV_SRAM_A4,
  41     AW_R40_DEV_SRAMC,
  42     AW_R40_DEV_EMAC,
  43     AW_R40_DEV_MMC0,
  44     AW_R40_DEV_MMC1,
  45     AW_R40_DEV_MMC2,
  46     AW_R40_DEV_MMC3,
  47     AW_R40_DEV_CCU,
  48     AW_R40_DEV_PIT,
  49     AW_R40_DEV_UART0,
  50     AW_R40_DEV_UART1,
  51     AW_R40_DEV_UART2,
  52     AW_R40_DEV_UART3,
  53     AW_R40_DEV_UART4,
  54     AW_R40_DEV_UART5,
  55     AW_R40_DEV_UART6,
  56     AW_R40_DEV_UART7,
  57     AW_R40_DEV_TWI0,
  58     AW_R40_DEV_GMAC,
  59     AW_R40_DEV_GIC_DIST,
  60     AW_R40_DEV_GIC_CPU,
  61     AW_R40_DEV_GIC_HYP,
  62     AW_R40_DEV_GIC_VCPU,
  63     AW_R40_DEV_SDRAM,
  64     AW_R40_DEV_DRAMCOM,
  65     AW_R40_DEV_DRAMCTL,
  66     AW_R40_DEV_DRAMPHY,
  67 };
  68
  69 #define AW_R40_NUM_CPUS      (4)
  70
  71 /**
  72  * Allwinner R40 object model
  73  * @{
  74  */
  75
  76 /** Object type for the Allwinner R40 SoC */
  77 #define TYPE_AW_R40 "allwinner-r40"
  78
  79 /** Convert input object to Allwinner R40 state object */
  80 OBJECT_DECLARE_SIMPLE_TYPE(AwR40State, AW_R40)
  81
  82 /** @} */
  83
  84 /**
  85  * Allwinner R40 object
  86  *
  87  * This struct contains the state of all the devices
  88  * which are currently emulated by the R40 SoC code.
  89  */
  90 #define AW_R40_NUM_MMCS         4
  91 #define AW_R40_NUM_UARTS        8
  92
  93 struct AwR40State {
  94     /*< private >*/
  95     DeviceState parent_obj;
  96     /*< public >*/
  97
  98     /** Physical base address for start of RAM */
  99     hwaddr ram_addr;
 100
 101     /** Total RAM size in megabytes */
 102     uint32_t ram_size;
 103
 104     ARMCPU cpus[AW_R40_NUM_CPUS];
 105     const hwaddr *memmap;
 106     AwSRAMCState sramc;
 107     AwA10PITState timer;
 108     AwSdHostState mmc[AW_R40_NUM_MMCS];
 109     AwR40ClockCtlState ccu;
 110     AwR40DramCtlState dramc;
 111     AWI2CState i2c0;
 112     AwEmacState emac;
 113     AwSun8iEmacState gmac;
 114     GICState gic;
 115     MemoryRegion sram_a1;
 116     MemoryRegion sram_a2;
 117     MemoryRegion sram_a3;
 118     MemoryRegion sram_a4;
 119 };
 120
 121 /**
 122  * Emulate Boot ROM firmware setup functionality.
 123  *
 124  * A real Allwinner R40 SoC contains a Boot ROM
 125  * which is the first code that runs right after
 126  * the SoC is powered on. The Boot ROM is responsible
 127  * for loading user code (e.g. a bootloader) from any
 128  * of the supported external devices and writing the
 129  * downloaded code to internal SRAM. After loading the SoC
 130  * begins executing the code written to SRAM.
 131  *
 132  * This function emulates the Boot ROM by copying 32 KiB
 133  * of data from the given block device and writes it to
 134  * the start of the first internal SRAM memory.
 135  *
 136  * @s: Allwinner R40 state object pointer
 137  * @blk: Block backend device object pointer
 138  * @unit: the mmc control's unit
 139  */
 140 bool allwinner_r40_bootrom_setup(AwR40State *s, BlockBackend *blk, int unit);
 141
 142 #endif /* HW_ARM_ALLWINNER_R40_H */