include/hw/block/flash.h

   1 #ifndef HW_FLASH_H
   2 #define HW_FLASH_H
   3
   4 /* NOR flash devices */
   5
   6 #include "exec/memory.h"
   7 #include "migration/vmstate.h"
   8
   9 /* pflash_cfi01.c */
  10
  11 #define TYPE_PFLASH_CFI01 "cfi.pflash01"
  12 #define PFLASH_CFI01(obj) \
  13     OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01)
  14
  15 typedef struct PFlashCFI01 PFlashCFI01;
  16
  17 PFlashCFI01 *pflash_cfi01_register(hwaddr base,
  18                                    const char *name,
  19                                    hwaddr size,
  20                                    BlockBackend *blk,
  21                                    uint32_t sector_len,
  22                                    int width,
  23                                    uint16_t id0, uint16_t id1,
  24                                    uint16_t id2, uint16_t id3,
  25                                    int be);
  26 BlockBackend *pflash_cfi01_get_blk(PFlashCFI01 *fl);
  27 MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl);
  28 void pflash_cfi01_legacy_drive(PFlashCFI01 *dev, DriveInfo *dinfo);
  29
  30 /* pflash_cfi02.c */
  31
  32 #define TYPE_PFLASH_CFI02 "cfi.pflash02"
  33 #define PFLASH_CFI02(obj) \
  34     OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02)
  35
  36 typedef struct PFlashCFI02 PFlashCFI02;
  37
  38 PFlashCFI02 *pflash_cfi02_register(hwaddr base,
  39                                    const char *name,
  40                                    hwaddr size,
  41                                    BlockBackend *blk,
  42                                    uint32_t sector_len,
  43                                    int nb_mappings,
  44                                    int width,
  45                                    uint16_t id0, uint16_t id1,
  46                                    uint16_t id2, uint16_t id3,
  47                                    uint16_t unlock_addr0,
  48                                    uint16_t unlock_addr1,
  49                                    int be);
  50
  51 /* nand.c */
  52 DeviceState *nand_init(BlockBackend *blk, int manf_id, int chip_id);
  53 void nand_setpins(DeviceState *dev, uint8_t cle, uint8_t ale,
  54                   uint8_t ce, uint8_t wp, uint8_t gnd);
  55 void nand_getpins(DeviceState *dev, int *rb);
  56 void nand_setio(DeviceState *dev, uint32_t value);
  57 uint32_t nand_getio(DeviceState *dev);
  58 uint32_t nand_getbuswidth(DeviceState *dev);
  59
  60 #define NAND_MFR_TOSHIBA        0x98
  61 #define NAND_MFR_SAMSUNG        0xec
  62 #define NAND_MFR_FUJITSU        0x04
  63 #define NAND_MFR_NATIONAL       0x8f
  64 #define NAND_MFR_RENESAS        0x07
  65 #define NAND_MFR_STMICRO        0x20
  66 #define NAND_MFR_HYNIX          0xad
  67 #define NAND_MFR_MICRON         0x2c
  68
  69 /* onenand.c */
  70 void *onenand_raw_otp(DeviceState *onenand_device);
  71
  72 /* ecc.c */
  73 typedef struct {
  74     uint8_t cp;         /* Column parity */
  75     uint16_t lp[2];     /* Line parity */
  76     uint16_t count;
  77 } ECCState;
  78
  79 uint8_t ecc_digest(ECCState *s, uint8_t sample);
  80 void ecc_reset(ECCState *s);
  81 extern VMStateDescription vmstate_ecc_state;
  82
  83 #endif