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1 /* Declarations for use by board files for creating devices. */
2
3 #ifndef HW_BOARDS_H
4 #define HW_BOARDS_H
5
6 #include "sysemu/blockdev.h"
7 #include "sysemu/accel.h"
8 #include "hw/qdev.h"
9 #include "qom/object.h"
10 #include "qom/cpu.h"
11
12 /**
13 * memory_region_allocate_system_memory - Allocate a board's main memory
14 * @mr: the #MemoryRegion to be initialized
15 * @owner: the object that tracks the region's reference count
16 * @name: name of the memory region
17 * @ram_size: size of the region in bytes
18 *
19 * This function allocates the main memory for a board model, and
20 * initializes @mr appropriately. It also arranges for the memory
21 * to be migrated (by calling vmstate_register_ram_global()).
22 *
23 * Memory allocated via this function will be backed with the memory
24 * backend the user provided using "-mem-path" or "-numa node,memdev=..."
25 * if appropriate; this is typically used to cause host huge pages to be
26 * used. This function should therefore be called by a board exactly once,
27 * for the primary or largest RAM area it implements.
28 *
29 * For boards where the major RAM is split into two parts in the memory
30 * map, you can deal with this by calling memory_region_allocate_system_memory()
31 * once to get a MemoryRegion with enough RAM for both parts, and then
32 * creating alias MemoryRegions via memory_region_init_alias() which
33 * alias into different parts of the RAM MemoryRegion and can be mapped
34 * into the memory map in the appropriate places.
35 *
36 * Smaller pieces of memory (display RAM, static RAMs, etc) don't need
37 * to be backed via the -mem-path memory backend and can simply
38 * be created via memory_region_init_ram().
39 */
40 void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner,
41 const char *name,
42 uint64_t ram_size);
43
44 #define TYPE_MACHINE_SUFFIX "-machine"
45
46 /* Machine class name that needs to be used for class-name-based machine
47 * type lookup to work.
48 */
49 #define MACHINE_TYPE_NAME(machinename) (machinename TYPE_MACHINE_SUFFIX)
50
51 #define TYPE_MACHINE "machine"
52 #undef MACHINE /* BSD defines it and QEMU does not use it */
53 #define MACHINE(obj) \
54 OBJECT_CHECK(MachineState, (obj), TYPE_MACHINE)
55 #define MACHINE_GET_CLASS(obj) \
56 OBJECT_GET_CLASS(MachineClass, (obj), TYPE_MACHINE)
57 #define MACHINE_CLASS(klass) \
58 OBJECT_CLASS_CHECK(MachineClass, (klass), TYPE_MACHINE)
59
60 MachineClass *find_default_machine(void);
61 extern MachineState *current_machine;
62
63 void machine_run_board_init(MachineState *machine);
64 bool machine_usb(MachineState *machine);
65 bool machine_kernel_irqchip_allowed(MachineState *machine);
66 bool machine_kernel_irqchip_required(MachineState *machine);
67 bool machine_kernel_irqchip_split(MachineState *machine);
68 int machine_kvm_shadow_mem(MachineState *machine);
69 int machine_phandle_start(MachineState *machine);
70 bool machine_dump_guest_core(MachineState *machine);
71 bool machine_mem_merge(MachineState *machine);
72 void machine_register_compat_props(MachineState *machine);
73 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine);
74 void machine_set_cpu_numa_node(MachineState *machine,
75 const CpuInstanceProperties *props,
76 Error **errp);
77
78 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type);
79
80
81 /**
82 * CPUArchId:
83 * @arch_id - architecture-dependent CPU ID of present or possible CPU
84 * @cpu - pointer to corresponding CPU object if it's present on NULL otherwise
85 * @type - QOM class name of possible @cpu object
86 * @props - CPU object properties, initialized by board
87 * #vcpus_count - number of threads provided by @cpu object
88 */
89 typedef struct {
90 uint64_t arch_id;
91 int64_t vcpus_count;
92 CpuInstanceProperties props;
93 Object *cpu;
94 const char *type;
95 } CPUArchId;
96
97 /**
98 * CPUArchIdList:
99 * @len - number of @CPUArchId items in @cpus array
100 * @cpus - array of present or possible CPUs for current machine configuration
101 */
102 typedef struct {
103 int len;
104 CPUArchId cpus[0];
105 } CPUArchIdList;
106
107 /**
108 * MachineClass:
109 * @deprecation_reason: If set, the machine is marked as deprecated. The
110 * string should provide some clear information about what to use instead.
111 * @max_cpus: maximum number of CPUs supported. Default: 1
112 * @min_cpus: minimum number of CPUs supported. Default: 1
113 * @default_cpus: number of CPUs instantiated if none are specified. Default: 1
114 * @get_hotplug_handler: this function is called during bus-less
115 * device hotplug. If defined it returns pointer to an instance
116 * of HotplugHandler object, which handles hotplug operation
117 * for a given @dev. It may return NULL if @dev doesn't require
118 * any actions to be performed by hotplug handler.
119 * @cpu_index_to_instance_props:
120 * used to provide @cpu_index to socket/core/thread number mapping, allowing
121 * legacy code to perform maping from cpu_index to topology properties
122 * Returns: tuple of socket/core/thread ids given cpu_index belongs to.
123 * used to provide @cpu_index to socket number mapping, allowing
124 * a machine to group CPU threads belonging to the same socket/package
125 * Returns: socket number given cpu_index belongs to.
126 * @hw_version:
127 * Value of QEMU_VERSION when the machine was added to QEMU.
128 * Set only by old machines because they need to keep
129 * compatibility on code that exposed QEMU_VERSION to guests in
130 * the past (and now use qemu_hw_version()).
131 * @possible_cpu_arch_ids:
132 * Returns an array of @CPUArchId architecture-dependent CPU IDs
133 * which includes CPU IDs for present and possible to hotplug CPUs.
134 * Caller is responsible for freeing returned list.
135 * @get_default_cpu_node_id:
136 * returns default board specific node_id value for CPU slot specified by
137 * index @idx in @ms->possible_cpus[]
138 * @has_hotpluggable_cpus:
139 * If true, board supports CPUs creation with -device/device_add.
140 * @default_cpu_type:
141 * specifies default CPU_TYPE, which will be used for parsing target
142 * specific features and for creating CPUs if CPU name wasn't provided
143 * explicitly at CLI
144 * @minimum_page_bits:
145 * If non-zero, the board promises never to create a CPU with a page size
146 * smaller than this, so QEMU can use a more efficient larger page
147 * size than the target architecture's minimum. (Attempting to create
148 * such a CPU will fail.) Note that changing this is a migration
149 * compatibility break for the machine.
150 * @ignore_memory_transaction_failures:
151 * If this is flag is true then the CPU will ignore memory transaction
152 * failures which should cause the CPU to take an exception due to an
153 * access to an unassigned physical address; the transaction will instead
154 * return zero (for a read) or be ignored (for a write). This should be
155 * set only by legacy board models which rely on the old RAZ/WI behaviour
156 * for handling devices that QEMU does not yet model. New board models
157 * should instead use "unimplemented-device" for all memory ranges where
158 * the guest will attempt to probe for a device that QEMU doesn't
159 * implement and a stub device is required.
160 */
161 struct MachineClass {
162 /*< private >*/
163 ObjectClass parent_class;
164 /*< public >*/
165
166 const char *family; /* NULL iff @name identifies a standalone machtype */
167 char *name;
168 const char *alias;
169 const char *desc;
170 const char *deprecation_reason;
171
172 void (*init)(MachineState *state);
173 void (*reset)(void);
174 void (*hot_add_cpu)(const int64_t id, Error **errp);
175 int (*kvm_type)(const char *arg);
176
177 BlockInterfaceType block_default_type;
178 int units_per_default_bus;
179 int max_cpus;
180 int min_cpus;
181 int default_cpus;
182 unsigned int no_serial:1,
183 no_parallel:1,
184 use_virtcon:1,
185 no_floppy:1,
186 no_cdrom:1,
187 no_sdcard:1,
188 pci_allow_0_address:1,
189 legacy_fw_cfg_order:1;
190 int is_default;
191 const char *default_machine_opts;
192 const char *default_boot_order;
193 const char *default_display;
194 GArray *compat_props;
195 const char *hw_version;
196 ram_addr_t default_ram_size;
197 const char *default_cpu_type;
198 bool option_rom_has_mr;
199 bool rom_file_has_mr;
200 int minimum_page_bits;
201 bool has_hotpluggable_cpus;
202 bool ignore_memory_transaction_failures;
203 int numa_mem_align_shift;
204 const char **valid_cpu_types;
205 strList *allowed_dynamic_sysbus_devices;
206 bool auto_enable_numa_with_memhp;
207 void (*numa_auto_assign_ram)(MachineClass *mc, NodeInfo *nodes,
208 int nb_nodes, ram_addr_t size);
209
210 HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
211 DeviceState *dev);
212 CpuInstanceProperties (*cpu_index_to_instance_props)(MachineState *machine,
213 unsigned cpu_index);
214 const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine);
215 int64_t (*get_default_cpu_node_id)(const MachineState *ms, int idx);
216 };
217
218 /**
219 * DeviceMemoryState:
220 * @base: address in guest physical address space where the memory
221 * address space for memory devices starts
222 * @mr: address space container for memory devices
223 */
224 typedef struct DeviceMemoryState {
225 hwaddr base;
226 MemoryRegion mr;
227 } DeviceMemoryState;
228
229 /**
230 * MachineState:
231 */
232 struct MachineState {
233 /*< private >*/
234 Object parent_obj;
235 Notifier sysbus_notifier;
236
237 /*< public >*/
238
239 char *accel;
240 bool kernel_irqchip_allowed;
241 bool kernel_irqchip_required;
242 bool kernel_irqchip_split;
243 int kvm_shadow_mem;
244 char *dtb;
245 char *dumpdtb;
246 int phandle_start;
247 char *dt_compatible;
248 bool dump_guest_core;
249 bool mem_merge;
250 bool usb;
251 bool usb_disabled;
252 bool igd_gfx_passthru;
253 char *firmware;
254 bool iommu;
255 bool suppress_vmdesc;
256 bool enforce_config_section;
257 bool enable_graphics;
258 char *memory_encryption;
259 DeviceMemoryState *device_memory;
260
261 ram_addr_t ram_size;
262 ram_addr_t maxram_size;
263 uint64_t ram_slots;
264 const char *boot_order;
265 char *kernel_filename;
266 char *kernel_cmdline;
267 char *initrd_filename;
268 const char *cpu_type;
269 AccelState *accelerator;
270 CPUArchIdList *possible_cpus;
271 };
272
273 #define DEFINE_MACHINE(namestr, machine_initfn) \
274 static void machine_initfn##_class_init(ObjectClass *oc, void *data) \
275 { \
276 MachineClass *mc = MACHINE_CLASS(oc); \
277 machine_initfn(mc); \
278 } \
279 static const TypeInfo machine_initfn##_typeinfo = { \
280 .name = MACHINE_TYPE_NAME(namestr), \
281 .parent = TYPE_MACHINE, \
282 .class_init = machine_initfn##_class_init, \
283 }; \
284 static void machine_initfn##_register_types(void) \
285 { \
286 type_register_static(&machine_initfn##_typeinfo); \
287 } \
288 type_init(machine_initfn##_register_types)
289
290 #define SET_MACHINE_COMPAT(m, COMPAT) \
291 do { \
292 int i; \
293 static GlobalProperty props[] = { \
294 COMPAT \
295 { /* end of list */ } \
296 }; \
297 if (!m->compat_props) { \
298 m->compat_props = g_array_new(false, false, sizeof(void *)); \
299 } \
300 for (i = 0; props[i].driver != NULL; i++) { \
301 GlobalProperty *prop = &props[i]; \
302 g_array_append_val(m->compat_props, prop); \
303 } \
304 } while (0)
305
306 #endif