4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
23 #include "hw/qdev-core.h"
24 #include "disas/dis-asm.h"
25 #include "exec/cpu-common.h"
26 #include "exec/hwaddr.h"
27 #include "exec/memattrs.h"
28 #include "qapi/qapi-types-run-state.h"
29 #include "qemu/bitmap.h"
30 #include "qemu/rcu_queue.h"
31 #include "qemu/queue.h"
32 #include "qemu/thread.h"
33 #include "qemu/plugin-event.h"
34 #include "qom/object.h"
36 typedef int (*WriteCoreDumpFunction
)(const void *buf
, size_t size
,
41 * @section_id: QEMU-cpu
43 * @short_description: Base class for all CPUs
46 #define TYPE_CPU "cpu"
48 /* Since this macro is used a lot in hot code paths and in conjunction with
49 * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
52 #define CPU(obj) ((CPUState *)(obj))
55 * The class checkers bring in CPU_GET_CLASS() which is potentially
56 * expensive given the eventual call to
57 * object_class_dynamic_cast_assert(). Because of this the CPUState
58 * has a cached value for the class in cs->cc which is set up in
59 * cpu_exec_realizefn() for use in hot code paths.
61 typedef struct CPUClass CPUClass
;
62 DECLARE_CLASS_CHECKERS(CPUClass
, CPU
,
66 * OBJECT_DECLARE_CPU_TYPE:
67 * @CpuInstanceType: instance struct name
68 * @CpuClassType: class struct name
69 * @CPU_MODULE_OBJ_NAME: the CPU name in uppercase with underscore separators
71 * This macro is typically used in "cpu-qom.h" header file, and will:
73 * - create the typedefs for the CPU object and class structs
74 * - register the type for use with g_autoptr
75 * - provide three standard type cast functions
77 * The object struct and class struct need to be declared manually.
79 #define OBJECT_DECLARE_CPU_TYPE(CpuInstanceType, CpuClassType, CPU_MODULE_OBJ_NAME) \
80 typedef struct ArchCPU CpuInstanceType; \
81 OBJECT_DECLARE_TYPE(ArchCPU, CpuClassType, CPU_MODULE_OBJ_NAME);
83 typedef enum MMUAccessType
{
87 #define MMU_ACCESS_COUNT 3
90 typedef struct CPUWatchpoint CPUWatchpoint
;
92 /* see tcg-cpu-ops.h */
98 /* see sysemu-cpu-ops.h */
103 * @class_by_name: Callback to map -cpu command line model name to an
104 * instantiatable CPU type.
105 * @parse_features: Callback to parse command line arguments.
106 * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
107 * @has_work: Callback for checking if there is work to do.
108 * @memory_rw_debug: Callback for GDB memory access.
109 * @dump_state: Callback for dumping state.
111 * Fill in target specific information for the "query-cpus-fast"
113 * @get_arch_id: Callback for getting architecture-dependent CPU ID.
114 * @set_pc: Callback for setting the Program Counter register. This
115 * should have the semantics used by the target architecture when
116 * setting the PC from a source such as an ELF file entry point;
117 * for example on Arm it will also set the Thumb mode bit based
118 * on the least significant bit of the new PC value.
119 * If the target behaviour here is anything other than "set
120 * the PC register to the value passed in" then the target must
121 * also implement the synchronize_from_tb hook.
122 * @get_pc: Callback for getting the Program Counter register.
123 * As above, with the semantics of the target architecture.
124 * @gdb_read_register: Callback for letting GDB read a register.
125 * @gdb_write_register: Callback for letting GDB write a register.
126 * @gdb_adjust_breakpoint: Callback for adjusting the address of a
127 * breakpoint. Used by AVR to handle a gdb mis-feature with
128 * its Harvard architecture split code and data.
129 * @gdb_num_core_regs: Number of core registers accessible to GDB.
130 * @gdb_core_xml_file: File name for core registers GDB XML description.
131 * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
132 * before the insn which triggers a watchpoint rather than after it.
133 * @gdb_arch_name: Optional callback that returns the architecture name known
134 * to GDB. The caller must free the returned string with g_free.
135 * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the
136 * gdb stub. Returns a pointer to the XML contents for the specified XML file
137 * or NULL if the CPU doesn't have a dynamically generated content for it.
138 * @disas_set_info: Setup architecture specific components of disassembly info
139 * @adjust_watchpoint_address: Perform a target-specific adjustment to an
140 * address before attempting to match it against watchpoints.
141 * @deprecation_note: If this CPUClass is deprecated, this field provides
142 * related information.
144 * Represents a CPU family or model.
148 DeviceClass parent_class
;
151 ObjectClass
*(*class_by_name
)(const char *cpu_model
);
152 void (*parse_features
)(const char *typename
, char *str
, Error
**errp
);
154 bool (*has_work
)(CPUState
*cpu
);
155 int (*memory_rw_debug
)(CPUState
*cpu
, vaddr addr
,
156 uint8_t *buf
, int len
, bool is_write
);
157 void (*dump_state
)(CPUState
*cpu
, FILE *, int flags
);
158 void (*query_cpu_fast
)(CPUState
*cpu
, CpuInfoFast
*value
);
159 int64_t (*get_arch_id
)(CPUState
*cpu
);
160 void (*set_pc
)(CPUState
*cpu
, vaddr value
);
161 vaddr (*get_pc
)(CPUState
*cpu
);
162 int (*gdb_read_register
)(CPUState
*cpu
, GByteArray
*buf
, int reg
);
163 int (*gdb_write_register
)(CPUState
*cpu
, uint8_t *buf
, int reg
);
164 vaddr (*gdb_adjust_breakpoint
)(CPUState
*cpu
, vaddr addr
);
166 const char *gdb_core_xml_file
;
167 gchar
* (*gdb_arch_name
)(CPUState
*cpu
);
168 const char * (*gdb_get_dynamic_xml
)(CPUState
*cpu
, const char *xmlname
);
170 void (*disas_set_info
)(CPUState
*cpu
, disassemble_info
*info
);
172 const char *deprecation_note
;
173 struct AccelCPUClass
*accel_cpu
;
175 /* when system emulation is not available, this pointer is NULL */
176 const struct SysemuCPUOps
*sysemu_ops
;
178 /* when TCG is not available, this pointer is NULL */
179 const struct TCGCPUOps
*tcg_ops
;
182 * if not NULL, this is called in order for the CPUClass to initialize
183 * class data that depends on the accelerator, see accel/accel-common.c.
185 void (*init_accel_cpu
)(struct AccelCPUClass
*accel_cpu
, CPUClass
*cc
);
188 * Keep non-pointer data at the end to minimize holes.
190 int reset_dump_flags
;
191 int gdb_num_core_regs
;
192 bool gdb_stop_before_watchpoint
;
196 * Low 16 bits: number of cycles left, used only in icount mode.
197 * High 16 bits: Set to -1 to force TCG to stop executing linked TBs
198 * for this CPU and return to its top level loop (even in non-icount mode).
199 * This allows a single read-compare-cbranch-write sequence to test
200 * for both decrementer underflow and exceptions.
202 typedef union IcountDecr
{
215 typedef struct CPUBreakpoint
{
217 int flags
; /* BP_* */
218 QTAILQ_ENTRY(CPUBreakpoint
) entry
;
221 struct CPUWatchpoint
{
226 int flags
; /* BP_* */
227 QTAILQ_ENTRY(CPUWatchpoint
) entry
;
232 * For plugins we sometime need to save the resolved iotlb data before
233 * the memory regions get moved around by io_writex.
235 typedef struct SavedIOTLB
{
236 MemoryRegionSection
*section
;
244 struct hax_vcpu_state
;
245 struct hvf_vcpu_state
;
249 /* The union type allows passing of 64 bit target pointers on 32 bit
250 * hosts in a single parameter
254 unsigned long host_ulong
;
259 #define RUN_ON_CPU_HOST_PTR(p) ((run_on_cpu_data){.host_ptr = (p)})
260 #define RUN_ON_CPU_HOST_INT(i) ((run_on_cpu_data){.host_int = (i)})
261 #define RUN_ON_CPU_HOST_ULONG(ul) ((run_on_cpu_data){.host_ulong = (ul)})
262 #define RUN_ON_CPU_TARGET_PTR(v) ((run_on_cpu_data){.target_ptr = (v)})
263 #define RUN_ON_CPU_NULL RUN_ON_CPU_HOST_PTR(NULL)
265 typedef void (*run_on_cpu_func
)(CPUState
*cpu
, run_on_cpu_data data
);
267 struct qemu_work_item
;
269 #define CPU_UNSET_NUMA_NODE_ID -1
273 * @cpu_index: CPU index (informative).
274 * @cluster_index: Identifies which cluster this CPU is in.
275 * For boards which don't define clusters or for "loose" CPUs not assigned
276 * to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
277 * be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
279 * Under TCG this value is propagated to @tcg_cflags.
280 * See TranslationBlock::TCG CF_CLUSTER_MASK.
281 * @tcg_cflags: Pre-computed cflags for this cpu.
282 * @nr_cores: Number of cores within this CPU package.
283 * @nr_threads: Number of threads within this CPU.
284 * @running: #true if CPU is currently running (lockless).
285 * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
286 * valid under cpu_list_lock.
287 * @created: Indicates whether the CPU thread has been successfully created.
288 * @interrupt_request: Indicates a pending interrupt request.
289 * @halted: Nonzero if the CPU is in suspended state.
290 * @stop: Indicates a pending stop request.
291 * @stopped: Indicates the CPU has been artificially stopped.
292 * @unplug: Indicates a pending CPU unplug request.
293 * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
294 * @singlestep_enabled: Flags for single-stepping.
295 * @icount_extra: Instructions until next timer event.
296 * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
297 * requires that IO only be performed on the last instruction of a TB
298 * so that interrupts take effect immediately.
299 * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
300 * AddressSpaces this CPU has)
301 * @num_ases: number of CPUAddressSpaces in @cpu_ases
302 * @as: Pointer to the first AddressSpace, for the convenience of targets which
303 * only have a single AddressSpace
304 * @env_ptr: Pointer to subclass-specific CPUArchState field.
305 * @icount_decr_ptr: Pointer to IcountDecr field within subclass.
306 * @gdb_regs: Additional GDB registers.
307 * @gdb_num_regs: Number of total registers accessible to GDB.
308 * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
309 * @next_cpu: Next CPU sharing TB cache.
310 * @opaque: User data.
311 * @mem_io_pc: Host Program Counter at which the memory was accessed.
312 * @kvm_fd: vCPU file descriptor for KVM.
313 * @work_mutex: Lock to prevent multiple access to @work_list.
314 * @work_list: List of pending asynchronous work.
315 * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all changes
317 * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
318 * @plugin_mask: Plugin event bitmap. Modified only via async work.
319 * @ignore_memory_transaction_failures: Cached copy of the MachineState
320 * flag of the same name: allows the board to suppress calling of the
321 * CPU do_transaction_failed hook function.
322 * @kvm_dirty_gfns: Points to the KVM dirty ring for this CPU when KVM dirty
324 * @kvm_fetch_index: Keeps the index that we last fetched from the per-vCPU
325 * dirty ring structure.
327 * State of one CPU core or thread.
331 DeviceState parent_obj
;
332 /* cache to avoid expensive CPU_GET_CLASS */
339 struct QemuThread
*thread
;
345 bool running
, has_waiter
;
346 struct QemuCond
*halt_cond
;
352 /* Should CPU start in powered-off state? */
353 bool start_powered_off
;
358 int exclusive_context_count
;
359 uint32_t cflags_next_tb
;
360 /* updates protected by BQL */
361 uint32_t interrupt_request
;
362 int singlestep_enabled
;
363 int64_t icount_budget
;
364 int64_t icount_extra
;
365 uint64_t random_seed
;
368 QemuMutex work_mutex
;
369 QSIMPLEQ_HEAD(, qemu_work_item
) work_list
;
371 CPUAddressSpace
*cpu_ases
;
374 MemoryRegion
*memory
;
376 CPUArchState
*env_ptr
;
377 IcountDecr
*icount_decr_ptr
;
379 CPUJumpCache
*tb_jmp_cache
;
381 struct GDBRegisterState
*gdb_regs
;
384 QTAILQ_ENTRY(CPUState
) node
;
386 /* ice debug support */
387 QTAILQ_HEAD(, CPUBreakpoint
) breakpoints
;
389 QTAILQ_HEAD(, CPUWatchpoint
) watchpoints
;
390 CPUWatchpoint
*watchpoint_hit
;
394 /* In order to avoid passing too many arguments to the MMIO helpers,
395 * we store some rarely used information in the CPU context.
399 /* Only used in KVM */
401 struct KVMState
*kvm_state
;
402 struct kvm_run
*kvm_run
;
403 struct kvm_dirty_gfn
*kvm_dirty_gfns
;
404 uint32_t kvm_fetch_index
;
405 uint64_t dirty_pages
;
406 int kvm_vcpu_stats_fd
;
408 /* Use by accel-block: CPU is executing an ioctl() */
409 QemuLockCnt in_ioctl_lock
;
411 DECLARE_BITMAP(plugin_mask
, QEMU_PLUGIN_EV_MAX
);
414 GArray
*plugin_mem_cbs
;
415 /* saved iotlb data from io_writex */
416 SavedIOTLB saved_iotlb
;
419 /* TODO Move common fields from CPUArchState here. */
425 int32_t exception_index
;
427 /* shared by kvm, hax and hvf */
430 /* Used to keep track of an outstanding cpu throttle thread for migration
433 bool throttle_thread_scheduled
;
436 * Sleep throttle_us_per_full microseconds once dirty ring is full
437 * if dirty page rate limit is enabled.
439 int64_t throttle_us_per_full
;
441 bool ignore_memory_transaction_failures
;
443 /* Used for user-only emulation of prctl(PR_SET_UNALIGN). */
444 bool prctl_unalign_sigbus
;
446 struct hax_vcpu_state
*hax_vcpu
;
448 struct hvf_vcpu_state
*hvf
;
450 /* track IOMMUs whose translations we've cached in the TCG TLB */
451 GArray
*iommu_notifiers
;
454 typedef QTAILQ_HEAD(CPUTailQ
, CPUState
) CPUTailQ
;
455 extern CPUTailQ cpus
;
457 #define first_cpu QTAILQ_FIRST_RCU(&cpus)
458 #define CPU_NEXT(cpu) QTAILQ_NEXT_RCU(cpu, node)
459 #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus, node)
460 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
461 QTAILQ_FOREACH_SAFE_RCU(cpu, &cpus, node, next_cpu)
463 extern __thread CPUState
*current_cpu
;
466 * qemu_tcg_mttcg_enabled:
467 * Check whether we are running MultiThread TCG or not.
469 * Returns: %true if we are in MTTCG mode %false otherwise.
471 extern bool mttcg_enabled
;
472 #define qemu_tcg_mttcg_enabled() (mttcg_enabled)
475 * cpu_paging_enabled:
476 * @cpu: The CPU whose state is to be inspected.
478 * Returns: %true if paging is enabled, %false otherwise.
480 bool cpu_paging_enabled(const CPUState
*cpu
);
483 * cpu_get_memory_mapping:
484 * @cpu: The CPU whose memory mappings are to be obtained.
485 * @list: Where to write the memory mappings to.
486 * @errp: Pointer for reporting an #Error.
488 void cpu_get_memory_mapping(CPUState
*cpu
, MemoryMappingList
*list
,
491 #if !defined(CONFIG_USER_ONLY)
494 * cpu_write_elf64_note:
495 * @f: pointer to a function that writes memory to a file
496 * @cpu: The CPU whose memory is to be dumped
497 * @cpuid: ID number of the CPU
498 * @opaque: pointer to the CPUState struct
500 int cpu_write_elf64_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
501 int cpuid
, void *opaque
);
504 * cpu_write_elf64_qemunote:
505 * @f: pointer to a function that writes memory to a file
506 * @cpu: The CPU whose memory is to be dumped
507 * @cpuid: ID number of the CPU
508 * @opaque: pointer to the CPUState struct
510 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
514 * cpu_write_elf32_note:
515 * @f: pointer to a function that writes memory to a file
516 * @cpu: The CPU whose memory is to be dumped
517 * @cpuid: ID number of the CPU
518 * @opaque: pointer to the CPUState struct
520 int cpu_write_elf32_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
521 int cpuid
, void *opaque
);
524 * cpu_write_elf32_qemunote:
525 * @f: pointer to a function that writes memory to a file
526 * @cpu: The CPU whose memory is to be dumped
527 * @cpuid: ID number of the CPU
528 * @opaque: pointer to the CPUState struct
530 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
534 * cpu_get_crash_info:
535 * @cpu: The CPU to get crash information for
537 * Gets the previously saved crash information.
538 * Caller is responsible for freeing the data.
540 GuestPanicInformation
*cpu_get_crash_info(CPUState
*cpu
);
542 #endif /* !CONFIG_USER_ONLY */
547 * @CPU_DUMP_FPU: dump FPU register state, not just integer
548 * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
549 * @CPU_DUMP_VPU: dump VPU registers
552 CPU_DUMP_CODE
= 0x00010000,
553 CPU_DUMP_FPU
= 0x00020000,
554 CPU_DUMP_CCOP
= 0x00040000,
555 CPU_DUMP_VPU
= 0x00080000,
560 * @cpu: The CPU whose state is to be dumped.
561 * @f: If non-null, dump to this stream, else to current print sink.
565 void cpu_dump_state(CPUState
*cpu
, FILE *f
, int flags
);
567 #ifndef CONFIG_USER_ONLY
569 * cpu_get_phys_page_attrs_debug:
570 * @cpu: The CPU to obtain the physical page address for.
571 * @addr: The virtual address.
572 * @attrs: Updated on return with the memory transaction attributes to use
575 * Obtains the physical page corresponding to a virtual one, together
576 * with the corresponding memory transaction attributes to use for the access.
577 * Use it only for debugging because no protection checks are done.
579 * Returns: Corresponding physical page address or -1 if no page found.
581 hwaddr
cpu_get_phys_page_attrs_debug(CPUState
*cpu
, vaddr addr
,
585 * cpu_get_phys_page_debug:
586 * @cpu: The CPU to obtain the physical page address for.
587 * @addr: The virtual address.
589 * Obtains the physical page corresponding to a virtual one.
590 * Use it only for debugging because no protection checks are done.
592 * Returns: Corresponding physical page address or -1 if no page found.
594 hwaddr
cpu_get_phys_page_debug(CPUState
*cpu
, vaddr addr
);
596 /** cpu_asidx_from_attrs:
598 * @attrs: memory transaction attributes
600 * Returns the address space index specifying the CPU AddressSpace
601 * to use for a memory access with the given transaction attributes.
603 int cpu_asidx_from_attrs(CPUState
*cpu
, MemTxAttrs attrs
);
606 * cpu_virtio_is_big_endian:
609 * Returns %true if a CPU which supports runtime configurable endianness
610 * is currently big-endian.
612 bool cpu_virtio_is_big_endian(CPUState
*cpu
);
614 #endif /* CONFIG_USER_ONLY */
618 * @cpu: The CPU to be added to the list of CPUs.
620 void cpu_list_add(CPUState
*cpu
);
624 * @cpu: The CPU to be removed from the list of CPUs.
626 void cpu_list_remove(CPUState
*cpu
);
630 * @cpu: The CPU whose state is to be reset.
632 void cpu_reset(CPUState
*cpu
);
636 * @typename: The CPU base type.
637 * @cpu_model: The model string without any parameters.
639 * Looks up a CPU #ObjectClass matching name @cpu_model.
641 * Returns: A #CPUClass or %NULL if not matching class is found.
643 ObjectClass
*cpu_class_by_name(const char *typename
, const char *cpu_model
);
647 * @typename: The CPU type.
649 * Instantiates a CPU and realizes the CPU.
651 * Returns: A #CPUState or %NULL if an error occurred.
653 CPUState
*cpu_create(const char *typename
);
657 * @cpu_option: The -cpu option including optional parameters.
659 * processes optional parameters and registers them as global properties
661 * Returns: type of CPU to create or prints error and terminates process
662 * if an error occurred.
664 const char *parse_cpu_option(const char *cpu_option
);
668 * @cpu: The vCPU to check.
670 * Checks whether the CPU has work to do.
672 * Returns: %true if the CPU has work, %false otherwise.
674 static inline bool cpu_has_work(CPUState
*cpu
)
676 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
678 g_assert(cc
->has_work
);
679 return cc
->has_work(cpu
);
684 * @cpu: The vCPU to check against.
686 * Checks whether the caller is executing on the vCPU thread.
688 * Returns: %true if called from @cpu's thread, %false otherwise.
690 bool qemu_cpu_is_self(CPUState
*cpu
);
694 * @cpu: The vCPU to kick.
696 * Kicks @cpu's thread.
698 void qemu_cpu_kick(CPUState
*cpu
);
702 * @cpu: The CPU to check.
704 * Checks whether the CPU is stopped.
706 * Returns: %true if run state is not running or if artificially stopped;
709 bool cpu_is_stopped(CPUState
*cpu
);
713 * @cpu: The vCPU to run on.
714 * @func: The function to be executed.
715 * @data: Data to pass to the function.
716 * @mutex: Mutex to release while waiting for @func to run.
718 * Used internally in the implementation of run_on_cpu.
720 void do_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
,
725 * @cpu: The vCPU to run on.
726 * @func: The function to be executed.
727 * @data: Data to pass to the function.
729 * Schedules the function @func for execution on the vCPU @cpu.
731 void run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
735 * @cpu: The vCPU to run on.
736 * @func: The function to be executed.
737 * @data: Data to pass to the function.
739 * Schedules the function @func for execution on the vCPU @cpu asynchronously.
741 void async_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
744 * async_safe_run_on_cpu:
745 * @cpu: The vCPU to run on.
746 * @func: The function to be executed.
747 * @data: Data to pass to the function.
749 * Schedules the function @func for execution on the vCPU @cpu asynchronously,
750 * while all other vCPUs are sleeping.
752 * Unlike run_on_cpu and async_run_on_cpu, the function is run outside the
755 void async_safe_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
758 * cpu_in_exclusive_context()
759 * @cpu: The vCPU to check
761 * Returns true if @cpu is an exclusive context, for example running
762 * something which has previously been queued via async_safe_run_on_cpu().
764 static inline bool cpu_in_exclusive_context(const CPUState
*cpu
)
766 return cpu
->exclusive_context_count
;
771 * @index: The CPUState@cpu_index value of the CPU to obtain.
773 * Gets a CPU matching @index.
775 * Returns: The CPU or %NULL if there is no matching CPU.
777 CPUState
*qemu_get_cpu(int index
);
781 * @id: Guest-exposed CPU ID to lookup.
783 * Search for CPU with specified ID.
785 * Returns: %true - CPU is found, %false - CPU isn't found.
787 bool cpu_exists(int64_t id
);
791 * @id: Guest-exposed CPU ID of the CPU to obtain.
793 * Get a CPU with matching @id.
795 * Returns: The CPU or %NULL if there is no matching CPU.
797 CPUState
*cpu_by_arch_id(int64_t id
);
801 * @cpu: The CPU to set an interrupt on.
802 * @mask: The interrupts to set.
804 * Invokes the interrupt handler.
807 void cpu_interrupt(CPUState
*cpu
, int mask
);
811 * @cpu: The CPU to set the program counter for.
812 * @addr: Program counter value.
814 * Sets the program counter for a CPU.
816 static inline void cpu_set_pc(CPUState
*cpu
, vaddr addr
)
818 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
820 cc
->set_pc(cpu
, addr
);
824 * cpu_reset_interrupt:
825 * @cpu: The CPU to clear the interrupt on.
826 * @mask: The interrupt mask to clear.
828 * Resets interrupts on the vCPU @cpu.
830 void cpu_reset_interrupt(CPUState
*cpu
, int mask
);
834 * @cpu: The CPU to exit.
836 * Requests the CPU @cpu to exit execution.
838 void cpu_exit(CPUState
*cpu
);
842 * @cpu: The CPU to resume.
844 * Resumes CPU, i.e. puts CPU into runnable state.
846 void cpu_resume(CPUState
*cpu
);
850 * @cpu: The CPU to remove.
852 * Requests the CPU to be removed and waits till it is removed.
854 void cpu_remove_sync(CPUState
*cpu
);
857 * process_queued_cpu_work() - process all items on CPU work queue
858 * @cpu: The CPU which work queue to process.
860 void process_queued_cpu_work(CPUState
*cpu
);
864 * @cpu: The CPU for the current thread.
866 * Record that a CPU has started execution and can be interrupted with
869 void cpu_exec_start(CPUState
*cpu
);
873 * @cpu: The CPU for the current thread.
875 * Record that a CPU has stopped execution and exclusive sections
876 * can be executed without interrupting it.
878 void cpu_exec_end(CPUState
*cpu
);
883 * Wait for a concurrent exclusive section to end, and then start
884 * a section of work that is run while other CPUs are not running
885 * between cpu_exec_start and cpu_exec_end. CPUs that are running
886 * cpu_exec are exited immediately. CPUs that call cpu_exec_start
887 * during the exclusive section go to sleep until this CPU calls
890 void start_exclusive(void);
895 * Concludes an exclusive execution section started by start_exclusive.
897 void end_exclusive(void);
901 * @cpu: The vCPU to initialize.
903 * Initializes a vCPU.
905 void qemu_init_vcpu(CPUState
*cpu
);
907 #define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
908 #define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
909 #define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
913 * @cpu: CPU to the flags for.
914 * @enabled: Flags to enable.
916 * Enables or disables single-stepping for @cpu.
918 void cpu_single_step(CPUState
*cpu
, int enabled
);
920 /* Breakpoint/watchpoint flags */
921 #define BP_MEM_READ 0x01
922 #define BP_MEM_WRITE 0x02
923 #define BP_MEM_ACCESS (BP_MEM_READ | BP_MEM_WRITE)
924 #define BP_STOP_BEFORE_ACCESS 0x04
925 /* 0x08 currently unused */
928 #define BP_ANY (BP_GDB | BP_CPU)
929 #define BP_HIT_SHIFT 6
930 #define BP_WATCHPOINT_HIT_READ (BP_MEM_READ << BP_HIT_SHIFT)
931 #define BP_WATCHPOINT_HIT_WRITE (BP_MEM_WRITE << BP_HIT_SHIFT)
932 #define BP_WATCHPOINT_HIT (BP_MEM_ACCESS << BP_HIT_SHIFT)
934 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
935 CPUBreakpoint
**breakpoint
);
936 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
);
937 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
);
938 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
);
940 /* Return true if PC matches an installed breakpoint. */
941 static inline bool cpu_breakpoint_test(CPUState
*cpu
, vaddr pc
, int mask
)
945 if (unlikely(!QTAILQ_EMPTY(&cpu
->breakpoints
))) {
946 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
947 if (bp
->pc
== pc
&& (bp
->flags
& mask
)) {
955 #if defined(CONFIG_USER_ONLY)
956 static inline int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
957 int flags
, CPUWatchpoint
**watchpoint
)
962 static inline int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
,
963 vaddr len
, int flags
)
968 static inline void cpu_watchpoint_remove_by_ref(CPUState
*cpu
,
973 static inline void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
977 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
978 int flags
, CPUWatchpoint
**watchpoint
);
979 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
,
980 vaddr len
, int flags
);
981 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
);
982 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
);
986 * cpu_get_address_space:
987 * @cpu: CPU to get address space from
988 * @asidx: index identifying which address space to get
990 * Return the requested address space of this CPU. @asidx
991 * specifies which address space to read.
993 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
);
995 G_NORETURN
void cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
998 /* $(top_srcdir)/cpu.c */
999 void cpu_class_init_props(DeviceClass
*dc
);
1000 void cpu_exec_initfn(CPUState
*cpu
);
1001 void cpu_exec_realizefn(CPUState
*cpu
, Error
**errp
);
1002 void cpu_exec_unrealizefn(CPUState
*cpu
);
1005 * target_words_bigendian:
1006 * Returns true if the (default) endianness of the target is big endian,
1007 * false otherwise. Note that in target-specific code, you can use
1008 * TARGET_BIG_ENDIAN directly instead. On the other hand, common
1009 * code should normally never need to know about the endianness of the
1010 * target, so please do *not* use this function unless you know very well
1011 * what you are doing!
1013 bool target_words_bigendian(void);
1015 const char *target_name(void);
1017 void page_size_init(void);
1021 #ifndef CONFIG_USER_ONLY
1023 extern const VMStateDescription vmstate_cpu_common
;
1025 #define VMSTATE_CPU() { \
1026 .name = "parent_obj", \
1027 .size = sizeof(CPUState), \
1028 .vmsd = &vmstate_cpu_common, \
1029 .flags = VMS_STRUCT, \
1032 #endif /* !CONFIG_USER_ONLY */
1034 #endif /* NEED_CPU_H */
1036 #define UNASSIGNED_CPU_INDEX -1
1037 #define UNASSIGNED_CLUSTER_INDEX -1