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e1000: add interrupt mitigation support
[mirror_qemu.git] / include / hw / i386 / pc.h
1 #ifndef HW_PC_H
2 #define HW_PC_H
3
4 #include "qemu-common.h"
5 #include "exec/memory.h"
6 #include "hw/isa/isa.h"
7 #include "hw/block/fdc.h"
8 #include "net/net.h"
9 #include "hw/i386/ioapic.h"
10
11 #include "qemu/range.h"
12
13 /* PC-style peripherals (also used by other machines). */
14
15 typedef struct PcPciInfo {
16 Range w32;
17 Range w64;
18 } PcPciInfo;
19
20 struct PcGuestInfo {
21 bool has_pci_info;
22 bool isapc_ram_fw;
23 FWCfgState *fw_cfg;
24 };
25
26 /* parallel.c */
27 static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr)
28 {
29 DeviceState *dev;
30 ISADevice *isadev;
31
32 isadev = isa_try_create(bus, "isa-parallel");
33 if (!isadev) {
34 return false;
35 }
36 dev = DEVICE(isadev);
37 qdev_prop_set_uint32(dev, "index", index);
38 qdev_prop_set_chr(dev, "chardev", chr);
39 if (qdev_init(dev) < 0) {
40 return false;
41 }
42 return true;
43 }
44
45 bool parallel_mm_init(MemoryRegion *address_space,
46 hwaddr base, int it_shift, qemu_irq irq,
47 CharDriverState *chr);
48
49 /* i8259.c */
50
51 extern DeviceState *isa_pic;
52 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
53 qemu_irq *kvm_i8259_init(ISABus *bus);
54 int pic_read_irq(DeviceState *d);
55 int pic_get_output(DeviceState *d);
56 void pic_info(Monitor *mon, const QDict *qdict);
57 void irq_info(Monitor *mon, const QDict *qdict);
58
59 /* Global System Interrupts */
60
61 #define GSI_NUM_PINS IOAPIC_NUM_PINS
62
63 typedef struct GSIState {
64 qemu_irq i8259_irq[ISA_NUM_IRQS];
65 qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
66 } GSIState;
67
68 void gsi_handler(void *opaque, int n, int level);
69
70 /* vmport.c */
71 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
72
73 static inline void vmport_init(ISABus *bus)
74 {
75 isa_create_simple(bus, "vmport");
76 }
77
78 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
79 void vmmouse_get_data(uint32_t *data);
80 void vmmouse_set_data(const uint32_t *data);
81
82 /* pckbd.c */
83
84 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
85 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
86 MemoryRegion *region, ram_addr_t size,
87 hwaddr mask);
88 void i8042_isa_mouse_fake_event(void *opaque);
89 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
90
91 /* pc.c */
92 extern int fd_bootchk;
93
94 void pc_register_ferr_irq(qemu_irq irq);
95 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
96
97 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge);
98 void pc_hot_add_cpu(const int64_t id, Error **errp);
99 void pc_acpi_init(const char *default_dsdt);
100
101 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
102 ram_addr_t above_4g_mem_size);
103
104 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
105 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
106 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
107 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
108 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
109 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
110
111 static inline uint64_t pci_host_get_hole64_size(uint64_t pci_hole64_size)
112 {
113 if (pci_hole64_size == DEFAULT_PCI_HOLE64_SIZE) {
114 return 1ULL << 62;
115 } else {
116 return pci_hole64_size;
117 }
118 }
119
120 void pc_init_pci64_hole(PcPciInfo *pci_info, uint64_t pci_hole64_start,
121 uint64_t pci_hole64_size);
122
123 FWCfgState *pc_memory_init(MemoryRegion *system_memory,
124 const char *kernel_filename,
125 const char *kernel_cmdline,
126 const char *initrd_filename,
127 ram_addr_t below_4g_mem_size,
128 ram_addr_t above_4g_mem_size,
129 MemoryRegion *rom_memory,
130 MemoryRegion **ram_memory,
131 PcGuestInfo *guest_info);
132 qemu_irq *pc_allocate_cpu_irq(void);
133 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
134 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
135 ISADevice **rtc_state,
136 ISADevice **floppy,
137 bool no_vmport);
138 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
139 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
140 const char *boot_device,
141 ISADevice *floppy, BusState *ide0, BusState *ide1,
142 ISADevice *s);
143 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
144 void pc_pci_device_init(PCIBus *pci_bus);
145
146 typedef void (*cpu_set_smm_t)(int smm, void *arg);
147 void cpu_smm_register(cpu_set_smm_t callback, void *arg);
148
149 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
150
151 /* acpi_piix.c */
152
153 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
154 qemu_irq sci_irq, qemu_irq smi_irq,
155 int kvm_enabled, FWCfgState *fw_cfg);
156 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
157
158 /* hpet.c */
159 extern int no_hpet;
160
161 /* piix_pci.c */
162 struct PCII440FXState;
163 typedef struct PCII440FXState PCII440FXState;
164
165 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
166 ISABus **isa_bus, qemu_irq *pic,
167 MemoryRegion *address_space_mem,
168 MemoryRegion *address_space_io,
169 ram_addr_t ram_size,
170 hwaddr pci_hole_start,
171 hwaddr pci_hole_size,
172 ram_addr_t above_4g_mem_size,
173 MemoryRegion *pci_memory,
174 MemoryRegion *ram_memory);
175
176 /* piix4.c */
177 extern PCIDevice *piix4_dev;
178 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
179
180 /* vga.c */
181 enum vga_retrace_method {
182 VGA_RETRACE_DUMB,
183 VGA_RETRACE_PRECISE
184 };
185
186 extern enum vga_retrace_method vga_retrace_method;
187
188 int isa_vga_mm_init(hwaddr vram_base,
189 hwaddr ctrl_base, int it_shift,
190 MemoryRegion *address_space);
191
192 /* ne2000.c */
193 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
194 {
195 DeviceState *dev;
196 ISADevice *isadev;
197
198 qemu_check_nic_model(nd, "ne2k_isa");
199
200 isadev = isa_try_create(bus, "ne2k_isa");
201 if (!isadev) {
202 return false;
203 }
204 dev = DEVICE(isadev);
205 qdev_prop_set_uint32(dev, "iobase", base);
206 qdev_prop_set_uint32(dev, "irq", irq);
207 qdev_set_nic_properties(dev, nd);
208 qdev_init_nofail(dev);
209 return true;
210 }
211
212 /* pc_sysfw.c */
213 void pc_system_firmware_init(MemoryRegion *rom_memory,
214 bool isapc_ram_fw);
215
216 /* pvpanic.c */
217 void pvpanic_init(ISABus *bus);
218
219 /* e820 types */
220 #define E820_RAM 1
221 #define E820_RESERVED 2
222 #define E820_ACPI 3
223 #define E820_NVS 4
224 #define E820_UNUSABLE 5
225
226 int e820_add_entry(uint64_t, uint64_t, uint32_t);
227
228 #define PC_COMPAT_1_6 \
229 {\
230 .driver = "e1000",\
231 .property = "mitigation",\
232 .value = "off",\
233 }
234
235 #define PC_COMPAT_1_5 \
236 PC_COMPAT_1_6, \
237 {\
238 .driver = "Conroe-" TYPE_X86_CPU,\
239 .property = "model",\
240 .value = stringify(2),\
241 },{\
242 .driver = "Conroe-" TYPE_X86_CPU,\
243 .property = "level",\
244 .value = stringify(2),\
245 },{\
246 .driver = "Penryn-" TYPE_X86_CPU,\
247 .property = "model",\
248 .value = stringify(2),\
249 },{\
250 .driver = "Penryn-" TYPE_X86_CPU,\
251 .property = "level",\
252 .value = stringify(2),\
253 },{\
254 .driver = "Nehalem-" TYPE_X86_CPU,\
255 .property = "model",\
256 .value = stringify(2),\
257 },{\
258 .driver = "Nehalem-" TYPE_X86_CPU,\
259 .property = "level",\
260 .value = stringify(2),\
261 },{\
262 .driver = "virtio-net-pci",\
263 .property = "any_layout",\
264 .value = "off",\
265 },{\
266 .driver = TYPE_X86_CPU,\
267 .property = "pmu",\
268 .value = "on",\
269 }
270
271 #define PC_COMPAT_1_4 \
272 PC_COMPAT_1_5, \
273 {\
274 .driver = "scsi-hd",\
275 .property = "discard_granularity",\
276 .value = stringify(0),\
277 },{\
278 .driver = "scsi-cd",\
279 .property = "discard_granularity",\
280 .value = stringify(0),\
281 },{\
282 .driver = "scsi-disk",\
283 .property = "discard_granularity",\
284 .value = stringify(0),\
285 },{\
286 .driver = "ide-hd",\
287 .property = "discard_granularity",\
288 .value = stringify(0),\
289 },{\
290 .driver = "ide-cd",\
291 .property = "discard_granularity",\
292 .value = stringify(0),\
293 },{\
294 .driver = "ide-drive",\
295 .property = "discard_granularity",\
296 .value = stringify(0),\
297 },{\
298 .driver = "virtio-blk-pci",\
299 .property = "discard_granularity",\
300 .value = stringify(0),\
301 },{\
302 .driver = "virtio-serial-pci",\
303 .property = "vectors",\
304 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
305 .value = stringify(0xFFFFFFFF),\
306 },{ \
307 .driver = "virtio-net-pci", \
308 .property = "ctrl_guest_offloads", \
309 .value = "off", \
310 },{\
311 .driver = "e1000",\
312 .property = "romfile",\
313 .value = "pxe-e1000.rom",\
314 },{\
315 .driver = "ne2k_pci",\
316 .property = "romfile",\
317 .value = "pxe-ne2k_pci.rom",\
318 },{\
319 .driver = "pcnet",\
320 .property = "romfile",\
321 .value = "pxe-pcnet.rom",\
322 },{\
323 .driver = "rtl8139",\
324 .property = "romfile",\
325 .value = "pxe-rtl8139.rom",\
326 },{\
327 .driver = "virtio-net-pci",\
328 .property = "romfile",\
329 .value = "pxe-virtio.rom",\
330 },{\
331 .driver = "486-" TYPE_X86_CPU,\
332 .property = "model",\
333 .value = stringify(0),\
334 }
335
336 #define PC_COMMON_MACHINE_OPTIONS \
337 .default_boot_order = "cad"
338
339 #define PC_DEFAULT_MACHINE_OPTIONS \
340 PC_COMMON_MACHINE_OPTIONS, \
341 .hot_add_cpu = pc_hot_add_cpu, \
342 .max_cpus = 255
343
344 #endif