4 #include "exec/memory.h"
6 #include "hw/block/fdc.h"
7 #include "hw/block/flash.h"
9 #include "hw/i386/x86.h"
11 #include "qemu/range.h"
12 #include "qemu/bitmap.h"
13 #include "qemu/module.h"
14 #include "hw/pci/pci.h"
15 #include "hw/mem/pc-dimm.h"
16 #include "hw/mem/nvdimm.h"
17 #include "hw/acpi/acpi_dev_interface.h"
19 #define HPET_INTCAP "hpet-intcap"
23 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
24 * @boot_cpus: number of present VCPUs
25 * @smp_dies: number of dies per one package
27 struct PCMachineState
{
29 X86MachineState parent_obj
;
33 /* State for other subsystems/APIs: */
34 Notifier machine_done
;
36 /* Pointers to devices and objects: */
37 HotplugHandler
*acpi_dev
;
40 PFlashCFI01
*flash
[2];
42 /* Configuration options: */
45 bool acpi_build_enabled
;
50 /* NUMA information: */
54 /* ACPI Memory hotplug IO base address */
58 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
59 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size"
60 #define PC_MACHINE_VMPORT "vmport"
61 #define PC_MACHINE_SMBUS "smbus"
62 #define PC_MACHINE_SATA "sata"
63 #define PC_MACHINE_PIT "pit"
70 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
71 * backend's alignment value if provided
72 * @acpi_data_size: Size of the chunk of memory at the top of RAM
73 * for the BIOS ACPI tables and other BIOS
75 * @gigabyte_align: Make sure that guest addresses aligned at
76 * 1Gbyte boundaries get mapped to host
77 * addresses aligned at 1Gbyte boundaries. This
78 * way we can use 1GByte pages in the host.
81 typedef struct PCMachineClass
{
83 X86MachineClass parent_class
;
87 /* Device configuration: */
89 bool kvmclock_enabled
;
90 const char *default_nic_model
;
94 /* Default CPU model version. See x86_cpu_set_default_version(). */
95 int default_cpu_version
;
100 int legacy_acpi_table_size
;
101 unsigned acpi_data_size
;
102 bool do_not_add_smb_acpi
;
105 bool smbios_defaults
;
106 bool smbios_legacy_mode
;
107 bool smbios_uuid_encoded
;
109 /* RAM / address space compat: */
111 bool has_reserved_memory
;
112 bool enforce_aligned_dimm
;
113 bool broken_reserved_end
;
115 /* generate legacy CPU hotplug AML */
116 bool legacy_cpu_hotplug
;
118 /* use DMA capable linuxboot option rom */
119 bool linuxboot_dma_enabled
;
121 /* use PVH to load kernels that support this feature */
125 #define TYPE_PC_MACHINE "generic-pc-machine"
126 #define PC_MACHINE(obj) \
127 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
128 #define PC_MACHINE_GET_CLASS(obj) \
129 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
130 #define PC_MACHINE_CLASS(klass) \
131 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
135 GSIState
*pc_gsi_create(qemu_irq
**irqs
, bool pci_enabled
);
138 #define TYPE_VMPORT "vmport"
139 typedef uint32_t (VMPortReadFunc
)(void *opaque
, uint32_t address
);
141 static inline void vmport_init(ISABus
*bus
)
143 isa_create_simple(bus
, TYPE_VMPORT
);
146 void vmport_register(unsigned char command
, VMPortReadFunc
*func
, void *opaque
);
147 void vmmouse_get_data(uint32_t *data
);
148 void vmmouse_set_data(const uint32_t *data
);
151 extern int fd_bootchk
;
153 void pc_acpi_smi_interrupt(void *opaque
, int irq
, int level
);
155 void pc_hot_add_cpu(MachineState
*ms
, const int64_t id
, Error
**errp
);
156 void pc_smp_parse(MachineState
*ms
, QemuOpts
*opts
);
158 void pc_guest_info_init(PCMachineState
*pcms
);
160 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
161 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
162 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
163 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
164 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
165 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size"
166 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size"
169 void pc_pci_as_mapping_init(Object
*owner
, MemoryRegion
*system_memory
,
170 MemoryRegion
*pci_address_space
);
172 void xen_load_linux(PCMachineState
*pcms
);
173 void pc_memory_init(PCMachineState
*pcms
,
174 MemoryRegion
*system_memory
,
175 MemoryRegion
*rom_memory
,
176 MemoryRegion
**ram_memory
);
177 uint64_t pc_pci_hole64_start(void);
178 DeviceState
*pc_vga_init(ISABus
*isa_bus
, PCIBus
*pci_bus
);
179 void pc_basic_device_init(ISABus
*isa_bus
, qemu_irq
*gsi
,
180 ISADevice
**rtc_state
,
185 void pc_init_ne2k_isa(ISABus
*bus
, NICInfo
*nd
);
186 void pc_cmos_init(PCMachineState
*pcms
,
187 BusState
*ide0
, BusState
*ide1
,
189 void pc_nic_init(PCMachineClass
*pcmc
, ISABus
*isa_bus
, PCIBus
*pci_bus
);
190 void pc_pci_device_init(PCIBus
*pci_bus
);
192 typedef void (*cpu_set_smm_t
)(int smm
, void *arg
);
194 void pc_i8259_create(ISABus
*isa_bus
, qemu_irq
*i8259_irqs
);
196 ISADevice
*pc_find_fdc0(void);
197 int cmos_get_fd_drive_type(FloppyDriveType fd0
);
200 #define PORT92_A20_LINE "a20"
202 #define TYPE_PORT92 "port92"
205 void pc_system_flash_create(PCMachineState
*pcms
);
206 void pc_system_firmware_init(PCMachineState
*pcms
, MemoryRegion
*rom_memory
);
209 void pc_madt_cpu_entry(AcpiDeviceIf
*adev
, int uid
,
210 const CPUArchIdList
*apic_ids
, GArray
*entry
);
212 extern GlobalProperty pc_compat_4_2
[];
213 extern const size_t pc_compat_4_2_len
;
215 extern GlobalProperty pc_compat_4_1
[];
216 extern const size_t pc_compat_4_1_len
;
218 extern GlobalProperty pc_compat_4_0
[];
219 extern const size_t pc_compat_4_0_len
;
221 extern GlobalProperty pc_compat_3_1
[];
222 extern const size_t pc_compat_3_1_len
;
224 extern GlobalProperty pc_compat_3_0
[];
225 extern const size_t pc_compat_3_0_len
;
227 extern GlobalProperty pc_compat_2_12
[];
228 extern const size_t pc_compat_2_12_len
;
230 extern GlobalProperty pc_compat_2_11
[];
231 extern const size_t pc_compat_2_11_len
;
233 extern GlobalProperty pc_compat_2_10
[];
234 extern const size_t pc_compat_2_10_len
;
236 extern GlobalProperty pc_compat_2_9
[];
237 extern const size_t pc_compat_2_9_len
;
239 extern GlobalProperty pc_compat_2_8
[];
240 extern const size_t pc_compat_2_8_len
;
242 extern GlobalProperty pc_compat_2_7
[];
243 extern const size_t pc_compat_2_7_len
;
245 extern GlobalProperty pc_compat_2_6
[];
246 extern const size_t pc_compat_2_6_len
;
248 extern GlobalProperty pc_compat_2_5
[];
249 extern const size_t pc_compat_2_5_len
;
251 extern GlobalProperty pc_compat_2_4
[];
252 extern const size_t pc_compat_2_4_len
;
254 extern GlobalProperty pc_compat_2_3
[];
255 extern const size_t pc_compat_2_3_len
;
257 extern GlobalProperty pc_compat_2_2
[];
258 extern const size_t pc_compat_2_2_len
;
260 extern GlobalProperty pc_compat_2_1
[];
261 extern const size_t pc_compat_2_1_len
;
263 extern GlobalProperty pc_compat_2_0
[];
264 extern const size_t pc_compat_2_0_len
;
266 extern GlobalProperty pc_compat_1_7
[];
267 extern const size_t pc_compat_1_7_len
;
269 extern GlobalProperty pc_compat_1_6
[];
270 extern const size_t pc_compat_1_6_len
;
272 extern GlobalProperty pc_compat_1_5
[];
273 extern const size_t pc_compat_1_5_len
;
275 extern GlobalProperty pc_compat_1_4
[];
276 extern const size_t pc_compat_1_4_len
;
278 /* Helper for setting model-id for CPU models that changed model-id
279 * depending on QEMU versions up to QEMU 2.4.
281 #define PC_CPU_MODEL_IDS(v) \
282 { "qemu32-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
283 { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
284 { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },
286 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
287 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
289 MachineClass *mc = MACHINE_CLASS(oc); \
293 static const TypeInfo pc_machine_type_##suffix = { \
294 .name = namestr TYPE_MACHINE_SUFFIX, \
295 .parent = TYPE_PC_MACHINE, \
296 .class_init = pc_machine_##suffix##_class_init, \
298 static void pc_machine_init_##suffix(void) \
300 type_register(&pc_machine_type_##suffix); \
302 type_init(pc_machine_init_##suffix)
304 extern void igd_passthrough_isa_bridge_create(PCIBus
*bus
, uint16_t gpu_dev_id
);